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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r038-tajo-167813691000110
Last Updated
May 14, 2023

About the Execution of LoLA for BridgeAndVehicles-COL-V50P50N50

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2747.604 5733.00 13249.00 25.10 TTFTFTFTTTFTTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813691000110.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-COL-V50P50N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813691000110
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 8.1K Feb 25 12:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 12:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 12:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 12:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.7K Feb 25 13:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 25 13:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 13:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 13:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 44K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678406287757

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V50P50N50
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V50P50N50
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678406293490

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 168, Transitions: 5408
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-54.sara.

lola: FINISHED task # 54 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 53 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 56 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 57 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 76 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 79 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 222113
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 79 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: result : true
lola: markings : 50
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 76 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 77 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 80 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 123 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 76 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 48
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 126 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: result : true
lola: markings : 41
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 123 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 124 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 127 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 139 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 146 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-77.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans enregistrement_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 145 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans decision
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-143.sara.

lola: FINISHED task # 146 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 139 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 143 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 161 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 162 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 164 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 165 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 39
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 143 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: result : unknown
lola: FINISHED task # 139 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : unknown
lola: fired transitions : 9528
lola: tried executions : 9529
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans altern_cpt
lola: @ trans autorisation_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-162.sara.
lola: FINISHED task # 164 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 161 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 162 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 165 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14 (obsolete)
lola: @ trans liberation_A
lola: LAUNCH task # 130 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 161 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 32689
lola: tried executions : 32690
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 162 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-131.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: FINISHED task # 133 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 130 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 131 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 134 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 88 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: result : unknown
lola: FINISHED task # 130 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 8311
lola: tried executions : 8312
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 124 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans timeout_B

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans liberation_B

lola: @ trans basculement
lola: @ trans autorisation_B
lola: FINISHED task # 77 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: result : true
lola: FINISHED task # 118 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 88 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 120 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 121 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 89 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 102 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 196527
lola: tried executions : 426
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 102 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: result : true
lola: markings : 245
lola: fired transitions : 244
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 89 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 100 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 103 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 67 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 243
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 70 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: result : true
lola: markings : 24
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 67 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 68 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 71 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 87 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 22
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 115 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: result : true
lola: markings : 79
lola: fired transitions : 78
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 87 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 98 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 116 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 141 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 77
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 156 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: result : false
lola: markings : 18053
lola: fired transitions : 33354
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 141 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 151 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 155 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 141 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 82423
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 105 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 90 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 106 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 86 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 1314
lola: tried executions : 1315
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 94 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: result : true
lola: markings : 121
lola: fired transitions : 180
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 86 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 92 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 95 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 86 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 161
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 61 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: result : false
lola: markings : 7701
lola: fired transitions : 10200
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 60 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 108 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 50 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 114997
lola: tried executions : 574
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 112 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 108 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 110 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 113 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 148 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 154 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: result : false
lola: markings : 5302
lola: fired transitions : 10402
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 149 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 153 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12 (obsolete)
lola: FINISHED task # 148 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 16746
lola: tried executions : 16747
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-110.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-92.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-68.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-149.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-151.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-100.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 92 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: result : true
lola: FINISHED task # 58 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 68 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: result : true
lola: Rule S: 0 transitions removed,0 places removed

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-98.sara.
lola: FINISHED task # 110 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04
lola: result : false
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 151 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11
lola: result : false
lola: FINISHED task # 100 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: result : true

lola: FINISHED task # 98 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 90 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 149 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12
lola: result : false
lola: planning for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 171 (type EXCL) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 167 (type FNDP) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type EQUN) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 170 (type SRCH) for 9 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 171 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: result : true
lola: markings : 144
lola: fired transitions : 143
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 167 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 168 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 170 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 177 (type EXCL) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 173 (type FNDP) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 174 (type EQUN) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 176 (type SRCH) for 39 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 167 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 186
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-168.sara.
lola: FINISHED task # 176 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: result : true
lola: markings : 24
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 173 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 174 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 177 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13 (obsolete)
lola: FINISHED task # 173 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 22
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-174.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 183 (type EXCL) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 179 (type FNDP) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 180 (type EQUN) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 182 (type SRCH) for 15 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 182 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: result : true
lola: markings : 98
lola: fired transitions : 97
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 179 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 180 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 183 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 195 (type EXCL) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 198 (type FNDP) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 199 (type EQUN) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 201 (type SRCH) for 30 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 179 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05
lola: result : unknown
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 201 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: result : true
lola: markings : 50
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 198 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 199 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 185 (type FNDP) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 186 (type EQUN) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 188 (type SRCH) for 0 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03: EF true tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10: AG false tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00: EF 0 2 3 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08: EF 0 4 1 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
185 EF FNDP 0/1198 0/5 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 --
186 EF STEQ 0/1198 0/5 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 sara not yet started (preprocessing).
188 EF SRCH 0/1797 1/5 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 --
195 EF EXCL 0/1797 1/32 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 --

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 198 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10
lola: result : true
lola: fired transitions : 48
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 188 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: result : true
lola: markings : 79
lola: fired transitions : 78
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 185 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 186 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 191 (type FNDP) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 192 (type EQUN) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type SRCH) for 24 BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 185 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 56
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-180.sara.
lola: FINISHED task # 194 (type SRCH) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08
lola: result : true
lola: markings : 41
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 191 (type FNDP) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 192 (type EQUN) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 195 (type EXCL) for BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-03: EF true tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-05: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-07: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-08: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-10: AG false tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-11: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-12: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-13: EF true tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N50-ReachabilityCardinality-15: EF false skeleton: tandem / insertion


Time elapsed: 6 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P50N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813691000110"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N50.tgz
mv BridgeAndVehicles-COL-V50P50N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;