Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r038-tajo-167813690900070.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r038-tajo-167813690900070
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 7.9K Feb 25 12:09 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 12:09 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 12:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 25 12:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 15:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 12:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 25 12:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 25 12:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 15:36 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 15:36 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678405533725

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BridgeAndVehicles-COL-V50P20N10
Not applying reductions.
Model is COL
ReachabilityCardinality COL
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V50P20N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678405535309

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 17 (type SKEL/CNST) for 15 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 54 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : false
lola: markings : 151
lola: fired transitions : 150
lola: time used : 0.000000
lola: TR BINDINGS
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 50 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 53 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 17 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 95 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 99 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 96 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 98 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 59 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 56044
lola: tried executions : 56045
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 128, Transitions: 1328
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 104 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 59 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 101 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 103 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 69 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 103 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 59 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 49368
lola: tried executions : 49369
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 69 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 200
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 149 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 89 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 116 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 7475
lola: tried executions : 7476
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.

lola: @ trans enregistrement_A
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans decision
lola: @ trans altern_cpt
lola: @ trans autorisation_A
lola: FINISHED task # 51 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : false
lola: @ trans liberation_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-121.sara.
lola: @ trans enregistrement_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.
lola: @ trans timeout_A
lola: FINISHED task # 101 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : unknown
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: FINISHED task # 116 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 861
lola: tried executions : 3
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic
lola: @ trans basculement
lola: CANCELED task # 121 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 131 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans autorisation_B
lola: FINISHED task # 121 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 96 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-132.sara.


lola: FINISHED task # 132 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 131 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 117 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 131 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 44215
lola: tried executions : 414
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 117 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 59
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 129 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 63 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic
lola: Rule S: 0 transitions removed,0 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 129 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages

lola: FINISHED task # 40 (type CNST) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 149 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 60 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 149 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 2529886
lola: tried executions : 2529887
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 stopped (result already fixed).
lola: FINISHED task # 64 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 63 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 82 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 283725
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-85.sara.

lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 stopped (result already fixed).
lola: FINISHED task # 85 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 82 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 109 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 82 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 58683
lola: tried executions : 1152
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 stopped (result already fixed).
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-115.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 115 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 109 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 74 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 109 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 185539
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-75.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 75 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 74 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 175 (type EXCL) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 126 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 74 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 24007
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 126 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 120 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 106 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 113 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 120 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 824900
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 113 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : false
lola: markings : 4124
lola: fired transitions : 4270
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 60 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 106 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 175 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 181 (type EXCL) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 177 (type FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 178 (type EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 180 (type SRCH) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 325713
lola: tried executions : 6386
lola: time used : 1.000000
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 106 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 180 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 462
lola: fired transitions : 461
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 177 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 178 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 181 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 195 (type EXCL) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 197 (type FNDP) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 198 (type EQUN) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 200 (type SRCH) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 177 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 601
lola: tried executions : 4
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 197 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 101
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 198 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 200 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 190 (type FNDP) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 192 (type EQUN) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type SRCH) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-178.sara.
lola: FINISHED task # 195 (type EXCL) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : true
lola: markings : 109
lola: fired transitions : 108
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 190 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 192 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 194 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: EF true tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF true findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: EF false preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: AG false tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: EF false skeleton: tandem / relaxed


Time elapsed: 2 secs. Pages in use: 3
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P20N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r038-tajo-167813690900070"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P20N10.tgz
mv BridgeAndVehicles-COL-V50P20N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;