fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r033-tajo-167813685900354
Last Updated
May 14, 2023

About the Execution of Marcie for BugTracking-PT-q3m032

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5873.119 3600000.00 3600111.00 0.00 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2023-input.r033-tajo-167813685900354.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2023-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is BugTracking-PT-q3m032, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r033-tajo-167813685900354
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 16M
-rw-r--r-- 1 mcc users 8.4K Feb 26 06:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 06:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K Feb 26 06:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 29K Feb 26 06:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.0K Feb 26 07:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 07:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 06:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 06:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 16M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-00
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-01
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-02
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-03
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-04
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-05
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-06
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-07
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-08
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-09
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-10
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-11
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-12
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-13
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-14
FORMULA_NAME BugTracking-PT-q3m032-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678301373493

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BugTracking-PT-q3m032
Not applying reductions.
Model is PT
CTLFireability PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: BugTracking_PT_q3m032
(NrP: 754 NrTr: 27370 NrArc: 136172)

parse formulas
formulas created successfully
place and transition orderings generation:0m 4.144sec

net check time: 0m 0.023sec

init dd package: 0m 3.226sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16394052 kB
MemFree: 10336868 kB
After kill :
MemTotal: 16394052 kB
MemFree: 16167784 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
x0_FIXED_q4
x0_FIX_AGAIN_q1
x1_PENDING_q3
x1_CLOSED_q3
x1_FIX_AGAIN_q4
x1_PENDING_q2
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x1_MUST_FIX_q6
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x3_FIXED_q2
x3_BUG_REPORT_q7
x1_CLOSED_q1
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x3_FIXED_q1
x1_MUST_FIX_q5
x3_FIXED_q4
x0_FIXED_q0
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x0_CLOSED_q5
x1_FIX_AGAIN_q3
x0_CLOSED_q0
x1_FIXED_q4
x0_FIX_AGAIN_q6
x1_CLOSED_q6
x0_FIXED_q1
x1_CLOSED_q4
ch1_MUST_FIX_q5
x0_MORE_INFO_q4
x3_CLOSED_q1
x0_MUST_FIX_q1
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x0_MUST_FIX_q2
x0_CLOSED_q6
x1_FIXED_q5
x1_CLOSED_q5
ch1_MUST_FIX_q4
x0_CLOSED_q2
x0_MUST_FIX_q3
x0_MUST_FIX_q4
x3_CLOSED_q2
x0_MUST_FIX_q6
x1_MUST_FIX_q1
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x0_CLOSED_q1
x0_BUG_REPORT_q4
x0_PENDING_q0
x0_MUST_FIX_q0
x1_MUST_FIX_q0
x1_FIX_AGAIN_q1
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x0_PENDING_q2
x3_CLOSED_q4
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x1_MUST_FIX_q3
x1_FIXED_q3
x0_MORE_INFO_q0
x3_CLOSED_q5
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x1_FIX_AGAIN_q2
x0_FIX_AGAIN_q4
ch1_MUST_FIX_q3
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x0_MUST_FIX_q5
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x1_BUG_REPORT_q3
x1_CLOSED_q2
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x1_BUG_REPORT_q5
x3_FIXED_q0
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x1_BUG_REPORT_q7
x1_PENDING_q0
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x1_MORE_INFO_q6
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x3_MUST_FIX_q3
x3_VERIFIED_q7
x4_FIX_AGAIN_q4
x4_MORE_INFO_q3
x4_PENDING_q0
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ch0_BUG_REPORT_q7
ch0_CLOSED_q5
ch0_FIXED_q3
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ch0_PENDING_q4
ch0_VERIFIED_q2
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x1_PENDING_q4
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x2_VERIFIED_q0
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x3_BUG_REPORT_q1
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x3_MUST_FIX_q2
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x4_FIX_AGAIN_q2
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x4_MORE_INFO_q7
x4_MUST_FIX_q1
x4_MUST_FIX_q2
x4_MUST_FIX_q3
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x4_VERIFIED_q5
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ch0_BUG_REPORT_q0
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ch0_BUG_REPORT_q5
ch0_BUG_REPORT_q6
ch0_CLOSED_q0
ch0_CLOSED_q1
ch0_CLOSED_q2
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ch0_FIXED_q0
ch0_FIXED_q1
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ch0_FIX_AGAIN_q2
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ch0_FIX_AGAIN_q5
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ch0_MORE_INFO_q0
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ch0_MORE_INFO_q4
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ch0_PENDING_q6
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ch1_PENDING_q0
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ch1_VERIFIED_q6
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ch2_BUG_REPORT_q3
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ch2_BUG_REPORT_q5
ch2_CLOSED_q1
ch2_CLOSED_q2
ch2_CLOSED_q3
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ch2_CLOSED_q5
ch2_CLOSED_q6
ch2_FIXED_q0
ch2_FIXED_q1
ch2_FIXED_q2
ch2_FIXED_q3
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ch2_FIX_AGAIN_q0
ch2_FIX_AGAIN_q1
ch2_FIX_AGAIN_q2
ch2_FIX_AGAIN_q3
ch2_FIX_AGAIN_q4
ch2_FIX_AGAIN_q5
ch2_MORE_INFO_q0
ch2_MORE_INFO_q1
ch2_MORE_INFO_q3
ch2_MORE_INFO_q4
ch2_MORE_INFO_q5
ch2_MUST_FIX_q0
ch2_MUST_FIX_q1
ch2_MUST_FIX_q2
ch2_MUST_FIX_q3
ch2_MUST_FIX_q4
ch2_MUST_FIX_q5
ch2_MUST_FIX_q6
ch2_PENDING_q0
ch2_PENDING_q1
ch2_PENDING_q2
ch2_PENDING_q3
ch2_PENDING_q5
ch2_VERIFIED_q0
ch2_VERIFIED_q1
ch2_VERIFIED_q3
ch2_VERIFIED_q4
ch2_VERIFIED_q5
ch3_BUG_REPORT_q0
ch3_BUG_REPORT_q1
ch3_BUG_REPORT_q2
ch3_BUG_REPORT_q6
ch3_BUG_REPORT_q7
ch3_CLOSED_q1
ch3_CLOSED_q2
ch3_CLOSED_q3
ch3_CLOSED_q4
ch3_CLOSED_q5
ch3_CLOSED_q6
ch3_CLOSED_q7
ch3_FIXED_q0
ch3_FIXED_q1
ch3_FIXED_q2
ch3_FIXED_q4
ch3_FIXED_q7
ch3_FIX_AGAIN_q0
ch3_FIX_AGAIN_q1
ch3_FIX_AGAIN_q2
ch3_FIX_AGAIN_q4
ch3_FIX_AGAIN_q6
ch3_FIX_AGAIN_q7
ch3_MORE_INFO_q0
ch3_MORE_INFO_q1
ch3_MORE_INFO_q2
ch3_MORE_INFO_q4
ch3_MORE_INFO_q6
ch3_MORE_INFO_q7
ch3_MUST_FIX_q0
ch3_MUST_FIX_q1
ch3_MUST_FIX_q3
ch3_MUST_FIX_q4
ch3_MUST_FIX_q5
ch3_MUST_FIX_q6
ch3_MUST_FIX_q7
ch3_PENDING_q0
ch3_PENDING_q1
ch3_PENDING_q2
ch3_PENDING_q4
ch3_PENDING_q6
ch3_PENDING_q7
ch3_VERIFIED_q0
ch3_VERIFIED_q1
ch3_VERIFIED_q2
ch3_VERIFIED_q3
ch3_VERIFIED_q4
ch3_VERIFIED_q6
ch4_BUG_REPORT_q0
ch4_BUG_REPORT_q1
ch4_BUG_REPORT_q2
ch4_BUG_REPORT_q3
ch4_BUG_REPORT_q5
ch4_BUG_REPORT_q7
ch4_CLOSED_q0
ch4_CLOSED_q2
ch4_CLOSED_q3
ch4_CLOSED_q4
ch4_CLOSED_q5
ch4_CLOSED_q6
ch4_CLOSED_q7
ch4_FIXED_q0
ch4_FIXED_q1
ch4_FIXED_q2
ch4_FIXED_q3
ch4_FIXED_q4
ch4_FIXED_q5
ch4_FIXED_q7
ch4_FIX_AGAIN_q0
ch4_FIX_AGAIN_q1
ch4_FIX_AGAIN_q2
ch4_FIX_AGAIN_q3
ch4_FIX_AGAIN_q4
ch4_FIX_AGAIN_q5
ch4_FIX_AGAIN_q7
ch4_MORE_INFO_q1
ch4_MORE_INFO_q2
ch4_MORE_INFO_q3
ch4_MORE_INFO_q4
ch4_MORE_INFO_q5
ch4_MORE_INFO_q7
ch4_MUST_FIX_q0
ch4_MUST_FIX_q1
ch4_MUST_FIX_q2
ch4_MUST_FIX_q4
ch4_MUST_FIX_q5
ch4_MUST_FIX_q6
ch4_MUST_FIX_q7
ch4_PENDING_q0
ch4_PENDING_q3
ch4_PENDING_q4
ch4_PENDING_q5
ch4_PENDING_q7
ch4_VERIFIED_q1
ch4_VERIFIED_q2
ch4_VERIFIED_q3
ch4_VERIFIED_q4
ch4_VERIFIED_q5
ch4_VERIFIED_q7

The net has transition(s) that can never fire:
t4847
t4849
t4851
t4853
t4046
t4047
t4048
t4049
t4052
t4053
t4694
t4766
t4768
t4769
t4770
t4772
t5253
t5255
t5257
t5260
t4932
t4934
t5254
t4130
t4131
t4132
t4133
t4134
t4135
t4136
t4137
t4138
t4139
t4300
t4140
t4141
t4142
t4143
t4144
t4145
t4146
t4147
t4148
t4151
t4152
t4153
t4154
t4155
t4156
t4157
t4158
t4159
t4160
t4161
t4162
t4163
t4164
t4165
t4166
t4169
t4170
t4171
t4172
t4173
t4174
t4175
t4176
t4177
t4178
t4179
t4180
t4181
t4182
t4183
t4184
t4187
t4188
t4189
t4190
t4191
t4192
t4193
t4196
t4197
t4198
t4199
t4200
t4201
t4202
t4203
t4204
t4205
t4206
t4207
t4208
t4209
t4210
t4211
t4212
t4213
t4214
t4215
t4216
t4217
t4218
t4219
t4220
t4221
t4222
t4223
t4224
t4225
t4227
t4229
t4232
t4233
t4234
t4235
t4236
t4237
t4238
t4239
t4240
t4241
t4242
t4243
t4245
t4247
t4250
t4251
t4252
t4253
t4254
t4255
t4256
t4257
t4258
t4259
t4260
t4261
t4263
t5521
t5522
t5523
t5524
t5525
t5526
t5528
t5529
t5530
t5531
t5532
t5533
t5534
t5535
t5537
t5538
t5539
t5540
t5541
t5542
t5543
t5544
t5545
t5546
t5547
t5548
t5549
t5550
t5551
t5552
t5553
t5554
t5555
t5556
t5557
t5558
t5559
t5560
t5561
t5562
t5563
t5564
t5565
t5566
t5567
t5568
t5569
t5570
t5571
t5572
t5573
t5574
t5575
t5576
t5577
t5578
t5579
t5580
t5581
t5582
t5583
t5584
t5585
t5586
t5587
t5588
t5589
t5590
t5591
t5592
t5593
t5594
t5595
t5596
t5597
t5598
t5600
t5601
t5602
t5603
t5604
t5605
t5606
t5607
t2942
t2943
t2944
t2945
t2946
t2947
t2949
t2951
t2954
t2955
t2956
t2957
t2958
t2959
t2960
t2961
t2962
t2963
t2964
t2965
t2967
t2969
t2972
t2973
t2974
t2976
t2978
t2981
t2982
t2983
t2984
t2985
t3234
t2987
t2988
t2989
t2990
t2991
t2992
t2993
t2994
t2995
t2996
t2997
t2998
t2999
t3000
t3001
t3002
t3003
t3005
t3008
t3009
t3010
t3011
t3012
t3014
t3017
t3018
t3019
t3020
t3021
t3023
t3024
t3025
t3026
t3027
t3028
t3029
t3030
t3032
t3035
t3036
t3037
t3038
t3039
t3041
t3042
t3043
t3044
t3045
t3046
t3047
t3048
t3050
t3053
t3054
t3055
t3056
t3057
t3059
t3062
t3063
t3064
t3065
t3066
t3067
t3068
t3069
t3070
t3071
t3072
t3073
t3074
t3075
t3076
t3077
t3078
t3079
t3080
t3081
t3084
t3086
t3089
t3090
t3093
t3095
t3098
t3099
t3100
t3101
t3102
t3103
t3104
t3105
t3106
t3107
t3108
t3111
t3113
t3116
t3117
t3118
t3119
t3120
t3121
t3122
t3123
t3124
t3125
t3126
t3129
t3131
t3134
t3135
t3138
t3140
t3143
t3144
t3145
t3146
t3147
t3148
t3149
t3150
t3151
t3152
t3153
t3154
t3155
t3156
t3157
t3158
t3159
t3160
t3161
t3162
t3163
t3164
t3165
t3166
t3167
t3170
t3171
t3172
t3173
t3174
t3175
t3176
t3179
t3180
t3181
t3182
t3183
t3184
t3185
t3186
t3187
t3188
t3189
t3190
t3191
t3192
t3193
t3194
t3197
t3198
t3199
t3200
t3201
t3202
t3203
t3204
t3205
t3206
t3207
t3208
t3209
t3210
t3211
t3212
t3215
t3216
t3217
t3218
t3219
t3220
t3221
t3224
t3225
t3226
t3227
t3228
t3229
t3230
t3231
t3232
t3233
t3235
t3236
t3237
t3238
t3239
t3240
t3241
t3242
t3243
t3244
t3246
t3248
t3251
t3252
t3253
t3255
t3257
t3260
t3261
t3262
t3263
t3264
t3265
t3266
t3267
t3268
t3269
t3270
t3271
t3273
t3275
t3278
t3279
t3280
t3281
t3282
t3283
t3284
t3285
t3286
t3287
t3288
t3289
t3291
t3293
t3296
t3297
t3298
t3300
t3302
t3305
t3306
t3307
t3308
t3309
t3310
t3311
t3312
t3313
t3314
t3315
t3316
t3317
t3318
t3319
t3320
t3321
t3322
t3323
t3324
t3325
t3326
t3327
t3329
t3332
t3333
t3334
t3335
t3336
t3338
t3341
t3342
t3343
t3344
t3345
t3346
t3347
t3348
t3349
t3350
t3351
t3352
t3353
t3354
t3356
t3359
t3360
t3361
t3362
t3363
t3364
t3365
t3366
t3367
t3368
t3369
t3370
t3371
t3372
t3374
t3377
t3378
t3379
t3380
t3381
t3383
t3386
t3387
t3388
t3389
t3390
t3391
t3392
t3393
t3394
t3395
t3396
t3397
t3398
t3399
t3400
t3401
t3402
t3403
t3404
t3405
t3406
t3407
t3408
t3409
t3410
t3411
t3412
t3413
t3414
t3415
t3416
t3417
t3418
t3419
t3420
t3421
t3422
t3423
t3424
t3425
t3426
t3427
t3428
t3429
t3430
t3431
t3432
t3433
t3434
t3435
t3436
t3437
t3438
t3439
t3440
t3441
t3442
t3443
t3444
t3445
t3446
t3447
t3448
t3449
t3450
t3453
t3455
t3458
t3459
t3462
t3464
t3467
t3468
t3469
t3470
t3471
t3472
t3473
t3474
t3475
t3476
t3477
t3478
t3479
t3480
t3481
t3482
t3643
t3483
t3484
t3485
t3486
t3487
t3488
t3489
t3490
t3491
t3492
t3493
t3494
t3495
t3496
t3497
t3498
t3499
t3500
t3661
t3501
t3502
t3503
t3504
t3505
t3506
t3507
t3508
t3509
t3510
t3511
t3512
t3513
t3514
t3515
t3516
t3517
t3518
t3679
t3519
t3520
t3521
t3522
t3523
t3524
t3525
t3526
t3527
t3528
t3529
t3530
t3531
t3532
t3533
t3534
t3535
t3536
t3539
t3540
t3541
t3542
t3543
t3544
t3545
t3548
t3549
t3550
t3551
t3552
t3553
t3554
t3555
t3556
t3557
t3558
t3559
t3560
t3561
t3562
t3563
t3564
t3565
t3566
t3567
t3568
t3569
t3570
t3571
t3572
t3573
t3574
t3575
t3576
t3577
t3578
t3579
t3580
t3581
t3582
t3583
t3584
t3585
t3586
t3587
t3588
t3589
t3590
t3591
t3592
t3593
t3594
t3595
t3596
t3597
t3598
t3599
t3600
t3601
t3602
t3603
t3604
t3605
t3606
t3607
t3608
t3609
t3610
t3611
t3612
t3613
t3615
t3617
t3620
t3621
t3622
t3624
t3626
t3629
t3630
t3631
t3632
t3633
t3634
t3635
t3636
t3637
t3638
t3639
t3640
t3641
t3642
t3644
t3645
t3646
t3647
t3648
t3649
t3650
t3651
t3652
t3653
t3654
t3655
t3656
t3657
t3658
t3659
t3660
t3662
t3663
t3664
t3665
t3666
t3667
t3668
t3669
t3670
t3671
t3672
t3673
t3674
t3675
t3676
t3677
t3678
t3680
t3681
t3682
t3683
t3684
t3685
t3686
t3687
t3688
t3689
t3690
t3691
t3692
t3693
t3694
t3695
t3696
t3698
t3701
t3702
t3703
t3704
t3705
t3707
t3710
t3711
t3712
t3713
t3714
t3715
t3716
t3717
t3718
t3719
t3720
t3721
t3722
t3723
t3724
t3725
t3726
t3727
t3728
t3729
t3730
t3731
t3732
t3733
t3734
t3735
t3736
t3737
t3738
t3739
t3740
t3741
t3742
t3743
t3744
t3745
t3746
t3747
t3748
t3749
t3750
t3751
t3752
t3753
t3754
t3755
t3756
t3757
t3758
t3759
t3760
t3761
t3762
t3763
t3764
t3765
t3766
t3767
t3768
t3769
t3770
t3771
t3772
t3773
t3774
t3777
t3779
t3782
t3783
t3786
t3788
t3791
t3792
t3793
t3794
t3795
t3796
t3797
t3798
t3799
t3800
t3801
t3802
t3803
t3804
t3805
t3806
t3807
t3808
t3809
t3810
t3811
t3812
t3813
t3814
t3815
t3816
t3817
t3818
t3819
t3820
t3821
t3822
t3823
t3824
t3825
t3826
t3827
t3828
t3829
t3830
t3831
t3832
t3833
t3834
t3835
t3836
t3837
t3838
t3839
t3840
t3841
t3842
t3843
t3844
t3845
t3846
t3847
t3848
t3849
t3850
t3851
t3852
t3853
t3854
t3855
t3856
t3857
t3858
t3859
t3860
t3863
t3864
t3865
t3866
t3867
t3868
t3869
t3872
t3873
t3874
t3875
t3876
t3877
t3878
t3879
t3880
t3881
t3882
t3883
t3884
t3885
t3886
t3887
t3888
t3889
t3890
t3891
t3892
t3893
t3894
t3895
t3896
t3897
t3898
t3899
t3900
t3901
t3902
t3903
t3904
t3905
t3906
t3907
t3908
t3909
t3910
t3911
t3912
t3913
t3914
t3915
t3916
t3917
t3918
t3919
t3920
t3921
t3922
t3923
t3924
t3925
t3926
t3927
t3928
t3929
t3930
t3931
t3932
t3933
t3934
t3935
t3936
t3937
t3939
t3941
t3944
t3945
t3946
t3948
t3950
t3953
t3954
t3955
t3956
t3957
t3958
t3959
t3960
t3961
t3962
t3963
t3964
t3965
t3966
t3967
t3968
t3969
t3970
t3971
t3972
t3973
t3974
t3975
t3976
t3977
t3978
t3979
t3980
t3981
t3982
t3983
t3984
t3985
t3986
t3987
t3988
t3989
t3990
t3991
t3992
t3993
t3994
t3995
t3996
t3997
t3998
t3999
t4000
t4001
t4002
t4003
t4004
t4005
t4006
t4007
t4008
t4009
t4010
t4011
t4012
t4013
t4014
t4015
t4016
t4017
t4018
t4019
t4020
t4022
t4025
t4026
t4027
t4028
t4029
t4031
t4034
t4035
t4036
t4037
t4038
t4039
t4040
t4041
t4042
t4043
t4044
t4045
t4050
t4051
t4054
t4055
t4056
t4057
t4058
t4059
t4060
t4061
t4062
t8159
t8160
t8161
t8162
t8163
t8164
t8165
t8166
t8167
t8168
t8169
t8170
t8171
t8172
t8173
t8174
t8175
t8176
t8177
t8178
t8179
t8180
t8181
t8182
t8183
t8184
t8185
t8186
t8187
t8188
t8189
t8190
t8192
t16386
t16387
t16388
t16389
t16390
t16391
t16392
t16393
t16394
t16395
t16396
t16461
t16462
t16398
t16399
t16400
t16401
t16402
t16403
t16404
t16405
t16406
t16408
t16410
t16411
t16413
t16414
t16415
t16416
t16417
t16418
t16419
t16420
t16422
t16423
t16424
t16425
t16426
t16427
t16428
t16429
t16430
t16431
t16432
t16433
t16434
t16435
t16436
t16437
t16438
t16439
t16440
t16441
t16442
t16443
t16444
t16445
t16446
t16447
t16449
t16450
t16451
t16452
t16453
t16454
t16455
t16456
t16457
t16458
t16459
t16460
t16590
t16591
t16463
t16464
t16465
t8216
t8218
t8219
t8220
t8221
t8222
t8223
t8224
t8225
t8226
t8227
t8228
t8229
t8230
t8231
t8232
t8233
t8234
t8236
t8237
t8238
t8239
t8240
t8241
t8242
t8243
t8244
t8245
t8246
t8247
t8248
t8249
t8250
t8251
t8252
t8254
t8255
t8256
t8257
t8258
t8259
t8260
t8261
t8262
t8263
t8264
t8265
t8266
t8267
t8268
t8269
t8270
t8273
t8275
t8276
t8277
t8278
t8279
t8280
t8282
t8284
t8285
t8286
t8287
t8288
t8289
t8291
t8292
t8293
t8294
t8295
t8296
t8297
t8298
t8299
t8300
t8301
t8302
t8303
t8304
t8305
t8306
t8307
t8308
t8309
t8310
t8311
t8312
t8313
t8314
t8315
t8316
t8317
t8318
t8319
t8320
t8321
t8322
t8323
t8324
t8325
t8326
t8327
t8328
t8329
t8330
t8331
t8332
t8333
t8334
t8335
t8336
t8337
t8338
t8339
t8340
t8341
t8342
t8343
t8344
t8345
t8347
t8348
t8349
t8350
t8351
t8352
t8354
t8355
t8356
t8357
t8358
t8359
t8360
t8361
t8363
t8364
t8365
t8366
t8367
t8368
t8369
t8370
t8372
t8373
t8374
t8375
t8376
t8377
t8378
t8379
t8380
t8381
t8382
t8383
t8384
t8385
t8386
t8387
t8388
t8389
t8390
t8391
t8392
t8393
t8394
t8395
t8396
t8397
t8398
t8399
t8400
t8401
t8402
t8403
t8404
t8405
t8406
t8407
t8408
t8409
t8410
t8411
t8412
t8413
t8414
t8415
t8416
t8417
t8418
t8419
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check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.261sec

125621 258946

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BugTracking-PT-q3m032"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is BugTracking-PT-q3m032, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r033-tajo-167813685900354"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BugTracking-PT-q3m032.tgz
mv BugTracking-PT-q3m032 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;