Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813596100806.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is BART-PT-050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813596100806
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 108M
-rw-r--r-- 1 mcc users 2.2M Feb 26 06:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 7.6M Feb 26 06:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7M Feb 26 05:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 8.7M Feb 26 05:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 1.1M Feb 25 15:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.7M Feb 25 15:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8M Feb 25 15:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 4.2M Feb 25 15:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.2M Feb 26 10:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19M Feb 26 10:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8M Feb 26 07:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32M Feb 26 07:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 138K Feb 25 15:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 278K Feb 25 15:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 12M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-050-ReachabilityCardinality-00
FORMULA_NAME BART-PT-050-ReachabilityCardinality-01
FORMULA_NAME BART-PT-050-ReachabilityCardinality-02
FORMULA_NAME BART-PT-050-ReachabilityCardinality-03
FORMULA_NAME BART-PT-050-ReachabilityCardinality-04
FORMULA_NAME BART-PT-050-ReachabilityCardinality-05
FORMULA_NAME BART-PT-050-ReachabilityCardinality-06
FORMULA_NAME BART-PT-050-ReachabilityCardinality-07
FORMULA_NAME BART-PT-050-ReachabilityCardinality-08
FORMULA_NAME BART-PT-050-ReachabilityCardinality-09
FORMULA_NAME BART-PT-050-ReachabilityCardinality-10
FORMULA_NAME BART-PT-050-ReachabilityCardinality-11
FORMULA_NAME BART-PT-050-ReachabilityCardinality-12
FORMULA_NAME BART-PT-050-ReachabilityCardinality-13
FORMULA_NAME BART-PT-050-ReachabilityCardinality-14
FORMULA_NAME BART-PT-050-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678356920200

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=BART-PT-050
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 10:15:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 10:15:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 10:15:23] [INFO ] Load time of PNML (sax parser for PT used): 567 ms
[2023-03-09 10:15:23] [INFO ] Transformed 6810 places.
[2023-03-09 10:15:23] [INFO ] Transformed 10100 transitions.
[2023-03-09 10:15:23] [INFO ] Found NUPN structural information;
[2023-03-09 10:15:23] [INFO ] Parsed PT model containing 6810 places and 10100 transitions and 81000 arcs in 907 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 4035 ms.
Working with output stream class java.io.PrintStream
Reduce places removed 210 places and 0 transitions.
FORMULA BART-PT-050-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-050-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 480 ms. (steps per millisecond=20 ) properties (out of 7) seen :2
FORMULA BART-PT-050-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA BART-PT-050-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
// Phase 1: matrix 10100 rows 6600 cols
[2023-03-09 10:15:28] [INFO ] Computed 50 place invariants in 88 ms
[2023-03-09 10:15:30] [INFO ] After 2098ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2023-03-09 10:15:32] [INFO ] [Nat]Absence check using 50 positive place invariants in 93 ms returned sat
[2023-03-09 10:15:41] [INFO ] After 7905ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-03-09 10:15:44] [INFO ] After 10835ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 1527 ms.
[2023-03-09 10:15:45] [INFO ] After 15014ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
FORMULA BART-PT-050-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA BART-PT-050-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA BART-PT-050-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
FORMULA BART-PT-050-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Finished Parikh walk after 563 steps, including 0 resets, run visited all 1 properties in 7 ms. (steps per millisecond=80 )
FORMULA BART-PT-050-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 5 properties in 146 ms.
All properties solved without resorting to model-checking.
Total runtime 23410 ms.
starting LoLA
BK_INPUT BART-PT-050
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BART-PT-050-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-050-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678357079701

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 BART-PT-050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 BART-PT-050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 BART-PT-050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 BART-PT-050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 51 (type SKEL/EQUN) for BART-PT-050-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 50 (type FNDP) for BART-PT-050-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 53 (type SRCH) for BART-PT-050-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for BART-PT-050-ReachabilityCardinality-00 (obsolete)
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 57 (type SKEL/FNDP) for 15 BART-PT-050-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 15 BART-PT-050-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 15 BART-PT-050-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 15 BART-PT-050-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 58 (type SKEL/EQUN) for BART-PT-050-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 60 (type SKEL/SRCH) for BART-PT-050-ReachabilityCardinality-05
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for BART-PT-050-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 61 (type SRCH) for BART-PT-050-ReachabilityCardinality-05 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type SKEL/FNDP) for 21 BART-PT-050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 21 BART-PT-050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 21 BART-PT-050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 21 BART-PT-050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for BART-PT-050-ReachabilityCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for BART-PT-050-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 66 (type EQUN) for BART-PT-050-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 69 (type SRCH) for BART-PT-050-ReachabilityCardinality-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 66 (type SKEL/EQUN) for BART-PT-050-ReachabilityCardinality-07
lola: result : false
lola: Created skeleton in 1.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for BART-PT-050-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for BART-PT-050-ReachabilityCardinality-07 stopped (result already fixed).
lola: planning for BART-PT-050-ReachabilityCardinality-05 stopped (result already fixed).
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 BART-PT-050-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 BART-PT-050-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 BART-PT-050-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 34 (type CNST) for BART-PT-050-ReachabilityCardinality-11
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type EXCL) for 42 BART-PT-050-ReachabilityCardinality-14
lola: time limit : 192 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 72 (type FNDP) for 42 BART-PT-050-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 19 (type CNST) for BART-PT-050-ReachabilityCardinality-06
lola: result : false
lola: LAUNCH task # 73 (type EQUN) for 42 BART-PT-050-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 76 (type EXCL) for BART-PT-050-ReachabilityCardinality-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for BART-PT-050-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 73 (type EQUN) for BART-PT-050-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 9 BART-PT-050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/EQUN) for 9 BART-PT-050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 9 BART-PT-050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 13 (type CNST) for BART-PT-050-ReachabilityCardinality-04
lola: result : true
lola: LAUNCH task # 83 (type SKEL/SRCH) for 9 BART-PT-050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 82 (type SKEL/SRCH) for BART-PT-050-ReachabilityCardinality-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for BART-PT-050-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 80 (type EQUN) for BART-PT-050-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 83 (type SRCH) for BART-PT-050-ReachabilityCardinality-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 80 (type SKEL/EQUN) for BART-PT-050-ReachabilityCardinality-03
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 73 (type EQUN) for BART-PT-050-ReachabilityCardinality-14
lola: result : true
lola: FINISHED task # 72 (type FNDP) for BART-PT-050-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: planning for BART-PT-050-ReachabilityCardinality-03 stopped (result already fixed).
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-PT-050-ReachabilityCardinality-00: AG true skeleton: state equation
BART-PT-050-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-PT-050-ReachabilityCardinality-04: INITIAL true preprocessing
BART-PT-050-ReachabilityCardinality-05: EF false skeleton: state equation
BART-PT-050-ReachabilityCardinality-06: INITIAL false preprocessing
BART-PT-050-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BART-PT-050-ReachabilityCardinality-11: INITIAL true preprocessing
BART-PT-050-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-PT-050-ReachabilityCardinality-01: INITIAL 0 0 0 0 0 0 0 0
BART-PT-050-ReachabilityCardinality-02: INITIAL 0 0 0 0 0 0 0 0
BART-PT-050-ReachabilityCardinality-08: AG 0 0 0 0 1 0 0 0
BART-PT-050-ReachabilityCardinality-09: EF 0 0 0 0 1 0 0 0
BART-PT-050-ReachabilityCardinality-10: AG 0 0 0 0 1 0 0 0
BART-PT-050-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
BART-PT-050-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
BART-PT-050-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 132 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 BART-PT-050-ReachabilityCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 BART-PT-050-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 7 (type CNST) for BART-PT-050-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 120 (type EXCL) for 30 BART-PT-050-ReachabilityCardinality-10
lola: time limit : 577 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 94 (type FNDP) for 45 BART-PT-050-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type EQUN) for 45 BART-PT-050-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 4 (type CNST) for BART-PT-050-ReachabilityCardinality-01
lola: result : false
lola: LAUNCH task # 101 (type FNDP) for 39 BART-PT-050-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 120 (type EXCL) for BART-PT-050-ReachabilityCardinality-10
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 36 BART-PT-050-ReachabilityCardinality-12
lola: time limit : 693 sec
lola: memory limit: 32 pages
lola: FINISHED task # 131 (type EXCL) for BART-PT-050-ReachabilityCardinality-12
lola: result : true
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 111 (type EXCL) for 27 BART-PT-050-ReachabilityCardinality-09
lola: time limit : 866 sec
lola: memory limit: 32 pages
lola: FINISHED task # 111 (type EXCL) for BART-PT-050-ReachabilityCardinality-09
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 126 (type EXCL) for 24 BART-PT-050-ReachabilityCardinality-08
lola: time limit : 1155 sec
lola: memory limit: 32 pages
lola: FINISHED task # 126 (type EXCL) for BART-PT-050-ReachabilityCardinality-08
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 105 (type EXCL) for 39 BART-PT-050-ReachabilityCardinality-13
lola: time limit : 1733 sec
lola: memory limit: 32 pages
lola: FINISHED task # 105 (type EXCL) for BART-PT-050-ReachabilityCardinality-13
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 101 (type FNDP) for BART-PT-050-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 98 (type EXCL) for 45 BART-PT-050-ReachabilityCardinality-15
lola: time limit : 3467 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 97 (type SRCH) for 45 BART-PT-050-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 98 (type EXCL) for BART-PT-050-ReachabilityCardinality-15
lola: result : true
lola: markings : 30
lola: fired transitions : 44
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 94 (type FNDP) for BART-PT-050-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 95 (type EQUN) for BART-PT-050-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 97 (type SRCH) for BART-PT-050-ReachabilityCardinality-15 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-PT-050-ReachabilityCardinality-00: AG true skeleton: state equation
BART-PT-050-ReachabilityCardinality-01: INITIAL false preprocessing
BART-PT-050-ReachabilityCardinality-02: INITIAL false preprocessing
BART-PT-050-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-PT-050-ReachabilityCardinality-04: INITIAL true preprocessing
BART-PT-050-ReachabilityCardinality-05: EF false skeleton: state equation
BART-PT-050-ReachabilityCardinality-06: INITIAL false preprocessing
BART-PT-050-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BART-PT-050-ReachabilityCardinality-08: AG false tandem / relaxed
BART-PT-050-ReachabilityCardinality-09: EF true tandem / relaxed
BART-PT-050-ReachabilityCardinality-10: AG false tandem / relaxed
BART-PT-050-ReachabilityCardinality-11: INITIAL true preprocessing
BART-PT-050-ReachabilityCardinality-12: AG false tandem / relaxed
BART-PT-050-ReachabilityCardinality-13: AG false tandem / relaxed
BART-PT-050-ReachabilityCardinality-14: AG false tandem / relaxed
BART-PT-050-ReachabilityCardinality-15: EF true tandem / relaxed


Time elapsed: 133 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is BART-PT-050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813596100806"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-050.tgz
mv BART-PT-050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;