About the Execution of LoLa+red for AutonomousCar-PT-05a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
415.792 | 14680.00 | 27885.00 | 74.10 | TTTTTTFFFTTTTTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595800594.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AutonomousCar-PT-05a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595800594
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 7.4K Feb 25 12:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 25 12:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 12:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 12:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 15:33 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 15:33 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 15:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 15:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 25 12:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 192K Feb 25 12:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 25 12:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 12:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:33 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:33 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 114K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-00
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-01
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-02
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-03
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-04
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-05
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-06
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-07
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-08
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-09
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-10
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-11
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-12
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-13
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-14
FORMULA_NAME AutonomousCar-PT-05a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678351646996
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutonomousCar-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 08:47:30] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 08:47:30] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 08:47:30] [INFO ] Load time of PNML (sax parser for PT used): 71 ms
[2023-03-09 08:47:30] [INFO ] Transformed 57 places.
[2023-03-09 08:47:30] [INFO ] Transformed 289 transitions.
[2023-03-09 08:47:30] [INFO ] Found NUPN structural information;
[2023-03-09 08:47:30] [INFO ] Parsed PT model containing 57 places and 289 transitions and 2123 arcs in 219 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Ensure Unique test removed 113 transitions
Reduce redundant transitions removed 113 transitions.
Support contains 45 out of 57 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 57/57 places, 176/176 transitions.
Applied a total of 0 rules in 10 ms. Remains 57 /57 variables (removed 0) and now considering 176/176 (removed 0) transitions.
[2023-03-09 08:47:30] [INFO ] Flow matrix only has 175 transitions (discarded 1 similar events)
// Phase 1: matrix 175 rows 57 cols
[2023-03-09 08:47:30] [INFO ] Computed 10 place invariants in 6 ms
[2023-03-09 08:47:31] [INFO ] Implicit Places using invariants in 182 ms returned []
[2023-03-09 08:47:31] [INFO ] Flow matrix only has 175 transitions (discarded 1 similar events)
[2023-03-09 08:47:31] [INFO ] Invariant cache hit.
[2023-03-09 08:47:31] [INFO ] State equation strengthened by 103 read => feed constraints.
[2023-03-09 08:47:31] [INFO ] Implicit Places using invariants and state equation in 142 ms returned [55]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 355 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 56/57 places, 176/176 transitions.
Applied a total of 0 rules in 2 ms. Remains 56 /56 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 369 ms. Remains : 56/57 places, 176/176 transitions.
Support contains 45 out of 56 places after structural reductions.
[2023-03-09 08:47:31] [INFO ] Flatten gal took : 67 ms
[2023-03-09 08:47:31] [INFO ] Flatten gal took : 51 ms
[2023-03-09 08:47:31] [INFO ] Input system was already deterministic with 176 transitions.
Incomplete random walk after 10000 steps, including 562 resets, run finished after 563 ms. (steps per millisecond=17 ) properties (out of 71) seen :60
Incomplete Best-First random walk after 10001 steps, including 69 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 62 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 11) seen :1
Incomplete Best-First random walk after 10001 steps, including 73 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 72 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 9) seen :2
Incomplete Best-First random walk after 10001 steps, including 67 resets, run finished after 36 ms. (steps per millisecond=277 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 69 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 59 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 65 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-09 08:47:32] [INFO ] Flow matrix only has 175 transitions (discarded 1 similar events)
// Phase 1: matrix 175 rows 56 cols
[2023-03-09 08:47:32] [INFO ] Computed 9 place invariants in 2 ms
[2023-03-09 08:47:32] [INFO ] [Real]Absence check using 9 positive place invariants in 2 ms returned sat
[2023-03-09 08:47:32] [INFO ] After 147ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:2
[2023-03-09 08:47:32] [INFO ] [Nat]Absence check using 9 positive place invariants in 1 ms returned sat
[2023-03-09 08:47:33] [INFO ] After 163ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :2
[2023-03-09 08:47:33] [INFO ] State equation strengthened by 103 read => feed constraints.
[2023-03-09 08:47:33] [INFO ] After 55ms SMT Verify possible using 103 Read/Feed constraints in natural domain returned unsat :5 sat :2
[2023-03-09 08:47:33] [INFO ] After 117ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :2
Attempting to minimize the solution found.
Minimization took 65 ms.
[2023-03-09 08:47:33] [INFO ] After 466ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :2
Fused 7 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 6 ms.
Support contains 9 out of 56 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 56/56 places, 176/176 transitions.
Graph (complete) has 390 edges and 56 vertex of which 54 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.2 ms
Discarding 2 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Drop transitions removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 5 rules applied. Total rules applied 6 place count 54 transition count 169
Reduce places removed 2 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 4 rules applied. Total rules applied 10 place count 52 transition count 167
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 12 place count 50 transition count 167
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 12 place count 50 transition count 166
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 14 place count 49 transition count 166
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 19 place count 44 transition count 141
Iterating global reduction 3 with 5 rules applied. Total rules applied 24 place count 44 transition count 141
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 30 place count 41 transition count 138
Free-agglomeration rule applied 3 times.
Iterating global reduction 3 with 3 rules applied. Total rules applied 33 place count 41 transition count 135
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 3 with 8 rules applied. Total rules applied 41 place count 38 transition count 130
Applied a total of 41 rules in 47 ms. Remains 38 /56 variables (removed 18) and now considering 130/176 (removed 46) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 47 ms. Remains : 38/56 places, 130/176 transitions.
Incomplete random walk after 10000 steps, including 406 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 88 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 75 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 2) seen :0
Finished probabilistic random walk after 76316 steps, run visited all 2 properties in 369 ms. (steps per millisecond=206 )
Probabilistic random walk after 76316 steps, saw 13365 distinct states, run finished after 382 ms. (steps per millisecond=199 ) properties seen :2
Successfully simplified 5 atomic propositions for a total of 16 simplifications.
[2023-03-09 08:47:33] [INFO ] Flatten gal took : 23 ms
[2023-03-09 08:47:33] [INFO ] Flatten gal took : 18 ms
[2023-03-09 08:47:33] [INFO ] Input system was already deterministic with 176 transitions.
Computed a total of 3 stabilizing places and 2 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 51 transition count 151
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 51 transition count 151
Applied a total of 10 rules in 6 ms. Remains 51 /56 variables (removed 5) and now considering 151/176 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 51/56 places, 151/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 13 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 11 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 51 transition count 151
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 51 transition count 151
Applied a total of 10 rules in 3 ms. Remains 51 /56 variables (removed 5) and now considering 151/176 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 51/56 places, 151/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 12 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 11 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 56 transition count 170
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 17 place count 45 transition count 145
Iterating global reduction 2 with 5 rules applied. Total rules applied 22 place count 45 transition count 145
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 28 place count 42 transition count 142
Applied a total of 28 rules in 18 ms. Remains 42 /56 variables (removed 14) and now considering 142/176 (removed 34) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 42/56 places, 142/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 142 transitions.
Finished random walk after 101 steps, including 9 resets, run visited all 1 properties in 1 ms. (steps per millisecond=101 )
FORMULA AutonomousCar-PT-05a-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 56 transition count 173
Reduce places removed 3 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 4 rules applied. Total rules applied 7 place count 53 transition count 172
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 8 place count 52 transition count 172
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 8 place count 52 transition count 171
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 10 place count 51 transition count 171
Discarding 6 places :
Symmetric choice reduction at 3 with 6 rule applications. Total rules 16 place count 45 transition count 140
Iterating global reduction 3 with 6 rules applied. Total rules applied 22 place count 45 transition count 140
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 26 place count 43 transition count 138
Applied a total of 26 rules in 13 ms. Remains 43 /56 variables (removed 13) and now considering 138/176 (removed 38) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 43/56 places, 138/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 54 transition count 169
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 54 transition count 169
Applied a total of 4 rules in 1 ms. Remains 54 /56 variables (removed 2) and now considering 169/176 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/56 places, 169/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 20 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 10 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 169 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 52 transition count 157
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 52 transition count 157
Applied a total of 8 rules in 2 ms. Remains 52 /56 variables (removed 4) and now considering 157/176 (removed 19) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 52/56 places, 157/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 157 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 56 transition count 171
Reduce places removed 5 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 6 rules applied. Total rules applied 11 place count 51 transition count 170
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 16 place count 46 transition count 146
Iterating global reduction 3 with 4 rules applied. Total rules applied 20 place count 46 transition count 146
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 22 place count 45 transition count 145
Applied a total of 22 rules in 13 ms. Remains 45 /56 variables (removed 11) and now considering 145/176 (removed 31) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 45/56 places, 145/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 51 transition count 151
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 51 transition count 151
Applied a total of 10 rules in 2 ms. Remains 51 /56 variables (removed 5) and now considering 151/176 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 51/56 places, 151/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 56 transition count 171
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 51 transition count 171
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 16 place count 45 transition count 140
Iterating global reduction 2 with 6 rules applied. Total rules applied 22 place count 45 transition count 140
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 28 place count 42 transition count 137
Applied a total of 28 rules in 11 ms. Remains 42 /56 variables (removed 14) and now considering 137/176 (removed 39) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 42/56 places, 137/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 137 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 56 transition count 170
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 17 place count 45 transition count 145
Iterating global reduction 2 with 5 rules applied. Total rules applied 22 place count 45 transition count 145
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 26 place count 43 transition count 143
Applied a total of 26 rules in 9 ms. Remains 43 /56 variables (removed 13) and now considering 143/176 (removed 33) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 43/56 places, 143/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 143 transitions.
Finished random walk after 49 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=49 )
FORMULA AutonomousCar-PT-05a-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 56 transition count 170
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 1 with 6 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 17 place count 45 transition count 145
Iterating global reduction 2 with 5 rules applied. Total rules applied 22 place count 45 transition count 145
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 26 place count 43 transition count 143
Applied a total of 26 rules in 10 ms. Remains 43 /56 variables (removed 13) and now considering 143/176 (removed 33) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 43/56 places, 143/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 143 transitions.
Finished random walk after 66 steps, including 2 resets, run visited all 1 properties in 2 ms. (steps per millisecond=33 )
FORMULA AutonomousCar-PT-05a-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 50 transition count 145
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 50 transition count 145
Applied a total of 12 rules in 1 ms. Remains 50 /56 variables (removed 6) and now considering 145/176 (removed 31) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 50/56 places, 145/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 31 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 172
Reduce places removed 4 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 6 rules applied. Total rules applied 10 place count 52 transition count 170
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 16 place count 46 transition count 151
Iterating global reduction 3 with 4 rules applied. Total rules applied 20 place count 46 transition count 151
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 24 place count 44 transition count 149
Applied a total of 24 rules in 19 ms. Remains 44 /56 variables (removed 12) and now considering 149/176 (removed 27) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 44/56 places, 149/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 21 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 149 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 51 transition count 151
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 51 transition count 151
Applied a total of 10 rules in 2 ms. Remains 51 /56 variables (removed 5) and now considering 151/176 (removed 25) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 51/56 places, 151/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 19 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 151 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 56 transition count 171
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 1 with 5 rules applied. Total rules applied 10 place count 51 transition count 171
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 10 place count 51 transition count 170
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 50 transition count 170
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 18 place count 44 transition count 139
Iterating global reduction 2 with 6 rules applied. Total rules applied 24 place count 44 transition count 139
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 28 place count 42 transition count 137
Applied a total of 28 rules in 22 ms. Remains 42 /56 variables (removed 14) and now considering 137/176 (removed 39) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 42/56 places, 137/176 transitions.
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:47:34] [INFO ] Flatten gal took : 20 ms
[2023-03-09 08:47:34] [INFO ] Input system was already deterministic with 137 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 176/176 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 54 transition count 169
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 54 transition count 169
Applied a total of 4 rules in 10 ms. Remains 54 /56 variables (removed 2) and now considering 169/176 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 54/56 places, 169/176 transitions.
[2023-03-09 08:47:35] [INFO ] Flatten gal took : 8 ms
[2023-03-09 08:47:35] [INFO ] Flatten gal took : 9 ms
[2023-03-09 08:47:35] [INFO ] Input system was already deterministic with 169 transitions.
[2023-03-09 08:47:35] [INFO ] Flatten gal took : 24 ms
[2023-03-09 08:47:35] [INFO ] Flatten gal took : 11 ms
[2023-03-09 08:47:35] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-09 08:47:35] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 56 places, 176 transitions and 1293 arcs took 2 ms.
Total runtime 4695 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AutonomousCar-PT-05a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability
FORMULA AutonomousCar-PT-05a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutonomousCar-PT-05a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678351661676
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 7 (type EXCL) for 6 AutonomousCar-PT-05a-CTLFireability-03
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type FNDP) for 25 AutonomousCar-PT-05a-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 25 AutonomousCar-PT-05a-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 25 AutonomousCar-PT-05a-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 52 (type FNDP) for AutonomousCar-PT-05a-CTLFireability-08
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 53 (type EQUN) for AutonomousCar-PT-05a-CTLFireability-08 (obsolete)
lola: CANCELED task # 56 (type SRCH) for AutonomousCar-PT-05a-CTLFireability-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 56 (type SRCH) for AutonomousCar-PT-05a-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 7 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-03
lola: result : true
lola: markings : 20707
lola: fired transitions : 94764
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 AutonomousCar-PT-05a-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/376/CTLFireability-53.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 49 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-15
lola: result : false
lola: markings : 10879
lola: fired transitions : 40177
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 AutonomousCar-PT-05a-CTLFireability-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-13
lola: result : true
lola: markings : 13357
lola: fired transitions : 62600
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 AutonomousCar-PT-05a-CTLFireability-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EQUN) for AutonomousCar-PT-05a-CTLFireability-08
lola: result : true
lola: FINISHED task # 33 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-11
lola: result : true
lola: markings : 801433
lola: fired transitions : 4630165
lola: time used : 4.000000
lola: memory pages used : 4
lola: LAUNCH task # 23 (type EXCL) for 22 AutonomousCar-PT-05a-CTLFireability-07
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-07
lola: result : false
lola: markings : 50
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 AutonomousCar-PT-05a-CTLFireability-05
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-05
lola: result : true
lola: markings : 53
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 AutonomousCar-PT-05a-CTLFireability-04
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-04
lola: result : true
lola: markings : 180839
lola: fired transitions : 979287
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 AutonomousCar-PT-05a-CTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-01
lola: result : true
lola: markings : 51
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 AutonomousCar-PT-05a-CTLFireability-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-00
lola: result : true
lola: markings : 25
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 AutonomousCar-PT-05a-CTLFireability-14
lola: time limit : 899 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutonomousCar-PT-05a-CTLFireability-00: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-01: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-03: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-04: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-05: DISJ true CTL model checker
AutonomousCar-PT-05a-CTLFireability-07: CTL false CTL model checker
AutonomousCar-PT-05a-CTLFireability-08: CONJ false findpath
AutonomousCar-PT-05a-CTLFireability-11: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-13: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AutonomousCar-PT-05a-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
AutonomousCar-PT-05a-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
AutonomousCar-PT-05a-CTLFireability-14: AGEF 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 AGEF EXCL 1/899 1/32 AutonomousCar-PT-05a-CTLFireability-14 262068 m, 52413 m/sec, 1514663 t fired, .
Time elapsed: 5 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 13
lola: FINISHED task # 46 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-14
lola: result : true
lola: markings : 490971
lola: fired transitions : 3008117
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 54 (type EXCL) for 35 AutonomousCar-PT-05a-CTLFireability-12
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-12
lola: result : false
lola: markings : 48
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 AutonomousCar-PT-05a-CTLFireability-06
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-06
lola: result : false
lola: markings : 57
lola: fired transitions : 145
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 35 AutonomousCar-PT-05a-CTLFireability-12
lola: time limit : 3594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for AutonomousCar-PT-05a-CTLFireability-12
lola: result : true
lola: markings : 86
lola: fired transitions : 336
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutonomousCar-PT-05a-CTLFireability-00: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-01: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-03: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-04: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-05: DISJ true CTL model checker
AutonomousCar-PT-05a-CTLFireability-06: CTL false CTL model checker
AutonomousCar-PT-05a-CTLFireability-07: CTL false CTL model checker
AutonomousCar-PT-05a-CTLFireability-08: CONJ false findpath
AutonomousCar-PT-05a-CTLFireability-11: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-12: DISJ true CTL model checker
AutonomousCar-PT-05a-CTLFireability-13: CTL true CTL model checker
AutonomousCar-PT-05a-CTLFireability-14: AGEF true tscc_search
AutonomousCar-PT-05a-CTLFireability-15: CTL false CTL model checker
Time elapsed: 6 secs. Pages in use: 4
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutonomousCar-PT-05a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AutonomousCar-PT-05a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595800594"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AutonomousCar-PT-05a.tgz
mv AutonomousCar-PT-05a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;