Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595700546.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AutonomousCar-PT-02a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595700546
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 7.4K Feb 25 12:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 25 12:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 12:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 12:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:33 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:33 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 15:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 12:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 25 12:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 25 12:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 89K Feb 25 12:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:33 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 15:33 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 23K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-00
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-01
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-02
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-03
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-04
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-05
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-06
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-07
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-08
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-09
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-10
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-11
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-12
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-13
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-14
FORMULA_NAME AutonomousCar-PT-02a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678351241969

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutonomousCar-PT-02a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 08:40:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 08:40:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 08:40:44] [INFO ] Load time of PNML (sax parser for PT used): 61 ms
[2023-03-09 08:40:44] [INFO ] Transformed 33 places.
[2023-03-09 08:40:44] [INFO ] Transformed 69 transitions.
[2023-03-09 08:40:44] [INFO ] Found NUPN structural information;
[2023-03-09 08:40:44] [INFO ] Parsed PT model containing 33 places and 69 transitions and 368 arcs in 158 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Ensure Unique test removed 23 transitions
Reduce redundant transitions removed 23 transitions.
Support contains 29 out of 33 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 33/33 places, 46/46 transitions.
Applied a total of 0 rules in 10 ms. Remains 33 /33 variables (removed 0) and now considering 46/46 (removed 0) transitions.
[2023-03-09 08:40:44] [INFO ] Flow matrix only has 45 transitions (discarded 1 similar events)
// Phase 1: matrix 45 rows 33 cols
[2023-03-09 08:40:44] [INFO ] Computed 7 place invariants in 9 ms
[2023-03-09 08:40:44] [INFO ] Implicit Places using invariants in 289 ms returned []
[2023-03-09 08:40:44] [INFO ] Flow matrix only has 45 transitions (discarded 1 similar events)
[2023-03-09 08:40:44] [INFO ] Invariant cache hit.
[2023-03-09 08:40:44] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-09 08:40:45] [INFO ] Implicit Places using invariants and state equation in 156 ms returned [28]
Discarding 1 places :
Implicit Place search using SMT with State Equation took 475 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 32/33 places, 46/46 transitions.
Applied a total of 0 rules in 2 ms. Remains 32 /32 variables (removed 0) and now considering 46/46 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 488 ms. Remains : 32/33 places, 46/46 transitions.
Support contains 29 out of 32 places after structural reductions.
[2023-03-09 08:40:45] [INFO ] Flatten gal took : 26 ms
[2023-03-09 08:40:45] [INFO ] Flatten gal took : 11 ms
[2023-03-09 08:40:45] [INFO ] Input system was already deterministic with 46 transitions.
Incomplete random walk after 10000 steps, including 635 resets, run finished after 369 ms. (steps per millisecond=27 ) properties (out of 57) seen :48
Incomplete Best-First random walk after 10001 steps, including 588 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 182 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 310 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 233 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 152 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 293 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 237 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 291 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 237 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2023-03-09 08:40:46] [INFO ] Flow matrix only has 45 transitions (discarded 1 similar events)
// Phase 1: matrix 45 rows 32 cols
[2023-03-09 08:40:46] [INFO ] Computed 6 place invariants in 1 ms
[2023-03-09 08:40:46] [INFO ] [Real]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-09 08:40:46] [INFO ] After 79ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:1
[2023-03-09 08:40:46] [INFO ] [Nat]Absence check using 6 positive place invariants in 1 ms returned sat
[2023-03-09 08:40:46] [INFO ] After 24ms SMT Verify possible using state equation in natural domain returned unsat :8 sat :1
[2023-03-09 08:40:46] [INFO ] State equation strengthened by 19 read => feed constraints.
[2023-03-09 08:40:46] [INFO ] After 7ms SMT Verify possible using 19 Read/Feed constraints in natural domain returned unsat :8 sat :1
[2023-03-09 08:40:46] [INFO ] After 17ms SMT Verify possible using trap constraints in natural domain returned unsat :8 sat :1
Attempting to minimize the solution found.
Minimization took 10 ms.
[2023-03-09 08:40:46] [INFO ] After 90ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :1
Fused 9 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 2 ms.
Support contains 4 out of 32 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 32/32 places, 46/46 transitions.
Graph (complete) has 116 edges and 32 vertex of which 30 are kept as prefixes of interest. Removing 2 places using SCC suffix rule.0 ms
Discarding 2 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Drop transitions removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 5 rules applied. Total rules applied 6 place count 30 transition count 39
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 10 place count 26 transition count 39
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 12 place count 24 transition count 33
Iterating global reduction 2 with 2 rules applied. Total rules applied 14 place count 24 transition count 33
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 20 place count 21 transition count 30
Free-agglomeration rule applied 2 times.
Iterating global reduction 2 with 2 rules applied. Total rules applied 22 place count 21 transition count 28
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 28 place count 19 transition count 24
Applied a total of 28 rules in 17 ms. Remains 19 /32 variables (removed 13) and now considering 24/46 (removed 22) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 17 ms. Remains : 19/32 places, 24/46 transitions.
Finished random walk after 1053 steps, including 64 resets, run visited all 1 properties in 6 ms. (steps per millisecond=175 )
Successfully simplified 8 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA AutonomousCar-PT-02a-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 7 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 5 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 46 transitions.
Computed a total of 3 stabilizing places and 2 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 46/46 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 32/32 places, 46/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 32 transition count 45
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 31 transition count 44
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 4 place count 30 transition count 44
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 4 place count 30 transition count 43
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 6 place count 29 transition count 43
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 9 place count 26 transition count 36
Iterating global reduction 3 with 3 rules applied. Total rules applied 12 place count 26 transition count 36
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 14 place count 25 transition count 35
Applied a total of 14 rules in 8 ms. Remains 25 /32 variables (removed 7) and now considering 35/46 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 25/32 places, 35/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 35 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 31 transition count 45
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 31 transition count 45
Applied a total of 2 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 45/46 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 45/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 29 transition count 39
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 29 transition count 39
Applied a total of 6 rules in 1 ms. Remains 29 /32 variables (removed 3) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 29/32 places, 39/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 30 transition count 42
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 42
Applied a total of 4 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/32 places, 42/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 32 transition count 42
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 28 transition count 42
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 8 place count 28 transition count 41
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 10 place count 27 transition count 41
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 11 place count 26 transition count 40
Iterating global reduction 2 with 1 rules applied. Total rules applied 12 place count 26 transition count 40
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 14 place count 25 transition count 39
Applied a total of 14 rules in 5 ms. Remains 25 /32 variables (removed 7) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 25/32 places, 39/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 31 transition count 45
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 31 transition count 45
Applied a total of 2 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 45/46 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 45/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 29 transition count 39
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 29 transition count 39
Applied a total of 6 rules in 1 ms. Remains 29 /32 variables (removed 3) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 29/32 places, 39/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 32 transition count 45
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 31 transition count 45
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 5 place count 28 transition count 38
Iterating global reduction 2 with 3 rules applied. Total rules applied 8 place count 28 transition count 38
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 12 place count 26 transition count 36
Applied a total of 12 rules in 4 ms. Remains 26 /32 variables (removed 6) and now considering 36/46 (removed 10) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 26/32 places, 36/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 36 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 30 transition count 42
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 30 transition count 42
Applied a total of 4 rules in 1 ms. Remains 30 /32 variables (removed 2) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/32 places, 42/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 32 transition count 45
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 31 transition count 44
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 4 place count 30 transition count 44
Discarding 2 places :
Symmetric choice reduction at 3 with 2 rule applications. Total rules 6 place count 28 transition count 40
Iterating global reduction 3 with 2 rules applied. Total rules applied 8 place count 28 transition count 40
Applied a total of 8 rules in 4 ms. Remains 28 /32 variables (removed 4) and now considering 40/46 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 28/32 places, 40/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 29 transition count 39
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 29 transition count 39
Applied a total of 6 rules in 1 ms. Remains 29 /32 variables (removed 3) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 29/32 places, 39/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 29 transition count 39
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 29 transition count 39
Applied a total of 6 rules in 1 ms. Remains 29 /32 variables (removed 3) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 29/32 places, 39/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 31 transition count 43
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 31 transition count 43
Applied a total of 2 rules in 1 ms. Remains 31 /32 variables (removed 1) and now considering 43/46 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 31/32 places, 43/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 32/32 places, 46/46 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 32 transition count 44
Reduce places removed 2 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 3 rules applied. Total rules applied 5 place count 30 transition count 43
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 29 transition count 43
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 6 place count 29 transition count 42
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 8 place count 28 transition count 42
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 9 place count 27 transition count 41
Iterating global reduction 3 with 1 rules applied. Total rules applied 10 place count 27 transition count 41
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 12 place count 26 transition count 40
Applied a total of 12 rules in 5 ms. Remains 26 /32 variables (removed 6) and now considering 40/46 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 26/32 places, 40/46 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 2 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Input system was already deterministic with 40 transitions.
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 3 ms
[2023-03-09 08:40:46] [INFO ] Flatten gal took : 4 ms
[2023-03-09 08:40:47] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-09 08:40:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 32 places, 46 transitions and 223 arcs took 0 ms.
Total runtime 2723 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AutonomousCar-PT-02a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability

FORMULA AutonomousCar-PT-02a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AutonomousCar-PT-02a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678351247583

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 4 (type EXCL) for 3 AutonomousCar-PT-02a-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-01
lola: result : true
lola: markings : 434
lola: fired transitions : 1192
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 7 (type EXCL) for 6 AutonomousCar-PT-02a-CTLFireability-02
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-02
lola: result : false
lola: markings : 9
lola: fired transitions : 36
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 AutonomousCar-PT-02a-CTLFireability-03
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 10 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-03
lola: result : true
lola: markings : 35
lola: fired transitions : 74
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 19 (type EXCL) for 18 AutonomousCar-PT-02a-CTLFireability-06
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 19 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-06
lola: result : false
lola: markings : 48
lola: fired transitions : 74
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 21 AutonomousCar-PT-02a-CTLFireability-07
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 45 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 AutonomousCar-PT-02a-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 40 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-14
lola: result : true
lola: markings : 9
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 37 (type EXCL) for 36 AutonomousCar-PT-02a-CTLFireability-13
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 37 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-13
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 AutonomousCar-PT-02a-CTLFireability-10
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-10
lola: result : false
lola: markings : 25
lola: fired transitions : 44
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 AutonomousCar-PT-02a-CTLFireability-04
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-04
lola: result : false
lola: markings : 25
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 AutonomousCar-PT-02a-CTLFireability-00
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-00
lola: result : false
lola: markings : 2314
lola: fired transitions : 14543
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 24 AutonomousCar-PT-02a-CTLFireability-09
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-09
lola: result : true
lola: markings : 830
lola: fired transitions : 2431
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 AutonomousCar-PT-02a-CTLFireability-12
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-12
lola: result : false
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 AutonomousCar-PT-02a-CTLFireability-05
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-05
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 AutonomousCar-PT-02a-CTLFireability-15
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-15
lola: result : true
lola: markings : 6
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 AutonomousCar-PT-02a-CTLFireability-11
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for AutonomousCar-PT-02a-CTLFireability-11
lola: result : false
lola: markings : 451
lola: fired transitions : 1217
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutonomousCar-PT-02a-CTLFireability-00: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-01: CTL true CTL model checker
AutonomousCar-PT-02a-CTLFireability-02: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-03: CTL true CTL model checker
AutonomousCar-PT-02a-CTLFireability-04: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-05: CTL true CTL model checker
AutonomousCar-PT-02a-CTLFireability-06: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-07: AXAG true state space /EXEF
AutonomousCar-PT-02a-CTLFireability-09: EFAG false tscc_search
AutonomousCar-PT-02a-CTLFireability-10: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-11: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-12: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-13: CTL false CTL model checker
AutonomousCar-PT-02a-CTLFireability-14: CTL true CTL model checker
AutonomousCar-PT-02a-CTLFireability-15: CTL true CTL model checker


Time elapsed: 0 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutonomousCar-PT-02a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AutonomousCar-PT-02a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595700546"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AutonomousCar-PT-02a.tgz
mv AutonomousCar-PT-02a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;