About the Execution of LoLa+red for AutoFlight-PT-02a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 206.960 | 6287.00 | 13862.00 | 43.20 | FTTTFTTFTFFFTTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595400386.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AutoFlight-PT-02a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595400386
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 6.5K Feb 25 18:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 25 18:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 25 18:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 18:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 15:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.5K Feb 25 18:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 18:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Feb 25 18:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 91K Feb 25 18:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 15:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 16K Mar 5 18:22 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-00
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-01
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-02
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-03
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-04
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-05
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-06
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-07
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-08
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-09
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-10
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-11
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-12
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-13
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-14
FORMULA_NAME AutoFlight-PT-02a-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678348053328
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AutoFlight-PT-02a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 07:47:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-09 07:47:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 07:47:36] [INFO ] Load time of PNML (sax parser for PT used): 55 ms
[2023-03-09 07:47:36] [INFO ] Transformed 57 places.
[2023-03-09 07:47:36] [INFO ] Transformed 55 transitions.
[2023-03-09 07:47:36] [INFO ] Found NUPN structural information;
[2023-03-09 07:47:36] [INFO ] Parsed PT model containing 57 places and 55 transitions and 180 arcs in 185 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 10 transitions
Reduce redundant transitions removed 10 transitions.
FORMULA AutoFlight-PT-02a-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 51 out of 57 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 57/57 places, 45/45 transitions.
Applied a total of 0 rules in 15 ms. Remains 57 /57 variables (removed 0) and now considering 45/45 (removed 0) transitions.
// Phase 1: matrix 45 rows 57 cols
[2023-03-09 07:47:36] [INFO ] Computed 16 place invariants in 5 ms
[2023-03-09 07:47:36] [INFO ] Implicit Places using invariants in 356 ms returned [17]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 401 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 56/57 places, 45/45 transitions.
Applied a total of 0 rules in 3 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 420 ms. Remains : 56/57 places, 45/45 transitions.
Support contains 51 out of 56 places after structural reductions.
[2023-03-09 07:47:36] [INFO ] Flatten gal took : 30 ms
[2023-03-09 07:47:36] [INFO ] Flatten gal took : 9 ms
[2023-03-09 07:47:36] [INFO ] Input system was already deterministic with 45 transitions.
Support contains 50 out of 56 places (down from 51) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 387 resets, run finished after 458 ms. (steps per millisecond=21 ) properties (out of 58) seen :49
Incomplete Best-First random walk after 10001 steps, including 103 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 138 ms. (steps per millisecond=72 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 122 resets, run finished after 115 ms. (steps per millisecond=86 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 157 ms. (steps per millisecond=63 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 124 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 117 resets, run finished after 84 ms. (steps per millisecond=119 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 152 ms. (steps per millisecond=65 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 131 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 128 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 8) seen :2
Running SMT prover for 6 properties.
// Phase 1: matrix 45 rows 56 cols
[2023-03-09 07:47:38] [INFO ] Computed 15 place invariants in 1 ms
[2023-03-09 07:47:38] [INFO ] [Real]Absence check using 14 positive place invariants in 3 ms returned sat
[2023-03-09 07:47:38] [INFO ] [Real]Absence check using 14 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 07:47:38] [INFO ] After 87ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:4
[2023-03-09 07:47:38] [INFO ] [Nat]Absence check using 14 positive place invariants in 3 ms returned sat
[2023-03-09 07:47:38] [INFO ] [Nat]Absence check using 14 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-09 07:47:38] [INFO ] After 21ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :2
[2023-03-09 07:47:38] [INFO ] State equation strengthened by 9 read => feed constraints.
[2023-03-09 07:47:38] [INFO ] After 11ms SMT Verify possible using 9 Read/Feed constraints in natural domain returned unsat :4 sat :2
[2023-03-09 07:47:38] [INFO ] After 26ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :2
Attempting to minimize the solution found.
Minimization took 14 ms.
[2023-03-09 07:47:38] [INFO ] After 121ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :2
Fused 6 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 4 ms.
Support contains 7 out of 56 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 52 transition count 41
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 8 place count 52 transition count 36
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 18 place count 47 transition count 36
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 22 place count 45 transition count 34
Free-agglomeration rule applied 3 times.
Iterating global reduction 2 with 3 rules applied. Total rules applied 25 place count 45 transition count 31
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 28 place count 42 transition count 31
Applied a total of 28 rules in 18 ms. Remains 42 /56 variables (removed 14) and now considering 31/45 (removed 14) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 19 ms. Remains : 42/56 places, 31/45 transitions.
Incomplete random walk after 10000 steps, including 318 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 2) seen :1
Finished Best-First random walk after 2965 steps, including 54 resets, run visited all 1 properties in 4 ms. (steps per millisecond=741 )
Successfully simplified 4 atomic propositions for a total of 15 simplifications.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 6 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 5 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Computed a total of 4 stabilizing places and 1 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 52 transition count 41
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 8 place count 52 transition count 37
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 16 place count 48 transition count 37
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 24 place count 44 transition count 33
Applied a total of 24 rules in 10 ms. Remains 44 /56 variables (removed 12) and now considering 33/45 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 44/56 places, 33/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 33 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 52 transition count 41
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 8 place count 52 transition count 37
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 16 place count 48 transition count 37
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 22 place count 45 transition count 34
Applied a total of 22 rules in 6 ms. Remains 45 /56 variables (removed 11) and now considering 34/45 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 45/56 places, 34/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 34 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 0 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 52 transition count 41
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 8 place count 52 transition count 37
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 16 place count 48 transition count 37
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 22 place count 45 transition count 34
Applied a total of 22 rules in 6 ms. Remains 45 /56 variables (removed 11) and now considering 34/45 (removed 11) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 45/56 places, 34/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 34 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 56 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 8 place count 52 transition count 41
Performed 5 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 5 Pre rules applied. Total rules applied 8 place count 52 transition count 36
Deduced a syphon composed of 5 places in 1 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 2 with 10 rules applied. Total rules applied 18 place count 47 transition count 36
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 24 place count 44 transition count 33
Applied a total of 24 rules in 6 ms. Remains 44 /56 variables (removed 12) and now considering 33/45 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 44/56 places, 33/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 33 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 56 transition count 43
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 54 transition count 43
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 3 Pre rules applied. Total rules applied 4 place count 54 transition count 40
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 10 place count 51 transition count 40
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 16 place count 48 transition count 37
Applied a total of 16 rules in 13 ms. Remains 48 /56 variables (removed 8) and now considering 37/45 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 48/56 places, 37/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 37 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 56/56 places, 45/45 transitions.
Applied a total of 0 rules in 1 ms. Remains 56 /56 variables (removed 0) and now considering 45/45 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 56/56 places, 45/45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 2 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Input system was already deterministic with 45 transitions.
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:38] [INFO ] Flatten gal took : 3 ms
[2023-03-09 07:47:39] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-09 07:47:39] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 56 places, 45 transitions and 157 arcs took 1 ms.
Total runtime 3215 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT AutoFlight-PT-02a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/380
CTLFireability
FORMULA AutoFlight-PT-02a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA AutoFlight-PT-02a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678348059615
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/380/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/380/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/380/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 1 (type EXCL) for 0 AutoFlight-PT-02a-CTLFireability-00
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 1 (type EXCL) for AutoFlight-PT-02a-CTLFireability-00
lola: result : false
lola: markings : 9
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: LAUNCH task # 4 (type EXCL) for 3 AutoFlight-PT-02a-CTLFireability-01
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 4 (type EXCL) for AutoFlight-PT-02a-CTLFireability-01
lola: result : true
lola: markings : 1073
lola: fired transitions : 10116
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 AutoFlight-PT-02a-CTLFireability-11
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for AutoFlight-PT-02a-CTLFireability-11
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 AutoFlight-PT-02a-CTLFireability-10
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 31 (type EXCL) for AutoFlight-PT-02a-CTLFireability-10
lola: result : false
lola: markings : 6949
lola: fired transitions : 46340
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 AutoFlight-PT-02a-CTLFireability-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for AutoFlight-PT-02a-CTLFireability-15
lola: result : true
lola: markings : 1110
lola: fired transitions : 4662
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 AutoFlight-PT-02a-CTLFireability-13
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for AutoFlight-PT-02a-CTLFireability-13
lola: result : true
lola: markings : 4
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 AutoFlight-PT-02a-CTLFireability-08
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for AutoFlight-PT-02a-CTLFireability-08
lola: result : true
lola: markings : 1417
lola: fired transitions : 4096
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 AutoFlight-PT-02a-CTLFireability-07
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for AutoFlight-PT-02a-CTLFireability-07
lola: result : false
lola: markings : 6694
lola: fired transitions : 70322
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 AutoFlight-PT-02a-CTLFireability-05
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for AutoFlight-PT-02a-CTLFireability-05
lola: result : true
lola: markings : 11
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 AutoFlight-PT-02a-CTLFireability-04
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for AutoFlight-PT-02a-CTLFireability-04
lola: result : false
lola: markings : 189
lola: fired transitions : 296
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 AutoFlight-PT-02a-CTLFireability-03
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for AutoFlight-PT-02a-CTLFireability-03
lola: result : true
lola: markings : 22
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 AutoFlight-PT-02a-CTLFireability-02
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for AutoFlight-PT-02a-CTLFireability-02
lola: result : true
lola: markings : 611
lola: fired transitions : 2425
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 18 AutoFlight-PT-02a-CTLFireability-06
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for AutoFlight-PT-02a-CTLFireability-06
lola: result : false
lola: markings : 273
lola: fired transitions : 376
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 27 AutoFlight-PT-02a-CTLFireability-09
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for AutoFlight-PT-02a-CTLFireability-09
lola: result : true
lola: markings : 509
lola: fired transitions : 1307
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 AutoFlight-PT-02a-CTLFireability-12
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for AutoFlight-PT-02a-CTLFireability-12
lola: result : true
lola: markings : 19
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AutoFlight-PT-02a-CTLFireability-00: CTL false CTL model checker
AutoFlight-PT-02a-CTLFireability-01: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-02: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-03: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-04: CTL false CTL model checker
AutoFlight-PT-02a-CTLFireability-05: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-06: SP ECTL true LTL model checker
AutoFlight-PT-02a-CTLFireability-07: CTL false CTL model checker
AutoFlight-PT-02a-CTLFireability-08: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-09: EFAG false tscc_search
AutoFlight-PT-02a-CTLFireability-10: CTL false CTL model checker
AutoFlight-PT-02a-CTLFireability-11: CTL false CTL model checker
AutoFlight-PT-02a-CTLFireability-12: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-13: CTL true CTL model checker
AutoFlight-PT-02a-CTLFireability-15: CTL true CTL model checker
Time elapsed: 0 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-02a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AutoFlight-PT-02a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595400386"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-02a.tgz
mv AutoFlight-PT-02a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;