fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r007-oct2-167813595200214
Last Updated
May 14, 2023

About the Execution of LoLa+red for AirplaneLD-COL-0500

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
3511.252 28329.00 102215.00 37.60 TTFTFFTTTTFFTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595200214.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-COL-0500, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595200214
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 532K
-rw-r--r-- 1 mcc users 7.2K Feb 26 11:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 11:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 11:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K Feb 26 11:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 12:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 96K Feb 26 12:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.6K Feb 26 12:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 26 12:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 109K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-COL-0500-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678344253320

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0500
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 06:44:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 06:44:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 06:44:15] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-09 06:44:15] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-09 06:44:16] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 595 ms
[2023-03-09 06:44:16] [INFO ] Detected 3 constant HL places corresponding to 1502 PT places.
[2023-03-09 06:44:16] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 3519 PT places and 6012.0 transition bindings in 20 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 18 ms.
Working with output stream class java.io.PrintStream
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-09 06:44:16] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 4 ms.
[2023-03-09 06:44:16] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 17 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 15
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-09 06:44:16] [INFO ] Flatten gal took : 19 ms
[2023-03-09 06:44:16] [INFO ] Flatten gal took : 4 ms
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-08 TRUE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-11 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-12 TRUE TECHNIQUES CPN_APPROX
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:1000) in guard (OR (GEQ $A 499) (EQ $A 999))introduces in Altitude(1000) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:1000) in guard (AND (LT $A 499) (NEQ $A 999))introduces in Altitude(1000) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 1000 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 499) (EQ $A 999)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 499) (NEQ $A 999)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:500) in guard (OR (LEQ $S 249) (EQ $S 499))introduces in Speed(500) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:500) in guard (AND (GT $S 249) (NEQ $S 499))introduces in Speed(500) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:500) in guard (OR (LEQ $S 249) (EQ $S 499))introduces in Speed(500) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:500) in guard (AND (GT $S 249) (NEQ $S 499))introduces in Speed(500) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 500 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 249) (EQ $S 499)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 249) (NEQ $S 499)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 249) (EQ $S 499)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 249) (NEQ $S 499)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2023-03-09 06:44:16] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 45 ms.
[2023-03-09 06:44:16] [INFO ] Unfolded 15 HLPN properties in 0 ms.
Reduce places removed 6 places and 0 transitions.
Incomplete random walk after 10000 steps, including 1258 resets, run finished after 525 ms. (steps per millisecond=19 ) properties (out of 12) seen :2
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 239 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 243 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 249 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 263 resets, run finished after 76 ms. (steps per millisecond=131 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 218 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 235 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 220 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 236 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 232 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 248 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 20 rows 23 cols
[2023-03-09 06:44:17] [INFO ] Computed 3 place invariants in 3 ms
[2023-03-09 06:44:18] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-03-09 06:44:18] [INFO ] [Real]Absence check using 2 positive and 1 generalized place invariants in 1 ms returned sat
[2023-03-09 06:44:18] [INFO ] After 259ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:8
[2023-03-09 06:44:18] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-03-09 06:44:18] [INFO ] [Nat]Absence check using 2 positive and 1 generalized place invariants in 0 ms returned sat
[2023-03-09 06:44:18] [INFO ] After 101ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :0
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 10 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 2627 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0500
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0500-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678344281649

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 23 (type SKEL/CNST) for 21 AirplaneLD-COL-0500-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 49 (type SKEL/FNDP) for 33 AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 33 AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 33 AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 23 (type SKEL/CNST) for AirplaneLD-COL-0500-ReachabilityCardinality-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/SRCH) for 33 AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 49 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 50 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 96 (type SKEL/FNDP) for 30 AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SKEL/FNDP) for 15 AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/EQUN) for 30 AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 100 (type SKEL/SRCH) for 30 AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 118673
lola: tried executions : 118674
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 50 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 100 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 96 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 98 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 146 (type SKEL/FNDP) for 18 AirplaneLD-COL-0500-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/EQUN) for 18 AirplaneLD-COL-0500-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/SRCH) for 18 AirplaneLD-COL-0500-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 96 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 6904
lola: tried executions : 6905
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 98 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-10
lola: result : unknown
lola: FINISHED task # 149 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-06
lola: result : false
lola: markings : 20
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 146 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 147 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 129 (type SKEL/FNDP) for 39 AirplaneLD-COL-0500-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/EQUN) for 39 AirplaneLD-COL-0500-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 156 (type SKEL/SRCH) for 39 AirplaneLD-COL-0500-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 156 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-13
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 129 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 152 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 27 AirplaneLD-COL-0500-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/EQUN) for 27 AirplaneLD-COL-0500-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 85 (type SKEL/SRCH) for 27 AirplaneLD-COL-0500-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 85 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-09
lola: result : false
lola: markings : 58
lola: fired transitions : 104
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 83 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 91 (type SKEL/FNDP) for 12 AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/EQUN) for 12 AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 12 AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-152.sara.

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-147.sara.
lola: FINISHED task # 152 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-13
lola: result : false
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-111.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 113 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: result : false
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 91 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 111 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 121 (type SKEL/FNDP) for 45 AirplaneLD-COL-0500-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 45 AirplaneLD-COL-0500-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/SRCH) for 45 AirplaneLD-COL-0500-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 5261
lola: tried executions : 912
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 111 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-04
lola: result : unknown
lola: FINISHED task # 124 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-15
lola: result : false
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 121 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 122 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 6 AirplaneLD-COL-0500-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/EQUN) for 6 AirplaneLD-COL-0500-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-83.sara.
lola: LAUNCH task # 137 (type SKEL/SRCH) for 6 AirplaneLD-COL-0500-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 122 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-15
lola: result : unknown
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 137 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-02
lola: result : false
lola: markings : 13
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 118 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 59 (type SKEL/FNDP) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/EQUN) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 73 (type SKEL/SRCH) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: result : true
lola: markings : 19
lola: fired transitions : 35
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 59 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 60 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 58 (type SKEL/FNDP) for 36 AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/EQUN) for 36 AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/SRCH) for 36 AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 147 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-06
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-60.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 59 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 8
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-71.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 87 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: result : false
lola: markings : 24
lola: fired transitions : 33
lola: time used : 1.000000
lola: memory pages used : 1


lola: CANCELED task # 58 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 71 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 77 (type SKEL/FNDP) for 42 AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SKEL/EQUN) for 42 AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 134 (type SKEL/SRCH) for 42 AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-118.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 3720
lola: tried executions : 702
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 134 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: TR BINDINGS DONE
lola: Places: 3519, Transitions: 4008
lola: CANCELED task # 77 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 78 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-14 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-78.sara.


lola: LAUNCH task # 92 (type SKEL/FNDP) for 9 AirplaneLD-COL-0500-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SKEL/EQUN) for 9 AirplaneLD-COL-0500-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SKEL/SRCH) for 9 AirplaneLD-COL-0500-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 77 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 5441
lola: tried executions : 5442
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 60 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 132 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 92 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 93 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 82 (type SKEL/FNDP) for 24 AirplaneLD-COL-0500-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SKEL/EQUN) for 24 AirplaneLD-COL-0500-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/SRCH) for 24 AirplaneLD-COL-0500-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-03
lola: result : unknown
lola: FINISHED task # 118 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 71 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-12
lola: result : false
lola: FINISHED task # 78 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-14
lola: result : false

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 130 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-08
lola: result : false
lola: markings : 22
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 82 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 104 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 116 (type SKEL/FNDP) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SKEL/EQUN) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 142 (type SKEL/SRCH) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 104 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-08
lola: result : unknown
lola: FINISHED task # 142 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
lola: markings : 17
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 116 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 140 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 106 (type SKEL/EQUN) for 15 AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 108 (type SKEL/SRCH) for 15 AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-140.sara.
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 109 (type SKEL/SRCH) for 15 AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 83 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 108 (type SKEL/SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 97 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 106 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 109 (type SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-05 (obsolete)
lola: FINISHED task # 97 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 485189
lola: tried executions : 485190
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 116 (type SKEL/FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 102
lola: tried executions : 12
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 140 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-106.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: @ trans t2_1
lola: @ trans SampleRW
lola: FINISHED task # 106 (type SKEL/EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-05
lola: result : unknown
lola: @ trans getAlt
lola: @ trans t3_2
lola: @ trans t4_1
lola: @ trans t1_2
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: @ trans t5_2
lola: @ trans t5_1
lola: @ trans t2_2
lola: @ trans t3_1
lola: @ trans SampleLW
lola: @ trans SpeedRW
lola: @ trans t4_2
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0500-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
AirplaneLD-COL-0500-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0500-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
AirplaneLD-COL-0500-ReachabilityCardinality-01: EF 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0500-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
AirplaneLD-COL-0500-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0500-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
AirplaneLD-COL-0500-ReachabilityCardinality-01: EF 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0500-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
AirplaneLD-COL-0500-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0500-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
AirplaneLD-COL-0500-ReachabilityCardinality-01: EF 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0500-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
AirplaneLD-COL-0500-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-15: EF false skeleton: tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-0500-ReachabilityCardinality-00: EF 0 0 0 0 3 0 0 2
AirplaneLD-COL-0500-ReachabilityCardinality-01: EF 0 0 0 0 3 0 0 2

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: Rule S: 0 transitions removed,0 places removed
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-09 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-03 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for AirplaneLD-COL-0500-ReachabilityCardinality-13 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 164 (type EXCL) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 1788 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 160 (type FNDP) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type EQUN) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type SRCH) for 3 AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 163 (type SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 160 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 161 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 164 (type EXCL) for AirplaneLD-COL-0500-ReachabilityCardinality-01 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-161.sara.
lola: FINISHED task # 160 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 161 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-01
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 170 (type EXCL) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 3577 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 166 (type FNDP) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type EQUN) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type SRCH) for 0 AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 169 (type SRCH) for AirplaneLD-COL-0500-ReachabilityCardinality-00
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 166 (type FNDP) for AirplaneLD-COL-0500-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 167 (type EQUN) for AirplaneLD-COL-0500-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 170 (type EXCL) for AirplaneLD-COL-0500-ReachabilityCardinality-00 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0500-ReachabilityCardinality-00: EF true tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-01: EF true tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-07: INITIAL true skeleton: preprocessing
AirplaneLD-COL-0500-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-09: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-12: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
AirplaneLD-COL-0500-ReachabilityCardinality-15: EF false skeleton: tandem / insertion


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0500"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-COL-0500, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595200214"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0500.tgz
mv AirplaneLD-COL-0500 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;