fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r007-oct2-167813595200206
Last Updated
May 14, 2023

About the Execution of LoLa+red for AirplaneLD-COL-0200

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
640.415 5247.00 11789.00 37.30 TTTFFTTTFTFTTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r007-oct2-167813595200206.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is AirplaneLD-COL-0200, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-oct2-167813595200206
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 7.8K Feb 26 11:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 26 11:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 11:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 11:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 11:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Feb 26 11:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 11:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 11:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 67K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-COL-0200-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678344158122

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0200
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-09 06:42:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-09 06:42:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-09 06:42:40] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-09 06:42:40] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-09 06:42:41] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 559 ms
[2023-03-09 06:42:41] [INFO ] Detected 3 constant HL places corresponding to 602 PT places.
[2023-03-09 06:42:41] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 1419 PT places and 2412.0 transition bindings in 20 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 20 ms.
Working with output stream class java.io.PrintStream
[2023-03-09 06:42:41] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions 56 arcs in 6 ms.
[2023-03-09 06:42:41] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 17 stabilizing places and 15 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 17 transition count 15
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-09 06:42:41] [INFO ] Flatten gal took : 13 ms
[2023-03-09 06:42:41] [INFO ] Flatten gal took : 3 ms
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-04 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-08 FALSE TECHNIQUES CPN_APPROX
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-12 TRUE TECHNIQUES CPN_APPROX
Symmetric sort wr.t. initial and guards and successors and join/free detected :Altitude
Symmetric sort wr.t. initial detected :Altitude
Transition t3_2 : guard parameter $A(Altitude:400) in guard (OR (GEQ $A 199) (EQ $A 399))introduces in Altitude(400) partition with 2 elements
Transition t3_1 : guard parameter $A(Altitude:400) in guard (AND (LT $A 199) (NEQ $A 399))introduces in Altitude(400) partition with 2 elements
Sort wr.t. initial and guards Altitude has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Altitude domain size was 400 reducing to 2 values.
For transition t3_2:(OR (GEQ $A 199) (EQ $A 399)) -> (EQ $A 1)
For transition t3_1:(AND (LT $A 199) (NEQ $A 399)) -> (EQ $A 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Speed
Symmetric sort wr.t. initial detected :Speed
Transition t5_2 : guard parameter $S(Speed:200) in guard (OR (LEQ $S 99) (EQ $S 199))introduces in Speed(200) partition with 2 elements
Transition t5_1 : guard parameter $S(Speed:200) in guard (AND (GT $S 99) (NEQ $S 199))introduces in Speed(200) partition with 2 elements
Transition t4_2 : guard parameter $S(Speed:200) in guard (OR (LEQ $S 99) (EQ $S 199))introduces in Speed(200) partition with 2 elements
Transition t4_1 : guard parameter $S(Speed:200) in guard (AND (GT $S 99) (NEQ $S 199))introduces in Speed(200) partition with 2 elements
Sort wr.t. initial and guards Speed has partition 2
Applying symmetric unfolding of partitioned symmetric sort :Speed domain size was 200 reducing to 2 values.
For transition t5_2:(OR (LEQ $S 99) (EQ $S 199)) -> (EQ $S 1)
For transition t5_1:(AND (GT $S 99) (NEQ $S 199)) -> (EQ $S 0)
For transition t4_2:(OR (LEQ $S 99) (EQ $S 199)) -> (EQ $S 1)
For transition t4_1:(AND (GT $S 99) (NEQ $S 199)) -> (EQ $S 0)
Symmetric sort wr.t. initial and guards and successors and join/free detected :Signal
Arc [19:1*[1]] contains constants of sort Signal
Transition t5_2 : constants on arcs in [[19:1*[1]]] introduces in Signal(2) partition with 1 elements that refines current partition to 2 subsets.
Symmetric sort wr.t. initial and guards and successors and join/free detected :Weight
Symmetric sort wr.t. initial detected :Weight
Transition t2_2 : guard parameter $W(Weight:2) in guard (EQ $W 1)introduces in Weight(2) partition with 2 elements
[2023-03-09 06:42:41] [INFO ] Unfolded HLPN to a Petri net with 29 places and 20 transitions 56 arcs in 32 ms.
[2023-03-09 06:42:41] [INFO ] Unfolded 16 HLPN properties in 0 ms.
Reduce places removed 6 places and 0 transitions.
Incomplete random walk after 10000 steps, including 1260 resets, run finished after 331 ms. (steps per millisecond=30 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 245 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 242 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 226 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 247 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 234 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 247 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 233 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 257 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 235 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 233 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 242 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 236 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 264 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 13) seen :0
Probably explored full state space saw : 485 states, properties seen :0
Probabilistic random walk after 2105 steps, saw 485 distinct states, run finished after 16 ms. (steps per millisecond=131 ) properties seen :0
Explored full state space saw : 485 states, properties seen :0
Exhaustive walk after 2105 steps, saw 485 distinct states, run finished after 5 ms. (steps per millisecond=421 ) properties seen :0
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
All properties solved without resorting to model-checking.
Total runtime 1863 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0200
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0200-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678344163369

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 3 AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/SRCH) for 3 AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 63 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: result : false
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 62 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: result : false
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: TR BINDINGS DONE
lola: Places: 1419, Transitions: 1608
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 57 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 45 AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 45 AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 45 AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 45 AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 57 (type SKEL/FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 56146
lola: tried executions : 9765
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 77 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: result : false
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 74 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 76 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 86 (type SKEL/FNDP) for 39 AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/EQUN) for 39 AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/SRCH) for 39 AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/SRCH) for 39 AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 90 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: result : false
lola: markings : 27
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 86 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 87 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 89 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 126 (type SKEL/FNDP) for 21 AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/EQUN) for 21 AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/SRCH) for 21 AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/SRCH) for 21 AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: result : false
lola: markings : 80
lola: fired transitions : 140
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans t2_1
lola: @ trans SampleRW
lola: FINISHED task # 129 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 126 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 127 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 130 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 100 (type SKEL/FNDP) for 12 AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type SKEL/EQUN) for 12 AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/SRCH) for 12 AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 104 (type SKEL/SRCH) for 12 AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans getAlt
lola: @ trans t3_2
lola: FINISHED task # 103 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: result : false
lola: markings : 22
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 100 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-04 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 101 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 104 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 33 AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/EQUN) for 33 AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 33 AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 33 AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans t4_1
lola: @ trans t1_2
lola: @ trans t1_1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
lola: @ trans SpeedLW
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
lola: @ trans t5_2
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans t5_1
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 82 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 80 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 83 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-11 (obsolete)

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-127.sara.
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 164 (type SKEL/FNDP) for 24 AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 165 (type SKEL/EQUN) for 24 AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 167 (type SKEL/SRCH) for 24 AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 168 (type SKEL/SRCH) for 24 AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans t2_2
lola: FINISHED task # 79 (type SKEL/FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 68365
lola: tried executions : 22790
lola: time used : 1.000000
lola: memory pages used : 0
lola: @ trans t3_1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 80 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-11

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : unknown
lola: FINISHED task # 168 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: @ trans SampleLW
lola: @ trans SpeedRW
lola: @ trans t4_2
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 164 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 165 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 167 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-08 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
sara: place or transition ordering is non-deterministic



lola: LAUNCH task # 106 (type SKEL/FNDP) for 27 AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SKEL/EQUN) for 27 AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/SRCH) for 27 AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 110 (type SKEL/SRCH) for 27 AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 167 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 164 (type SKEL/FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 31136
lola: tried executions : 31137
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 58 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 127 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-07
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-165.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 110 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: result : false
lola: markings : 39
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 106 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 107 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 109 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 118 (type SKEL/FNDP) for 6 AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/EQUN) for 6 AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH) for 6 AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 6 AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 106 (type SKEL/FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 255
lola: tried executions : 47
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 121 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: result : false
lola: markings : 52
lola: fired transitions : 73
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 118 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 119 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 122 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 93 (type SKEL/FNDP) for 42 AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/EQUN) for 42 AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-107.sara.
lola: LAUNCH task # 96 (type SKEL/SRCH) for 42 AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 97 (type SKEL/SRCH) for 42 AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 109 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-09
lola: result : false
lola: markings : 26
lola: fired transitions : 44
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 87 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-13
lola: result : false
lola: FINISHED task # 101 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-04
lola: result : false
lola: FINISHED task # 74 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-15
lola: result : false

lola: FINISHED task # 165 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-08
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-119.sara.

lola: FINISHED task # 107 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-09
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
lola: result : false
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 97 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: result : false
lola: markings : 25
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 96 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: result : false
lola: markings : 93
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 94 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 68 (type SKEL/FNDP) for 30 AirplaneLD-COL-0200-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/EQUN) for 30 AirplaneLD-COL-0200-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/SRCH) for 30 AirplaneLD-COL-0200-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 30 AirplaneLD-COL-0200-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 94 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: result : unknown
lola: FINISHED task # 93 (type SKEL/FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 434
lola: tried executions : 58
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 72 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-10
lola: result : false
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 68 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 69 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 71 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 149 (type SKEL/FNDP) for 9 AirplaneLD-COL-0200-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/EQUN) for 9 AirplaneLD-COL-0200-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH) for 9 AirplaneLD-COL-0200-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 153 (type SKEL/SRCH) for 9 AirplaneLD-COL-0200-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 152 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-03
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 149 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 150 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 153 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 157 (type SKEL/FNDP) for 15 AirplaneLD-COL-0200-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 158 (type SKEL/EQUN) for 15 AirplaneLD-COL-0200-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 160 (type SKEL/SRCH) for 15 AirplaneLD-COL-0200-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type SKEL/SRCH) for 15 AirplaneLD-COL-0200-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 160 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-05
lola: result : false
lola: markings : 93
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 157 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 158 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 161 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 53 (type SKEL/FNDP) for 36 AirplaneLD-COL-0200-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/EQUN) for 36 AirplaneLD-COL-0200-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 36 AirplaneLD-COL-0200-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 36 AirplaneLD-COL-0200-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 113 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-12
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 54 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 112 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 134 (type SKEL/FNDP) for 0 AirplaneLD-COL-0200-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SKEL/EQUN) for 0 AirplaneLD-COL-0200-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/SRCH) for 0 AirplaneLD-COL-0200-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SKEL/SRCH) for 0 AirplaneLD-COL-0200-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type SKEL/EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 138 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-00
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 134 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 135 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 137 (type SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 142 (type SKEL/FNDP) for 18 AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/EQUN) for 18 AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/SRCH) for 18 AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 146 (type SKEL/SRCH) for 18 AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 146 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 145 (type SKEL/SRCH) for AirplaneLD-COL-0200-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 142 (type FNDP) for AirplaneLD-COL-0200-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 143 (type EQUN) for AirplaneLD-COL-0200-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0200-ReachabilityCardinality-00: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-02: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-08: EF false skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-09: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-10: EF false skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-12: AG true skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-13: EF false skeleton: tandem / relaxed
AirplaneLD-COL-0200-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
AirplaneLD-COL-0200-ReachabilityCardinality-15: AG true skeleton: tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0200"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is AirplaneLD-COL-0200, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-oct2-167813595200206"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0200.tgz
mv AirplaneLD-COL-0200 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;