fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r006-oct2-167813593900180
Last Updated
May 14, 2023

About the Execution of LoLA for AirplaneLD-COL-0020

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
204.852 3798.00 8616.00 10.10 TFFFFFFTFTFFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813593900180.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is AirplaneLD-COL-0020, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813593900180
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 8.2K Feb 26 11:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 11:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 11:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 11:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 15:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 15:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 15:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 11:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Feb 26 11:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 26 11:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 87K Feb 26 11:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 41K Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-00
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-01
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-02
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-03
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-04
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-05
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-06
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-07
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-08
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-09
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-10
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-11
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-12
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-13
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-14
FORMULA_NAME AirplaneLD-COL-0020-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678286540136

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=AirplaneLD-COL-0020
Not applying reductions.
Model is COL
LTLFireability PT
[2023-03-08 14:42:22] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, LTLFireability, --reduce-single, STATESPACE]
[2023-03-08 14:42:22] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-08 14:42:22] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-08 14:42:22] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-08 14:42:23] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 642 ms
[2023-03-08 14:42:23] [INFO ] Detected 3 constant HL places corresponding to 62 PT places.
[2023-03-08 14:42:23] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 159 PT places and 252.0 transition bindings in 16 ms.
Parsed 16 properties from file ./LTLFireability.xml in 46 ms.
[2023-03-08 14:42:23] [INFO ] Unfolded HLPN to a Petri net with 159 places and 168 transitions 470 arcs in 19 ms.
[2023-03-08 14:42:23] [INFO ] Unfolded 16 HLPN properties in 0 ms.
Initial state reduction rules removed 1 formulas.
[2023-03-08 14:42:23] [INFO ] Reduced 39 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 1 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 19 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 39 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 39 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 19 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 19 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 19 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 19 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Reduced 39 identical enabling conditions.
[2023-03-08 14:42:23] [INFO ] Export to MCC of 16 properties in file ./LTLFireability.STATESPACE.xml took 9 ms.
[2023-03-08 14:42:23] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 159 places, 168 transitions and 470 arcs took 3 ms.
Total runtime 891 ms.
starting LoLA
BK_INPUT AirplaneLD-COL-0020
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfLTLFireability
LTLCardinality

FORMULA AirplaneLD-COL-0020-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-0020-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678286543934

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfLTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfLTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfLTLFireability/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:527
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 72 (type SKEL/SRCH) for 0 AirplaneLD-COL-0020-LTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-00
lola: result : true
lola: markings : 825
lola: fired transitions : 1620
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 73 (type SKEL/SRCH) for 3 AirplaneLD-COL-0020-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: planning for AirplaneLD-COL-0020-LTLFireability-00 stopped (result already fixed).
lola: LAUNCH task # 48 (type CNST) for 39 AirplaneLD-COL-0020-LTLFireability-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 48 (type CNST) for AirplaneLD-COL-0020-LTLFireability-09
lola: result : true
lola: FINISHED task # 73 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-01
lola: result : false
lola: markings : 59
lola: fired transitions : 99
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 75 (type SKEL/SRCH) for 3 AirplaneLD-COL-0020-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-01
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 77 (type SKEL/SRCH) for 36 AirplaneLD-COL-0020-LTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 19 AirplaneLD-COL-0020-LTLFireability-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 67 (type CNST) for 66 AirplaneLD-COL-0020-LTLFireability-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 14 (type EXCL) for 13 AirplaneLD-COL-0020-LTLFireability-03
lola: time limit : 105 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type CNST) for AirplaneLD-COL-0020-LTLFireability-05
lola: result : true
lola: FINISHED task # 14 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-03
lola: result : false
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 77 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-08
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 67 (type CNST) for AirplaneLD-COL-0020-LTLFireability-14
lola: result : false
lola: LAUNCH task # 11 (type EXCL) for 10 AirplaneLD-COL-0020-LTLFireability-02
lola: time limit : 120 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-02
lola: result : false
lola: markings : 17
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 34 (type EXCL) for 33 AirplaneLD-COL-0020-LTLFireability-07
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 78 (type SKEL/SRCH) for 57 AirplaneLD-COL-0020-LTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 78 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-11
lola: result : false
lola: markings : 15
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 26 AirplaneLD-COL-0020-LTLFireability-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-07
lola: result : true
lola: markings : 2411
lola: fired transitions : 4734
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 AirplaneLD-COL-0020-LTLFireability-11
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-11
lola: result : false
lola: markings : 25
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 53 (type EXCL) for 50 AirplaneLD-COL-0020-LTLFireability-10
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: NOTDEADLOCKFREE
lola: FINISHED task # 31 (type CNST) for AirplaneLD-COL-0020-LTLFireability-06
lola: result : true
lola: FINISHED task # 53 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-10
lola: result : false
lola: markings : 65
lola: fired transitions : 65
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 26 AirplaneLD-COL-0020-LTLFireability-06
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-06
lola: result : false
lola: markings : 493
lola: fired transitions : 973
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 AirplaneLD-COL-0020-LTLFireability-04
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 17 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-04
lola: result : false
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 81 (type EXCL) for 3 AirplaneLD-COL-0020-LTLFireability-01
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 81 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-01
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 36 AirplaneLD-COL-0020-LTLFireability-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 79 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-08
lola: result : true
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 42 (type EXCL) for 39 AirplaneLD-COL-0020-LTLFireability-09
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 82 (type SKEL/SRCH) for 39 AirplaneLD-COL-0020-LTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: FINISHED task # 82 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-09
lola: result : true
lola: markings : 582
lola: fired transitions : 1195
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 84 (type SKEL/SRCH) for 63 AirplaneLD-COL-0020-LTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 39 AirplaneLD-COL-0020-LTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-13
lola: result : false
lola: markings : 12
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: FINISHED task # 83 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-09
lola: result : true
lola: markings : 187
lola: fired transitions : 426
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 42 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-09 (obsolete)
lola: LAUNCH task # 61 (type EXCL) for 60 AirplaneLD-COL-0020-LTLFireability-12
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 69 AirplaneLD-COL-0020-LTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-12
lola: result : false
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 85 (type SKEL/SRCH) for AirplaneLD-COL-0020-LTLFireability-15
lola: result : true
lola: markings : 222
lola: fired transitions : 399
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 63 AirplaneLD-COL-0020-LTLFireability-13
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-13
lola: result : false
lola: markings : 10
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 19 AirplaneLD-COL-0020-LTLFireability-05
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for AirplaneLD-COL-0020-LTLFireability-05
lola: result : false
lola: markings : 9
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-0020-LTLFireability-00: LTL true skeleton: LTL model checker
AirplaneLD-COL-0020-LTLFireability-01: CONJ false state space / EG
AirplaneLD-COL-0020-LTLFireability-02: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-03: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-04: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-05: CONJ false LTL model checker
AirplaneLD-COL-0020-LTLFireability-06: CONJ false LTL model checker
AirplaneLD-COL-0020-LTLFireability-07: LTL true LTL model checker
AirplaneLD-COL-0020-LTLFireability-08: F false state space / EG
AirplaneLD-COL-0020-LTLFireability-09: CONJ true CONJ
AirplaneLD-COL-0020-LTLFireability-10: CONJ false LTL model checker
AirplaneLD-COL-0020-LTLFireability-11: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-12: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-13: LTL false LTL model checker
AirplaneLD-COL-0020-LTLFireability-14: INITIAL false preprocessing
AirplaneLD-COL-0020-LTLFireability-15: LTL true skeleton: LTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0020"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-0020, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813593900180"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0020.tgz
mv AirplaneLD-COL-0020 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;