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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r006-oct2-167813593700002
Last Updated
May 14, 2023

About the Execution of LoLA for ARMCacheCoherence-PT-none

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
10264.628 3600000.00 2410950.00 60.00 ?TT?T???TTT???FF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r006-oct2-167813593700002.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 backing_fmt=qcow2 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ARMCacheCoherence-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-oct2-167813593700002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 6.6K Feb 25 21:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 21:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 25 21:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 25 21:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 15:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 15:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 15:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 15:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 25 21:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 163K Feb 25 21:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.0K Feb 25 21:46 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 25 21:46 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 15:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 15:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:22 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:22 iscolored
-rw-r--r-- 1 mcc users 14M Mar 5 18:22 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678267763358

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ARMCacheCoherence-PT-none
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT ARMCacheCoherence-PT-none
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA ARMCacheCoherence-PT-none-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393220 kB
MemFree: 5937356 kB
After kill :
MemTotal: 16393220 kB
MemFree: 16152836 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 ARMCacheCoherence-PT-none-CTLFireability-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 20 (type EXCL) for 17 ARMCacheCoherence-PT-none-CTLFireability-03
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for ARMCacheCoherence-PT-none-CTLFireability-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 43 (type CNST) for ARMCacheCoherence-PT-none-CTLFireability-10
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 55 (type CNST) for 54 ARMCacheCoherence-PT-none-CTLFireability-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 55 (type CNST) for ARMCacheCoherence-PT-none-CTLFireability-14
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 25 (type EXCL) for 24 ARMCacheCoherence-PT-none-CTLFireability-04
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 25 (type EXCL) for ARMCacheCoherence-PT-none-CTLFireability-04
lola: result : true
lola: markings : 24995
lola: fired transitions : 180182
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 ARMCacheCoherence-PT-none-CTLFireability-13
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 64 (type FNDP) for 14 ARMCacheCoherence-PT-none-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type FNDP) for 3 ARMCacheCoherence-PT-none-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 3 ARMCacheCoherence-PT-none-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: try reading problem file /home/mcc/execution/CTLFireability-63.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 63 (type EQUN) for ARMCacheCoherence-PT-none-CTLFireability-01
lola: result : true
lola: CANCELED task # 61 (type FNDP) for ARMCacheCoherence-PT-none-CTLFireability-01 (obsolete)
lola: FINISHED task # 61 (type FNDP) for ARMCacheCoherence-PT-none-CTLFireability-01
lola: result : unknown
lola: fired transitions : 735
lola: tried executions : 2
lola: time used : 1.000000
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-CTLFireability-01: DISJ true state equation
ARMCacheCoherence-PT-none-CTLFireability-04: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLFireability-10: INITIAL true preprocessing
ARMCacheCoherence-PT-none-CTLFireability-14: INITIAL false preprocessing

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ARMCacheCoherence-PT-none-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
ARMCacheCoherence-PT-none-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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ARMCacheCoherence-PT-none-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
ARMCacheCoherence-PT-none-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
52 CTL EXCL 3/299 1/32 ARMCacheCoherence-PT-none-CTLFireability-13 227287 m, 45457 m/sec, 910055 t fired, .
64 EF DL FNDP 3/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 37609 t fired, 1 attempts, .

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52 CTL EXCL 8/299 4/32 ARMCacheCoherence-PT-none-CTLFireability-13 761294 m, 106801 m/sec, 3398416 t fired, .
64 EF DL FNDP 8/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 130513 t fired, 1 attempts, .

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52 CTL EXCL 13/299 6/32 ARMCacheCoherence-PT-none-CTLFireability-13 1255250 m, 98791 m/sec, 5878341 t fired, .
64 EF DL FNDP 13/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 223683 t fired, 1 attempts, .

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52 CTL EXCL 18/299 8/32 ARMCacheCoherence-PT-none-CTLFireability-13 1721069 m, 93163 m/sec, 8278419 t fired, .
64 EF DL FNDP 18/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 316698 t fired, 1 attempts, .

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52 CTL EXCL 23/299 10/32 ARMCacheCoherence-PT-none-CTLFireability-13 2182994 m, 92385 m/sec, 10689638 t fired, .
64 EF DL FNDP 23/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 409708 t fired, 1 attempts, .

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52 CTL EXCL 28/299 11/32 ARMCacheCoherence-PT-none-CTLFireability-13 2640533 m, 91507 m/sec, 13137865 t fired, .
64 EF DL FNDP 28/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 502443 t fired, 1 attempts, .

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52 CTL EXCL 33/299 13/32 ARMCacheCoherence-PT-none-CTLFireability-13 3079934 m, 87880 m/sec, 15561163 t fired, .
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52 CTL EXCL 38/299 15/32 ARMCacheCoherence-PT-none-CTLFireability-13 3510984 m, 86210 m/sec, 17984522 t fired, .
64 EF DL FNDP 38/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 688300 t fired, 1 attempts, .

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52 CTL EXCL 43/299 17/32 ARMCacheCoherence-PT-none-CTLFireability-13 3937654 m, 85334 m/sec, 20414770 t fired, .
64 EF DL FNDP 43/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 781632 t fired, 1 attempts, .

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52 CTL EXCL 48/299 19/32 ARMCacheCoherence-PT-none-CTLFireability-13 4356699 m, 83809 m/sec, 22855757 t fired, .
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52 CTL EXCL 53/299 20/32 ARMCacheCoherence-PT-none-CTLFireability-13 4773365 m, 83333 m/sec, 25328605 t fired, .
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52 CTL EXCL 58/299 22/32 ARMCacheCoherence-PT-none-CTLFireability-13 5181053 m, 81537 m/sec, 27814106 t fired, .
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52 CTL EXCL 63/299 24/32 ARMCacheCoherence-PT-none-CTLFireability-13 5580683 m, 79926 m/sec, 30305233 t fired, .
64 EF DL FNDP 63/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 1155011 t fired, 2 attempts, .

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52 CTL EXCL 68/299 25/32 ARMCacheCoherence-PT-none-CTLFireability-13 5977067 m, 79276 m/sec, 32824437 t fired, .
64 EF DL FNDP 68/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 1248837 t fired, 2 attempts, .

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52 CTL EXCL 73/299 27/32 ARMCacheCoherence-PT-none-CTLFireability-13 6366987 m, 77984 m/sec, 35358177 t fired, .
64 EF DL FNDP 73/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 1342758 t fired, 2 attempts, .

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52 CTL EXCL 78/299 28/32 ARMCacheCoherence-PT-none-CTLFireability-13 6754405 m, 77483 m/sec, 37963055 t fired, .
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52 CTL EXCL 83/299 30/32 ARMCacheCoherence-PT-none-CTLFireability-13 7137289 m, 76576 m/sec, 40648066 t fired, .
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52 CTL EXCL 88/299 32/32 ARMCacheCoherence-PT-none-CTLFireability-13 7517330 m, 76008 m/sec, 43340905 t fired, .
64 EF DL FNDP 88/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 1624769 t fired, 2 attempts, .

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64 EF DL FNDP 93/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 1718728 t fired, 2 attempts, .

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49 CTL EXCL 5/350 4/32 ARMCacheCoherence-PT-none-CTLFireability-12 902778 m, 180555 m/sec, 3163352 t fired, .
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49 CTL EXCL 10/350 7/32 ARMCacheCoherence-PT-none-CTLFireability-12 1644236 m, 148291 m/sec, 6178846 t fired, .
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49 CTL EXCL 15/350 10/32 ARMCacheCoherence-PT-none-CTLFireability-12 2316078 m, 134368 m/sec, 8995837 t fired, .
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49 CTL EXCL 20/350 13/32 ARMCacheCoherence-PT-none-CTLFireability-12 2947871 m, 126358 m/sec, 11761320 t fired, .
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49 CTL EXCL 25/350 15/32 ARMCacheCoherence-PT-none-CTLFireability-12 3567007 m, 123827 m/sec, 14569654 t fired, .
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49 CTL EXCL 30/350 18/32 ARMCacheCoherence-PT-none-CTLFireability-12 4159306 m, 118459 m/sec, 17348474 t fired, .
64 EF DL FNDP 123/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2282434 t fired, 3 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 CTL EXCL 35/350 20/32 ARMCacheCoherence-PT-none-CTLFireability-12 4729708 m, 114080 m/sec, 20112562 t fired, .
64 EF DL FNDP 128/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2376345 t fired, 3 attempts, .

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49 CTL EXCL 40/350 22/32 ARMCacheCoherence-PT-none-CTLFireability-12 5282719 m, 110602 m/sec, 22884630 t fired, .
64 EF DL FNDP 133/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2470227 t fired, 3 attempts, .

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49 CTL EXCL 45/350 25/32 ARMCacheCoherence-PT-none-CTLFireability-12 5822892 m, 108034 m/sec, 25690113 t fired, .
64 EF DL FNDP 138/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2564034 t fired, 3 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 CTL EXCL 50/350 27/32 ARMCacheCoherence-PT-none-CTLFireability-12 6343314 m, 104084 m/sec, 28501525 t fired, .
64 EF DL FNDP 143/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2657840 t fired, 3 attempts, .

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49 CTL EXCL 55/350 29/32 ARMCacheCoherence-PT-none-CTLFireability-12 6855627 m, 102462 m/sec, 31384457 t fired, .
64 EF DL FNDP 148/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2751524 t fired, 3 attempts, .

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49 CTL EXCL 60/350 31/32 ARMCacheCoherence-PT-none-CTLFireability-12 7345639 m, 98002 m/sec, 34386278 t fired, .
64 EF DL FNDP 153/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 2845187 t fired, 3 attempts, .

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34 CTL EXCL 4/490 2/32 ARMCacheCoherence-PT-none-CTLFireability-07 426495 m, 85299 m/sec, 1791142 t fired, .
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34 CTL EXCL 9/490 4/32 ARMCacheCoherence-PT-none-CTLFireability-07 897869 m, 94274 m/sec, 4067711 t fired, .
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34 CTL EXCL 19/490 8/32 ARMCacheCoherence-PT-none-CTLFireability-07 1801122 m, 94155 m/sec, 8671589 t fired, .
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34 CTL EXCL 29/490 12/32 ARMCacheCoherence-PT-none-CTLFireability-07 2693673 m, 88440 m/sec, 13410576 t fired, .
64 EF DL FNDP 188/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 3526102 t fired, 4 attempts, .

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34 CTL EXCL 34/490 13/32 ARMCacheCoherence-PT-none-CTLFireability-07 3130819 m, 87429 m/sec, 15815638 t fired, .
64 EF DL FNDP 193/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 3624585 t fired, 4 attempts, .

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34 CTL EXCL 39/490 15/32 ARMCacheCoherence-PT-none-CTLFireability-07 3559291 m, 85694 m/sec, 18234446 t fired, .
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34 CTL EXCL 44/490 17/32 ARMCacheCoherence-PT-none-CTLFireability-07 3981382 m, 84418 m/sec, 20646765 t fired, .
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34 CTL EXCL 49/490 19/32 ARMCacheCoherence-PT-none-CTLFireability-07 4395384 m, 82800 m/sec, 23058194 t fired, .
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34 CTL EXCL 54/490 20/32 ARMCacheCoherence-PT-none-CTLFireability-07 4807552 m, 82433 m/sec, 25512456 t fired, .
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34 CTL EXCL 59/490 22/32 ARMCacheCoherence-PT-none-CTLFireability-07 5211209 m, 80731 m/sec, 27976584 t fired, .
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34 CTL EXCL 64/490 24/32 ARMCacheCoherence-PT-none-CTLFireability-07 5613040 m, 80366 m/sec, 30476092 t fired, .
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34 CTL EXCL 69/490 25/32 ARMCacheCoherence-PT-none-CTLFireability-07 6008180 m, 79028 m/sec, 32981437 t fired, .
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34 CTL EXCL 74/490 27/32 ARMCacheCoherence-PT-none-CTLFireability-07 6396332 m, 77630 m/sec, 35500924 t fired, .
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34 CTL EXCL 79/490 28/32 ARMCacheCoherence-PT-none-CTLFireability-07 6777229 m, 76179 m/sec, 38070562 t fired, .
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34 CTL EXCL 84/490 30/32 ARMCacheCoherence-PT-none-CTLFireability-07 7154153 m, 75384 m/sec, 40764927 t fired, .
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34 CTL EXCL 89/490 32/32 ARMCacheCoherence-PT-none-CTLFireability-07 7531101 m, 75389 m/sec, 43429377 t fired, .
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28 CTL EXCL 5/556 3/32 ARMCacheCoherence-PT-none-CTLFireability-05 628078 m, 125615 m/sec, 2115897 t fired, .
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28 CTL EXCL 10/556 5/32 ARMCacheCoherence-PT-none-CTLFireability-05 1174710 m, 109326 m/sec, 4297091 t fired, .
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28 CTL EXCL 15/556 8/32 ARMCacheCoherence-PT-none-CTLFireability-05 1687373 m, 102532 m/sec, 6418189 t fired, .
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28 CTL EXCL 20/556 10/32 ARMCacheCoherence-PT-none-CTLFireability-05 2185153 m, 99556 m/sec, 8525960 t fired, .
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28 CTL EXCL 25/556 12/32 ARMCacheCoherence-PT-none-CTLFireability-05 2665952 m, 96159 m/sec, 10616723 t fired, .
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28 CTL EXCL 30/556 13/32 ARMCacheCoherence-PT-none-CTLFireability-05 3130801 m, 92969 m/sec, 12707027 t fired, .
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28 CTL EXCL 35/556 15/32 ARMCacheCoherence-PT-none-CTLFireability-05 3582960 m, 90431 m/sec, 14787881 t fired, .
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28 CTL EXCL 40/556 17/32 ARMCacheCoherence-PT-none-CTLFireability-05 4026752 m, 88758 m/sec, 16881058 t fired, .
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28 CTL EXCL 45/556 19/32 ARMCacheCoherence-PT-none-CTLFireability-05 4461025 m, 86854 m/sec, 18983547 t fired, .
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28 CTL EXCL 50/556 21/32 ARMCacheCoherence-PT-none-CTLFireability-05 4889462 m, 85687 m/sec, 21117240 t fired, .
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28 CTL EXCL 55/556 22/32 ARMCacheCoherence-PT-none-CTLFireability-05 5314553 m, 85018 m/sec, 23291351 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 65/556 26/32 ARMCacheCoherence-PT-none-CTLFireability-05 6149215 m, 82822 m/sec, 27751168 t fired, .
64 EF DL FNDP 318/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 5988770 t fired, 6 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-08: CTL true CTL model checker
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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 70/556 28/32 ARMCacheCoherence-PT-none-CTLFireability-05 6552262 m, 80609 m/sec, 29997634 t fired, .
64 EF DL FNDP 323/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6081786 t fired, 7 attempts, .

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28 CTL EXCL 75/556 29/32 ARMCacheCoherence-PT-none-CTLFireability-05 6949757 m, 79499 m/sec, 32309341 t fired, .
64 EF DL FNDP 328/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6175060 t fired, 7 attempts, .

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28 CTL EXCL 80/556 31/32 ARMCacheCoherence-PT-none-CTLFireability-05 7342911 m, 78630 m/sec, 34738067 t fired, .
64 EF DL FNDP 333/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6268294 t fired, 7 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 85/556 32/32 ARMCacheCoherence-PT-none-CTLFireability-05 7732713 m, 77960 m/sec, 37191833 t fired, .
64 EF DL FNDP 338/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6361710 t fired, 7 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF DL FNDP 343/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6454929 t fired, 7 attempts, .

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22 CTL EXCL 5/650 3/32 ARMCacheCoherence-PT-none-CTLFireability-03 527335 m, 105467 m/sec, 2796053 t fired, .
64 EF DL FNDP 348/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6548459 t fired, 7 attempts, .

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22 CTL EXCL 10/650 5/32 ARMCacheCoherence-PT-none-CTLFireability-03 978021 m, 90137 m/sec, 5458613 t fired, .
64 EF DL FNDP 353/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6642098 t fired, 7 attempts, .

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22 CTL EXCL 15/650 6/32 ARMCacheCoherence-PT-none-CTLFireability-03 1362611 m, 76918 m/sec, 7790220 t fired, .
64 EF DL FNDP 358/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 6735771 t fired, 7 attempts, .

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22 CTL EXCL 20/650 8/32 ARMCacheCoherence-PT-none-CTLFireability-03 1786384 m, 84754 m/sec, 10406743 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 25/650 10/32 ARMCacheCoherence-PT-none-CTLFireability-03 2227602 m, 88243 m/sec, 13166478 t fired, .
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22 CTL EXCL 30/650 12/32 ARMCacheCoherence-PT-none-CTLFireability-03 2656351 m, 85749 m/sec, 15899279 t fired, .
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22 CTL EXCL 35/650 13/32 ARMCacheCoherence-PT-none-CTLFireability-03 3063224 m, 81374 m/sec, 18541679 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 40/650 15/32 ARMCacheCoherence-PT-none-CTLFireability-03 3464018 m, 80158 m/sec, 21192136 t fired, .
64 EF DL FNDP 383/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7202749 t fired, 8 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 45/650 17/32 ARMCacheCoherence-PT-none-CTLFireability-03 3865081 m, 80212 m/sec, 23865686 t fired, .
64 EF DL FNDP 388/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7295574 t fired, 8 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 50/650 18/32 ARMCacheCoherence-PT-none-CTLFireability-03 4258586 m, 78701 m/sec, 26536358 t fired, .
64 EF DL FNDP 393/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7388621 t fired, 8 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 55/650 20/32 ARMCacheCoherence-PT-none-CTLFireability-03 4639135 m, 76109 m/sec, 29162715 t fired, .
64 EF DL FNDP 398/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7481441 t fired, 8 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 60/650 21/32 ARMCacheCoherence-PT-none-CTLFireability-03 5009434 m, 74059 m/sec, 31768711 t fired, .
64 EF DL FNDP 403/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7573529 t fired, 8 attempts, .

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22 CTL EXCL 65/650 23/32 ARMCacheCoherence-PT-none-CTLFireability-03 5377127 m, 73538 m/sec, 34407052 t fired, .
64 EF DL FNDP 408/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7665707 t fired, 8 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 70/650 24/32 ARMCacheCoherence-PT-none-CTLFireability-03 5741927 m, 72960 m/sec, 37058498 t fired, .
64 EF DL FNDP 413/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7758481 t fired, 8 attempts, .

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22 CTL EXCL 75/650 26/32 ARMCacheCoherence-PT-none-CTLFireability-03 6102903 m, 72195 m/sec, 39733856 t fired, .
64 EF DL FNDP 418/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7851231 t fired, 8 attempts, .

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22 CTL EXCL 80/650 27/32 ARMCacheCoherence-PT-none-CTLFireability-03 6459879 m, 71395 m/sec, 42444027 t fired, .
64 EF DL FNDP 423/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 7943990 t fired, 8 attempts, .

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22 CTL EXCL 85/650 29/32 ARMCacheCoherence-PT-none-CTLFireability-03 6812876 m, 70599 m/sec, 45183512 t fired, .
64 EF DL FNDP 428/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 8036722 t fired, 9 attempts, .

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22 CTL EXCL 90/650 30/32 ARMCacheCoherence-PT-none-CTLFireability-03 7162955 m, 70015 m/sec, 47958389 t fired, .
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22 CTL EXCL 95/650 31/32 ARMCacheCoherence-PT-none-CTLFireability-03 7507750 m, 68959 m/sec, 50834030 t fired, .
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1 CTL EXCL 5/787 2/32 ARMCacheCoherence-PT-none-CTLFireability-00 378296 m, 75659 m/sec, 2796489 t fired, .
64 EF DL FNDP 448/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 8408986 t fired, 9 attempts, .

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1 CTL EXCL 10/787 3/32 ARMCacheCoherence-PT-none-CTLFireability-00 697532 m, 63847 m/sec, 5344915 t fired, .
64 EF DL FNDP 453/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 8502443 t fired, 9 attempts, .

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1 CTL EXCL 15/787 5/32 ARMCacheCoherence-PT-none-CTLFireability-00 1034658 m, 67425 m/sec, 8101542 t fired, .
64 EF DL FNDP 458/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 8596321 t fired, 9 attempts, .

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1 CTL EXCL 20/787 6/32 ARMCacheCoherence-PT-none-CTLFireability-00 1380171 m, 69102 m/sec, 10956315 t fired, .
64 EF DL FNDP 463/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 8689471 t fired, 9 attempts, .

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1 CTL EXCL 25/787 8/32 ARMCacheCoherence-PT-none-CTLFireability-00 1718939 m, 67753 m/sec, 13799259 t fired, .
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1 CTL EXCL 30/787 9/32 ARMCacheCoherence-PT-none-CTLFireability-00 2049261 m, 66064 m/sec, 16578647 t fired, .
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1 CTL EXCL 35/787 10/32 ARMCacheCoherence-PT-none-CTLFireability-00 2372838 m, 64715 m/sec, 19334178 t fired, .
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1 CTL EXCL 40/787 12/32 ARMCacheCoherence-PT-none-CTLFireability-00 2701028 m, 65638 m/sec, 22168102 t fired, .
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1 CTL EXCL 45/787 13/32 ARMCacheCoherence-PT-none-CTLFireability-00 3027576 m, 65309 m/sec, 25007732 t fired, .
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1 CTL EXCL 50/787 14/32 ARMCacheCoherence-PT-none-CTLFireability-00 3346254 m, 63735 m/sec, 27810352 t fired, .
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1 CTL EXCL 55/787 16/32 ARMCacheCoherence-PT-none-CTLFireability-00 3655099 m, 61769 m/sec, 30549615 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 70/787 19/32 ARMCacheCoherence-PT-none-CTLFireability-00 4553252 m, 58898 m/sec, 38654247 t fired, .
64 EF DL FNDP 513/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 9618962 t fired, 10 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 75/787 21/32 ARMCacheCoherence-PT-none-CTLFireability-00 4843010 m, 57951 m/sec, 41326494 t fired, .
64 EF DL FNDP 518/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 9711810 t fired, 10 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 80/787 22/32 ARMCacheCoherence-PT-none-CTLFireability-00 5131537 m, 57705 m/sec, 44015412 t fired, .
64 EF DL FNDP 523/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 9804643 t fired, 10 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 85/787 23/32 ARMCacheCoherence-PT-none-CTLFireability-00 5432107 m, 60114 m/sec, 46849697 t fired, .
64 EF DL FNDP 528/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 9897603 t fired, 10 attempts, .

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ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 90/787 24/32 ARMCacheCoherence-PT-none-CTLFireability-00 5737010 m, 60980 m/sec, 49756432 t fired, .
64 EF DL FNDP 533/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 9990809 t fired, 10 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 95/787 25/32 ARMCacheCoherence-PT-none-CTLFireability-00 6038399 m, 60277 m/sec, 52661891 t fired, .
64 EF DL FNDP 538/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10084857 t fired, 11 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 100/787 27/32 ARMCacheCoherence-PT-none-CTLFireability-00 6337173 m, 59754 m/sec, 55575911 t fired, .
64 EF DL FNDP 543/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10178815 t fired, 11 attempts, .

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1 CTL EXCL 105/787 28/32 ARMCacheCoherence-PT-none-CTLFireability-00 6631081 m, 58781 m/sec, 58486317 t fired, .
64 EF DL FNDP 548/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10272877 t fired, 11 attempts, .

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1 CTL EXCL 110/787 29/32 ARMCacheCoherence-PT-none-CTLFireability-00 6922775 m, 58338 m/sec, 61428062 t fired, .
64 EF DL FNDP 553/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10367027 t fired, 11 attempts, .

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1 CTL EXCL 115/787 30/32 ARMCacheCoherence-PT-none-CTLFireability-00 7210728 m, 57590 m/sec, 64410141 t fired, .
64 EF DL FNDP 558/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10461110 t fired, 11 attempts, .

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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 120/787 31/32 ARMCacheCoherence-PT-none-CTLFireability-00 7494678 m, 56790 m/sec, 67340050 t fired, .
64 EF DL FNDP 563/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10555218 t fired, 11 attempts, .

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64 EF DL FNDP 568/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10649302 t fired, 11 attempts, .

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62 EF DL EXCL 5/1008 1/32 ARMCacheCoherence-PT-none-CTLFireability-02 59462 m, 11892 m/sec, 330184 t fired, .
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62 EF DL EXCL 10/1008 1/32 ARMCacheCoherence-PT-none-CTLFireability-02 118242 m, 11756 m/sec, 689759 t fired, .
64 EF DL FNDP 578/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 10837932 t fired, 11 attempts, .

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62 EF DL EXCL 15/1008 1/32 ARMCacheCoherence-PT-none-CTLFireability-02 176394 m, 11630 m/sec, 1095136 t fired, .
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62 EF DL EXCL 20/1008 1/32 ARMCacheCoherence-PT-none-CTLFireability-02 233691 m, 11459 m/sec, 1565260 t fired, .
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62 EF DL EXCL 25/1008 1/32 ARMCacheCoherence-PT-none-CTLFireability-02 290502 m, 11362 m/sec, 2084308 t fired, .
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62 EF DL EXCL 75/1008 3/32 ARMCacheCoherence-PT-none-CTLFireability-02 809740 m, 5336 m/sec, 12918155 t fired, .
64 EF DL FNDP 643/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 12064303 t fired, 13 attempts, .

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62 EF DL EXCL 80/1008 3/32 ARMCacheCoherence-PT-none-CTLFireability-02 869969 m, 12045 m/sec, 13274915 t fired, .
64 EF DL FNDP 648/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 12157025 t fired, 13 attempts, .

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62 EF DL EXCL 85/1008 4/32 ARMCacheCoherence-PT-none-CTLFireability-02 929205 m, 11847 m/sec, 13662395 t fired, .
64 EF DL FNDP 653/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 12249759 t fired, 13 attempts, .

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62 EF DL EXCL 90/1008 4/32 ARMCacheCoherence-PT-none-CTLFireability-02 987483 m, 11655 m/sec, 14130875 t fired, .
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62 EF DL EXCL 95/1008 4/32 ARMCacheCoherence-PT-none-CTLFireability-02 1045150 m, 11533 m/sec, 14660782 t fired, .
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62 EF DL EXCL 100/1008 4/32 ARMCacheCoherence-PT-none-CTLFireability-02 1102117 m, 11393 m/sec, 15278841 t fired, .
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62 EF DL EXCL 105/1008 4/32 ARMCacheCoherence-PT-none-CTLFireability-02 1158486 m, 11273 m/sec, 15935228 t fired, .
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62 EF DL EXCL 110/1008 5/32 ARMCacheCoherence-PT-none-CTLFireability-02 1214732 m, 11249 m/sec, 16564741 t fired, .
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62 EF DL EXCL 115/1008 5/32 ARMCacheCoherence-PT-none-CTLFireability-02 1270731 m, 11199 m/sec, 17276115 t fired, .
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62 EF DL EXCL 120/1008 5/32 ARMCacheCoherence-PT-none-CTLFireability-02 1326722 m, 11198 m/sec, 17986693 t fired, .
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62 EF DL EXCL 125/1008 5/32 ARMCacheCoherence-PT-none-CTLFireability-02 1382297 m, 11115 m/sec, 18729340 t fired, .
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62 EF DL EXCL 140/1008 6/32 ARMCacheCoherence-PT-none-CTLFireability-02 1543879 m, 10366 m/sec, 20976925 t fired, .
64 EF DL FNDP 708/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 13274963 t fired, 14 attempts, .

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62 EF DL EXCL 145/1008 6/32 ARMCacheCoherence-PT-none-CTLFireability-02 1593541 m, 9932 m/sec, 22127683 t fired, .
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62 EF DL EXCL 150/1008 6/32 ARMCacheCoherence-PT-none-CTLFireability-02 1623396 m, 5971 m/sec, 26488010 t fired, .
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62 EF DL EXCL 155/1008 6/32 ARMCacheCoherence-PT-none-CTLFireability-02 1687108 m, 12742 m/sec, 26805724 t fired, .
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62 EF DL EXCL 160/1008 6/32 ARMCacheCoherence-PT-none-CTLFireability-02 1751606 m, 12899 m/sec, 27134129 t fired, .
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62 EF DL EXCL 165/1008 7/32 ARMCacheCoherence-PT-none-CTLFireability-02 1816148 m, 12908 m/sec, 27469537 t fired, .
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62 EF DL EXCL 170/1008 7/32 ARMCacheCoherence-PT-none-CTLFireability-02 1880845 m, 12939 m/sec, 27811415 t fired, .
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62 EF DL EXCL 175/1008 7/32 ARMCacheCoherence-PT-none-CTLFireability-02 1945783 m, 12987 m/sec, 28154087 t fired, .
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62 EF DL EXCL 180/1008 7/32 ARMCacheCoherence-PT-none-CTLFireability-02 2010660 m, 12975 m/sec, 28499646 t fired, .
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62 EF DL EXCL 185/1008 8/32 ARMCacheCoherence-PT-none-CTLFireability-02 2076132 m, 13094 m/sec, 28852911 t fired, .
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62 EF DL EXCL 205/1008 8/32 ARMCacheCoherence-PT-none-CTLFireability-02 2337870 m, 13209 m/sec, 30322968 t fired, .
64 EF DL FNDP 773/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 14499784 t fired, 15 attempts, .

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62 EF DL EXCL 211/1008 9/32 ARMCacheCoherence-PT-none-CTLFireability-02 2404070 m, 13240 m/sec, 30700573 t fired, .
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62 EF DL EXCL 216/1008 9/32 ARMCacheCoherence-PT-none-CTLFireability-02 2470282 m, 13242 m/sec, 31101429 t fired, .
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62 EF DL EXCL 221/1008 9/32 ARMCacheCoherence-PT-none-CTLFireability-02 2536633 m, 13270 m/sec, 31495515 t fired, .
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62 EF DL EXCL 271/1008 11/32 ARMCacheCoherence-PT-none-CTLFireability-02 3239787 m, 14846 m/sec, 36259892 t fired, .
64 EF DL FNDP 839/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 15720740 t fired, 16 attempts, .

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62 EF DL EXCL 276/1008 12/32 ARMCacheCoherence-PT-none-CTLFireability-02 3315080 m, 15058 m/sec, 36852976 t fired, .
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62 EF DL EXCL 281/1008 12/32 ARMCacheCoherence-PT-none-CTLFireability-02 3391627 m, 15309 m/sec, 37424723 t fired, .
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62 EF DL EXCL 286/1008 12/32 ARMCacheCoherence-PT-none-CTLFireability-02 3467871 m, 15248 m/sec, 37980631 t fired, .
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62 EF DL EXCL 291/1008 13/32 ARMCacheCoherence-PT-none-CTLFireability-02 3548478 m, 16121 m/sec, 38587917 t fired, .
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62 EF DL EXCL 301/1008 13/32 ARMCacheCoherence-PT-none-CTLFireability-02 3702846 m, 15753 m/sec, 39860241 t fired, .
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62 EF DL EXCL 306/1008 13/32 ARMCacheCoherence-PT-none-CTLFireability-02 3779167 m, 15264 m/sec, 40475181 t fired, .
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62 EF DL EXCL 311/1008 14/32 ARMCacheCoherence-PT-none-CTLFireability-02 3859357 m, 16038 m/sec, 41118483 t fired, .
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62 EF DL EXCL 316/1008 14/32 ARMCacheCoherence-PT-none-CTLFireability-02 3937679 m, 15664 m/sec, 41721485 t fired, .
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62 EF DL EXCL 336/1008 15/32 ARMCacheCoherence-PT-none-CTLFireability-02 4244267 m, 14561 m/sec, 44127993 t fired, .
64 EF DL FNDP 904/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 16943071 t fired, 17 attempts, .

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62 EF DL EXCL 341/1008 15/32 ARMCacheCoherence-PT-none-CTLFireability-02 4319368 m, 15020 m/sec, 44759496 t fired, .
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62 EF DL EXCL 346/1008 15/32 ARMCacheCoherence-PT-none-CTLFireability-02 4391776 m, 14481 m/sec, 45390874 t fired, .
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62 EF DL EXCL 401/1008 18/32 ARMCacheCoherence-PT-none-CTLFireability-02 5236625 m, 14847 m/sec, 52857943 t fired, .
64 EF DL FNDP 969/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 18152806 t fired, 19 attempts, .

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62 EF DL EXCL 406/1008 19/32 ARMCacheCoherence-PT-none-CTLFireability-02 5319262 m, 16527 m/sec, 53538662 t fired, .
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62 EF DL EXCL 411/1008 19/32 ARMCacheCoherence-PT-none-CTLFireability-02 5398418 m, 15831 m/sec, 54195758 t fired, .
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62 EF DL EXCL 466/1008 22/32 ARMCacheCoherence-PT-none-CTLFireability-02 6246193 m, 19543 m/sec, 61983495 t fired, .
64 EF DL FNDP 1034/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 19378180 t fired, 20 attempts, .

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62 EF DL EXCL 471/1008 22/32 ARMCacheCoherence-PT-none-CTLFireability-02 6316703 m, 14102 m/sec, 62688435 t fired, .
64 EF DL FNDP 1039/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 19472815 t fired, 20 attempts, .

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62 EF DL EXCL 476/1008 22/32 ARMCacheCoherence-PT-none-CTLFireability-02 6407345 m, 18128 m/sec, 63510771 t fired, .
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62 EF DL EXCL 481/1008 23/32 ARMCacheCoherence-PT-none-CTLFireability-02 6488546 m, 16240 m/sec, 64328480 t fired, .
64 EF DL FNDP 1049/3594 0/5 ARMCacheCoherence-PT-none-CTLFireability-02 19661621 t fired, 20 attempts, .

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62 EF DL EXCL 486/1008 23/32 ARMCacheCoherence-PT-none-CTLFireability-02 6569979 m, 16286 m/sec, 65185531 t fired, .
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62 EF DL EXCL 491/1008 23/32 ARMCacheCoherence-PT-none-CTLFireability-02 6651483 m, 16300 m/sec, 66263069 t fired, .
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62 EF DL EXCL 496/1008 24/32 ARMCacheCoherence-PT-none-CTLFireability-02 6808701 m, 31443 m/sec, 70643050 t fired, .
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62 EF DL EXCL 501/1008 24/32 ARMCacheCoherence-PT-none-CTLFireability-02 6981691 m, 34598 m/sec, 75235319 t fired, .
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62 EF DL EXCL 506/1008 25/32 ARMCacheCoherence-PT-none-CTLFireability-02 7164085 m, 36478 m/sec, 80013143 t fired, .
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62 EF DL EXCL 511/1008 25/32 ARMCacheCoherence-PT-none-CTLFireability-02 7331349 m, 33452 m/sec, 84828280 t fired, .
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62 EF DL EXCL 516/1008 26/32 ARMCacheCoherence-PT-none-CTLFireability-02 7509317 m, 35593 m/sec, 90121365 t fired, .
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ARMCacheCoherence-PT-none-CTLFireability-01: DISJ true state equation
ARMCacheCoherence-PT-none-CTLFireability-02: AG NODL true state space
ARMCacheCoherence-PT-none-CTLFireability-04: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLFireability-08: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLFireability-09: CTL true CTL model checker
ARMCacheCoherence-PT-none-CTLFireability-10: INITIAL true preprocessing
ARMCacheCoherence-PT-none-CTLFireability-14: INITIAL false preprocessing
ARMCacheCoherence-PT-none-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-11: AGEF 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ARMCacheCoherence-PT-none-CTLFireability-13: CTL 0 0 0 0 1 0 1 0


========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-oct2-167813593700002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;