About the Execution of LTSMin+red for PGCD-PT-D02N006
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
225.539 | 23372.00 | 72840.00 | 572.90 | TTFFFTFTFTFTTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r521-tall-167987246700442.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is PGCD-PT-D02N006, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r521-tall-167987246700442
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Mar 23 15:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Mar 23 15:24 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Mar 23 15:24 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 13K Mar 23 15:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 142K Mar 23 15:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Mar 23 15:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 111K Mar 23 15:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 5.6K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-00
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-01
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-02
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-03
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-04
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-05
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-06
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-07
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-08
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-09
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-10
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-11
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-12
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-13
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-14
FORMULA_NAME PGCD-PT-D02N006-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1680823400819
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PGCD-PT-D02N006
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202304061127
[2023-04-06 23:23:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-06 23:23:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-06 23:23:25] [INFO ] Load time of PNML (sax parser for PT used): 58 ms
[2023-04-06 23:23:25] [INFO ] Transformed 9 places.
[2023-04-06 23:23:25] [INFO ] Transformed 9 transitions.
[2023-04-06 23:23:25] [INFO ] Parsed PT model containing 9 places and 9 transitions and 42 arcs in 229 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 30 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 33 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
// Phase 1: matrix 9 rows 9 cols
[2023-04-06 23:23:25] [INFO ] Computed 4 invariants in 30 ms
[2023-04-06 23:23:25] [INFO ] Dead Transitions using invariants and state equation in 396 ms found 0 transitions.
[2023-04-06 23:23:25] [INFO ] Invariant cache hit.
[2023-04-06 23:23:26] [INFO ] SMT solver returned unknown. Retrying;
[2023-04-06 23:23:26] [INFO ] Implicit Places using invariants in 279 ms returned []
[2023-04-06 23:23:26] [INFO ] Invariant cache hit.
[2023-04-06 23:23:26] [INFO ] State equation strengthened by 3 read => feed constraints.
[2023-04-06 23:23:26] [INFO ] Implicit Places using invariants and state equation in 133 ms returned []
Implicit Place search using SMT with State Equation took 417 ms to find 0 implicit places.
[2023-04-06 23:23:26] [INFO ] Invariant cache hit.
[2023-04-06 23:23:26] [INFO ] Dead Transitions using invariants and state equation in 84 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 979 ms. Remains : 9/9 places, 9/9 transitions.
Support contains 9 out of 9 places after structural reductions.
[2023-04-06 23:23:26] [INFO ] Flatten gal took : 24 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 4 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Incomplete random walk after 10002 steps, including 2 resets, run finished after 144 ms. (steps per millisecond=69 ) properties (out of 29) seen :28
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] After 29ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 2 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 3 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 90 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 92 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 78 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 89 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 2 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 51 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 51 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 4 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 100 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 114 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 44 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 52 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 9 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 2 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Input system was already deterministic with 9 transitions.
Finished random walk after 87 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=87 )
FORMULA PGCD-PT-D02N006-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:27] [INFO ] Invariant cache hit.
[2023-04-06 23:23:27] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:27] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 67 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 69 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 56 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 58 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 1 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 68 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 71 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 0 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 9/9 transitions.
Applied a total of 0 rules in 4 ms. Remains 9 /9 variables (removed 0) and now considering 9/9 (removed 0) transitions.
[2023-04-06 23:23:28] [INFO ] Invariant cache hit.
[2023-04-06 23:23:28] [INFO ] Dead Transitions using invariants and state equation in 20 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 9/9 places, 9/9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 1 ms
[2023-04-06 23:23:28] [INFO ] Input system was already deterministic with 9 transitions.
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 2 ms
[2023-04-06 23:23:28] [INFO ] Flatten gal took : 5 ms
[2023-04-06 23:23:28] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-04-06 23:23:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 9 transitions and 42 arcs took 0 ms.
Total runtime 3438 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/534/ctl_0_ --ctl=/tmp/534/ctl_1_ --ctl=/tmp/534/ctl_2_ --ctl=/tmp/534/ctl_3_ --ctl=/tmp/534/ctl_4_ --ctl=/tmp/534/ctl_5_ --ctl=/tmp/534/ctl_6_ --ctl=/tmp/534/ctl_7_ --ctl=/tmp/534/ctl_8_ --ctl=/tmp/534/ctl_9_ --ctl=/tmp/534/ctl_10_ --ctl=/tmp/534/ctl_11_ --ctl=/tmp/534/ctl_12_ --ctl=/tmp/534/ctl_13_ --ctl=/tmp/534/ctl_14_ --mu-par --mu-opt
FORMULA PGCD-PT-D02N006-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
FORMULA PGCD-PT-D02N006-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING USE_NUPN
BK_STOP 1680823424191
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
++ sed s/.jar//
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name PGCD-PT-D02N006-CTLFireability-00
ctl formula formula --ctl=/tmp/534/ctl_0_
ctl formula name PGCD-PT-D02N006-CTLFireability-01
ctl formula formula --ctl=/tmp/534/ctl_1_
ctl formula name PGCD-PT-D02N006-CTLFireability-02
ctl formula formula --ctl=/tmp/534/ctl_2_
ctl formula name PGCD-PT-D02N006-CTLFireability-03
ctl formula formula --ctl=/tmp/534/ctl_3_
ctl formula name PGCD-PT-D02N006-CTLFireability-04
ctl formula formula --ctl=/tmp/534/ctl_4_
ctl formula name PGCD-PT-D02N006-CTLFireability-06
ctl formula formula --ctl=/tmp/534/ctl_5_
ctl formula name PGCD-PT-D02N006-CTLFireability-07
ctl formula formula --ctl=/tmp/534/ctl_6_
ctl formula name PGCD-PT-D02N006-CTLFireability-08
ctl formula formula --ctl=/tmp/534/ctl_7_
ctl formula name PGCD-PT-D02N006-CTLFireability-09
ctl formula formula --ctl=/tmp/534/ctl_8_
ctl formula name PGCD-PT-D02N006-CTLFireability-10
ctl formula formula --ctl=/tmp/534/ctl_9_
ctl formula name PGCD-PT-D02N006-CTLFireability-11
ctl formula formula --ctl=/tmp/534/ctl_10_
ctl formula name PGCD-PT-D02N006-CTLFireability-12
ctl formula formula --ctl=/tmp/534/ctl_11_
ctl formula name PGCD-PT-D02N006-CTLFireability-13
ctl formula formula --ctl=/tmp/534/ctl_12_
ctl formula name PGCD-PT-D02N006-CTLFireability-14
ctl formula formula --ctl=/tmp/534/ctl_13_
ctl formula name PGCD-PT-D02N006-CTLFireability-15
ctl formula formula --ctl=/tmp/534/ctl_14_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 9 places, 9 transitions and 42 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 9->3 groups
pnml2lts-sym: Regrouping took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state vector length is 9; there are 3 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: Exploration took 579 group checks and 0 next state calls
pnml2lts-sym: reachability took 12.370 real 33.630 user 15.640 sys
pnml2lts-sym: counting visited states...
pnml2lts-sym: counting took 0.000 real 0.000 user 0.000 sys
pnml2lts-sym: state space has 15670 states, 1320 nodes
pnml2lts-sym: Formula /tmp/534/ctl_1_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_3_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_0_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_5_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_14_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_2_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_13_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_12_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_4_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_6_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_11_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_10_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_8_ holds for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_9_ does not hold for the initial state
pnml2lts-sym: Formula /tmp/534/ctl_7_ does not hold for the initial state
pnml2lts-sym: group_next: 7959 nodes total
pnml2lts-sym: group_explored: 2388 nodes, 8439 short vectors total
pnml2lts-sym: max token count: 19
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PGCD-PT-D02N006"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is PGCD-PT-D02N006, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r521-tall-167987246700442"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PGCD-PT-D02N006.tgz
mv PGCD-PT-D02N006 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;