Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245200402.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PGCD-COL-D03N050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245200402
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users 7.2K Mar 23 15:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Mar 23 15:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Mar 23 15:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Mar 23 15:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 9.3K Mar 23 15:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Mar 23 15:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Mar 23 15:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Mar 23 15:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 11K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-00
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-01
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-02
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-03
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-04
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-05
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-06
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-07
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-08
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-09
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-10
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-11
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-12
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-13
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-14
FORMULA_NAME PGCD-COL-D03N050-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680810949907

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PGCD-COL-D03N050
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-06 19:55:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-06 19:55:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-06 19:55:51] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-06 19:55:51] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-06 19:55:51] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 525 ms
[2023-04-06 19:55:52] [INFO ] Imported 3 HL places and 3 HL transitions for a total of 12 PT places and 12.0 transition bindings in 16 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 21 ms.
[2023-04-06 19:55:52] [INFO ] Built PT skeleton of HLPN with 3 places and 3 transitions 14 arcs in 4 ms.
[2023-04-06 19:55:52] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Arc [2:1*[(MOD (ADD $x 1) 4)]] contains successor/predecessor on variables of sort CD
[2023-04-06 19:55:52] [INFO ] Unfolded HLPN to a Petri net with 12 places and 12 transitions 56 arcs in 6 ms.
[2023-04-06 19:55:52] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Initial state reduction rules removed 3 formulas.
FORMULA PGCD-COL-D03N050-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PGCD-COL-D03N050-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PGCD-COL-D03N050-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 12 out of 12 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 4 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
// Phase 1: matrix 12 rows 12 cols
[2023-04-06 19:55:52] [INFO ] Computed 5 invariants in 3 ms
[2023-04-06 19:55:52] [INFO ] Dead Transitions using invariants and state equation in 140 ms found 0 transitions.
[2023-04-06 19:55:52] [INFO ] Invariant cache hit.
[2023-04-06 19:55:52] [INFO ] Implicit Places using invariants in 28 ms returned []
[2023-04-06 19:55:52] [INFO ] Invariant cache hit.
[2023-04-06 19:55:52] [INFO ] State equation strengthened by 4 read => feed constraints.
[2023-04-06 19:55:52] [INFO ] Implicit Places using invariants and state equation in 35 ms returned []
Implicit Place search using SMT with State Equation took 64 ms to find 0 implicit places.
[2023-04-06 19:55:52] [INFO ] Invariant cache hit.
[2023-04-06 19:55:52] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 260 ms. Remains : 12/12 places, 12/12 transitions.
Support contains 12 out of 12 places after structural reductions.
[2023-04-06 19:55:52] [INFO ] Flatten gal took : 17 ms
[2023-04-06 19:55:52] [INFO ] Flatten gal took : 10 ms
[2023-04-06 19:55:52] [INFO ] Input system was already deterministic with 12 transitions.
Incomplete random walk after 10039 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=127 ) properties (out of 24) seen :18
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-06 19:55:53] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 1 ms returned sat
[2023-04-06 19:55:53] [INFO ] After 61ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:4
[2023-04-06 19:55:53] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-06 19:55:53] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 1 ms returned sat
[2023-04-06 19:55:53] [INFO ] After 76ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 6 atomic propositions for a total of 13 simplifications.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 6 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 6 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 3 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 4 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 19 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 2 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 2 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 214 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=214 )
FORMULA PGCD-COL-D03N050-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 2 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 0 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 12/12 places, 12/12 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 12/12 (removed 0) transitions.
[2023-04-06 19:55:53] [INFO ] Invariant cache hit.
[2023-04-06 19:55:53] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 12/12 places, 12/12 transitions.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 1 ms
[2023-04-06 19:55:53] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 3 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=3 )
FORMULA PGCD-COL-D03N050-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 3 ms
[2023-04-06 19:55:53] [INFO ] Flatten gal took : 3 ms
[2023-04-06 19:55:53] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-04-06 19:55:53] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 12 places, 12 transitions and 56 arcs took 0 ms.
Total runtime 2465 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PGCD-COL-D03N050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA PGCD-COL-D03N050-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PGCD-COL-D03N050-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13417012 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16108416 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH INITIAL
lola: LAUNCH task # 17 (type CNST) for 6 PGCD-COL-D03N050-CTLFireability-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 17 (type CNST) for PGCD-COL-D03N050-CTLFireability-02
lola: result : false
lola: LAUNCH task # 13 (type EXCL) for 6 PGCD-COL-D03N050-CTLFireability-02
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 13 (type EXCL) for PGCD-COL-D03N050-CTLFireability-02
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 PGCD-COL-D03N050-CTLFireability-03
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 24 (type EXCL) for PGCD-COL-D03N050-CTLFireability-03
lola: result : true
lola: markings : 54
lola: fired transitions : 78
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 PGCD-COL-D03N050-CTLFireability-05
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type FNDP) for 37 PGCD-COL-D03N050-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 37 PGCD-COL-D03N050-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 37 PGCD-COL-D03N050-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 56 (type SRCH) for PGCD-COL-D03N050-CTLFireability-10
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 53 (type FNDP) for PGCD-COL-D03N050-CTLFireability-10 (obsolete)
lola: CANCELED task # 54 (type EQUN) for PGCD-COL-D03N050-CTLFireability-10 (obsolete)
lola: FINISHED task # 53 (type FNDP) for PGCD-COL-D03N050-CTLFireability-10
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: try reading problem file /home/mcc/execution/375/CTLFireability-54.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 54 (type EQUN) for PGCD-COL-D03N050-CTLFireability-10
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-COL-D03N050-CTLFireability-03: DISJ true CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D03N050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-02: CONJ 0 2 0 0 4 0 0 0
PGCD-COL-D03N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/360 15/32 PGCD-COL-D03N050-CTLFireability-05 3367077 m, 673415 m/sec, 10395894 t fired, .

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PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens

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PGCD-COL-D03N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-02: CONJ 0 2 0 0 4 0 0 0
PGCD-COL-D03N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 10/360 27/32 PGCD-COL-D03N050-CTLFireability-05 6274053 m, 581395 m/sec, 19914386 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-COL-D03N050-CTLFireability-03: DISJ true CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens

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PGCD-COL-D03N050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-02: CONJ 0 2 0 0 4 0 0 0
PGCD-COL-D03N050-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D03N050-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: FINISHED task # 51 (type EXCL) for PGCD-COL-D03N050-CTLFireability-13
lola: result : true
lola: markings : 160
lola: fired transitions : 172
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lola: result : false
lola: markings : 7
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lola: result : true
lola: time used : 0.000000
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lola: FINISHED task # 19 (type EXCL) for PGCD-COL-D03N050-CTLFireability-02
lola: result : true
lola: markings : 7
lola: fired transitions : 7
lola: time used : 0.000000
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lola: time limit : 896 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-COL-D03N050-CTLFireability-03: DISJ true CTL model checker
PGCD-COL-D03N050-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D03N050-CTLFireability-06: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens
PGCD-COL-D03N050-CTLFireability-11: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D03N050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-02: CONJ 0 0 1 0 5 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D03N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
9 CTL EXCL 5/896 10/32 PGCD-COL-D03N050-CTLFireability-02 2313669 m, 462733 m/sec, 11435840 t fired, .

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PGCD-COL-D03N050-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D03N050-CTLFireability-06: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens
PGCD-COL-D03N050-CTLFireability-11: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PGCD-COL-D03N050-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PGCD-COL-D03N050-CTLFireability-02: CONJ 0 0 1 0 5 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PGCD-COL-D03N050-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
9 CTL EXCL 10/896 19/32 PGCD-COL-D03N050-CTLFireability-02 4377706 m, 412807 m/sec, 21686508 t fired, .

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PGCD-COL-D03N050-CTLFireability-03: DISJ true CTL model checker
PGCD-COL-D03N050-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D03N050-CTLFireability-06: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens
PGCD-COL-D03N050-CTLFireability-11: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-13: CTL true CTL model checker

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PGCD-COL-D03N050-CTLFireability-02: CONJ 0 0 1 0 5 0 0 0
PGCD-COL-D03N050-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
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lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PGCD-COL-D03N050-CTLFireability-00: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-01: CTL unknown AGGR
PGCD-COL-D03N050-CTLFireability-02: CONJ unknown CONJ
PGCD-COL-D03N050-CTLFireability-03: DISJ true CTL model checker
PGCD-COL-D03N050-CTLFireability-04: CTL true CTL model checker
PGCD-COL-D03N050-CTLFireability-05: CTL unknown AGGR
PGCD-COL-D03N050-CTLFireability-06: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-10: DISJ true search / frozen tokens
PGCD-COL-D03N050-CTLFireability-11: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-12: CTL false CTL model checker
PGCD-COL-D03N050-CTLFireability-13: CTL true CTL model checker


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