Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245100306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-COL-D3N050, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245100306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 7.3K Mar 23 15:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Mar 23 15:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Mar 23 15:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Mar 23 15:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 9.1K Mar 23 15:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Mar 23 15:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 20K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-00
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-01
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-02
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-03
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-04
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-05
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-06
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-07
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-08
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-09
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-10
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-11
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-12
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-13
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-14
FORMULA_NAME Murphy-COL-D3N050-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680849606976

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-COL-D3N050
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 06:40:08] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 06:40:08] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 06:40:08] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-07 06:40:08] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-07 06:40:08] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 442 ms
[2023-04-07 06:40:08] [INFO ] Imported 6 HL places and 7 HL transitions for a total of 24 PT places and 28.0 transition bindings in 16 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
[2023-04-07 06:40:08] [INFO ] Built PT skeleton of HLPN with 6 places and 7 transitions 27 arcs in 4 ms.
[2023-04-07 06:40:08] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 3 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 206 steps, including 0 resets, run visited all 3 properties in 7 ms. (steps per millisecond=29 )
Parikh walk visited 0 properties in 1 ms.
[2023-04-07 06:40:09] [INFO ] Flatten gal took : 15 ms
[2023-04-07 06:40:09] [INFO ] Flatten gal took : 2 ms
Arc [2:1*[(MOD (ADD $x 1) 4)]] contains successor/predecessor on variables of sort CD
[2023-04-07 06:40:09] [INFO ] Unfolded HLPN to a Petri net with 24 places and 28 transitions 108 arcs in 6 ms.
[2023-04-07 06:40:09] [INFO ] Unfolded 16 HLPN properties in 0 ms.
Initial state reduction rules removed 2 formulas.
FORMULA Murphy-COL-D3N050-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Murphy-COL-D3N050-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 24 out of 24 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 6 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
// Phase 1: matrix 28 rows 24 cols
[2023-04-07 06:40:09] [INFO ] Computed 5 invariants in 5 ms
[2023-04-07 06:40:09] [INFO ] Dead Transitions using invariants and state equation in 168 ms found 0 transitions.
[2023-04-07 06:40:09] [INFO ] Invariant cache hit.
[2023-04-07 06:40:09] [INFO ] Implicit Places using invariants in 34 ms returned []
[2023-04-07 06:40:09] [INFO ] Invariant cache hit.
[2023-04-07 06:40:09] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-04-07 06:40:09] [INFO ] Implicit Places using invariants and state equation in 50 ms returned []
Implicit Place search using SMT with State Equation took 89 ms to find 0 implicit places.
[2023-04-07 06:40:09] [INFO ] Invariant cache hit.
[2023-04-07 06:40:09] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 300 ms. Remains : 24/24 places, 28/28 transitions.
Support contains 24 out of 24 places after structural reductions.
[2023-04-07 06:40:09] [INFO ] Flatten gal took : 9 ms
[2023-04-07 06:40:09] [INFO ] Flatten gal took : 8 ms
[2023-04-07 06:40:09] [INFO ] Input system was already deterministic with 28 transitions.
Incomplete random walk after 10006 steps, including 2 resets, run finished after 137 ms. (steps per millisecond=73 ) properties (out of 30) seen :24
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 48 ms. (steps per millisecond=208 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 37 ms. (steps per millisecond=270 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-04-07 06:40:09] [INFO ] Invariant cache hit.
[2023-04-07 06:40:09] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 06:40:09] [INFO ] [Real]Absence check using 2 positive and 3 generalized place invariants in 0 ms returned sat
[2023-04-07 06:40:09] [INFO ] After 57ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:5
[2023-04-07 06:40:10] [INFO ] [Nat]Absence check using 2 positive place invariants in 3 ms returned sat
[2023-04-07 06:40:10] [INFO ] [Nat]Absence check using 2 positive and 3 generalized place invariants in 5 ms returned sat
[2023-04-07 06:40:10] [INFO ] After 25ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :5
[2023-04-07 06:40:10] [INFO ] State equation strengthened by 8 read => feed constraints.
[2023-04-07 06:40:10] [INFO ] After 21ms SMT Verify possible using 8 Read/Feed constraints in natural domain returned unsat :1 sat :5
[2023-04-07 06:40:10] [INFO ] Deduced a trap composed of 2 places in 20 ms of which 3 ms to minimize.
[2023-04-07 06:40:10] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 25 ms
[2023-04-07 06:40:10] [INFO ] Deduced a trap composed of 2 places in 14 ms of which 1 ms to minimize.
[2023-04-07 06:40:10] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 18 ms
[2023-04-07 06:40:10] [INFO ] Deduced a trap composed of 2 places in 15 ms of which 1 ms to minimize.
[2023-04-07 06:40:10] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 20 ms
[2023-04-07 06:40:10] [INFO ] After 110ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :5
Attempting to minimize the solution found.
Minimization took 20 ms.
[2023-04-07 06:40:10] [INFO ] After 202ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :5
Fused 6 Parikh solutions to 5 different solutions.
Parikh walk visited 0 properties in 14 ms.
Support contains 8 out of 24 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 24/24 places, 28/28 transitions.
Graph (complete) has 92 edges and 24 vertex of which 12 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.0 ms
Discarding 12 places :
Also discarding 8 output transitions
Drop transitions removed 8 transitions
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 5 place count 12 transition count 16
Applied a total of 5 rules in 4 ms. Remains 12 /24 variables (removed 12) and now considering 16/28 (removed 12) transitions.
// Phase 1: matrix 16 rows 12 cols
[2023-04-07 06:40:10] [INFO ] Computed 0 invariants in 1 ms
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 19 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 24 ms. Remains : 12/24 places, 16/28 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 223 ms. (steps per millisecond=44 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=333 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 5) seen :0
Probably explored full state space saw : 1296 states, properties seen :0
Probabilistic random walk after 8208 steps, saw 1296 distinct states, run finished after 45 ms. (steps per millisecond=182 ) properties seen :0
Explored full state space saw : 1296 states, properties seen :0
Exhaustive walk after 8208 steps, saw 1296 distinct states, run finished after 27 ms. (steps per millisecond=304 ) properties seen :0
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 6 atomic propositions for a total of 14 simplifications.
FORMULA Murphy-COL-D3N050-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Murphy-COL-D3N050-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 5 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 5 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
// Phase 1: matrix 28 rows 24 cols
[2023-04-07 06:40:10] [INFO ] Computed 5 invariants in 3 ms
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 0 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:10] [INFO ] Invariant cache hit.
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 0 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:10] [INFO ] Invariant cache hit.
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:10] [INFO ] Invariant cache hit.
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:10] [INFO ] Invariant cache hit.
[2023-04-07 06:40:10] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:10] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 0 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 0 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 24/24 places, 28/28 transitions.
Applied a total of 0 rules in 1 ms. Remains 24 /24 variables (removed 0) and now considering 28/28 (removed 0) transitions.
[2023-04-07 06:40:11] [INFO ] Invariant cache hit.
[2023-04-07 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 24/24 places, 28/28 transitions.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:40:11] [INFO ] Input system was already deterministic with 28 transitions.
Finished random walk after 1 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 )
FORMULA Murphy-COL-D3N050-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Parikh walk visited 0 properties in 0 ms.
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 4 ms
[2023-04-07 06:40:11] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:40:11] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-04-07 06:40:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 24 places, 28 transitions and 108 arcs took 1 ms.
Total runtime 2954 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-COL-D3N050
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA Murphy-COL-D3N050-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D3N050-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13297760 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16105920 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 Murphy-COL-D3N050-CTLFireability-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 4 (type CNST) for Murphy-COL-D3N050-CTLFireability-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 45 (type EXCL) for 44 Murphy-COL-D3N050-CTLFireability-12
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 54 (type FNDP) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SRCH) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 45 (type EXCL) for Murphy-COL-D3N050-CTLFireability-12
lola: result : false
lola: markings : 126
lola: fired transitions : 255
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 58 (type SRCH) for Murphy-COL-D3N050-CTLFireability-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 56 (type EXCL) for Murphy-COL-D3N050-CTLFireability-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for Murphy-COL-D3N050-CTLFireability-04 (obsolete)
lola: CANCELED task # 55 (type EQUN) for Murphy-COL-D3N050-CTLFireability-04 (obsolete)
lola: LAUNCH task # 57 (type EXCL) for 38 Murphy-COL-D3N050-CTLFireability-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for Murphy-COL-D3N050-CTLFireability-10
lola: result : true
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 Murphy-COL-D3N050-CTLFireability-11
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type FNDP) for Murphy-COL-D3N050-CTLFireability-04
lola: Created skeleton in 0.000000 secs.
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:736
lola: rewrite Frontend/Parser/formula_rewrite.k:696
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:767
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:776
lola: rewrite Frontend/Parser/formula_rewrite.k:793
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 42 (type EXCL) for Murphy-COL-D3N050-CTLFireability-11
lola: result : false
lola: markings : 320
lola: fired transitions : 424
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 Murphy-COL-D3N050-CTLFireability-14
lola: time limit : 360 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/369/CTLFireability-55.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 55 (type EQUN) for Murphy-COL-D3N050-CTLFireability-04
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-04: CONJ 0 4 0 0 11 0 0 0
Murphy-COL-D3N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 5/360 9/32 Murphy-COL-D3N050-CTLFireability-14 2074961 m, 414992 m/sec, 6728868 t fired, .

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Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-04: CONJ 0 4 0 0 11 0 0 0
Murphy-COL-D3N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 10/360 18/32 Murphy-COL-D3N050-CTLFireability-14 4128660 m, 410739 m/sec, 13053983 t fired, .

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Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-04: CONJ 0 4 0 0 11 0 0 0
Murphy-COL-D3N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 15/360 28/32 Murphy-COL-D3N050-CTLFireability-14 6485159 m, 471299 m/sec, 19595687 t fired, .

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lola: CANCELED task # 51 (type EXCL) for Murphy-COL-D3N050-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-04: CONJ 0 4 0 0 11 0 0 0
Murphy-COL-D3N050-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 48 (type EXCL) for 47 Murphy-COL-D3N050-CTLFireability-13
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for Murphy-COL-D3N050-CTLFireability-13
lola: result : true
lola: markings : 179
lola: fired transitions : 493
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 Murphy-COL-D3N050-CTLFireability-07
lola: time limit : 447 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for Murphy-COL-D3N050-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 Murphy-COL-D3N050-CTLFireability-05
lola: time limit : 511 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for Murphy-COL-D3N050-CTLFireability-05
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 596 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Murphy-COL-D3N050-CTLFireability-04
lola: result : false
lola: markings : 75
lola: fired transitions : 77
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for Murphy-COL-D3N050-CTLFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 6 Murphy-COL-D3N050-CTLFireability-04
lola: time limit : 1193 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for Murphy-COL-D3N050-CTLFireability-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 Murphy-COL-D3N050-CTLFireability-09
lola: time limit : 1790 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for Murphy-COL-D3N050-CTLFireability-09
lola: result : false
lola: markings : 2784
lola: fired transitions : 8122
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Murphy-COL-D3N050-CTLFireability-01
lola: time limit : 3580 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-04: CONJ true CONJ
Murphy-COL-D3N050-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D3N050-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3580 7/32 Murphy-COL-D3N050-CTLFireability-01 1486689 m, 297337 m/sec, 8444204 t fired, .

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Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-04: CONJ true CONJ
Murphy-COL-D3N050-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D3N050-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3580 13/32 Murphy-COL-D3N050-CTLFireability-01 2927002 m, 288062 m/sec, 16677065 t fired, .

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Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-04: CONJ true CONJ
Murphy-COL-D3N050-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D3N050-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3580 18/32 Murphy-COL-D3N050-CTLFireability-01 4287068 m, 272013 m/sec, 24300243 t fired, .

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Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-04: CONJ true CONJ
Murphy-COL-D3N050-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D3N050-CTLFireability-07: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-09: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-10: F false state space / EG
Murphy-COL-D3N050-CTLFireability-11: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-12: CTL false CTL model checker
Murphy-COL-D3N050-CTLFireability-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D3N050-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D3N050-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3580 24/32 Murphy-COL-D3N050-CTLFireability-01 5583581 m, 259302 m/sec, 31671760 t fired, .

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Murphy-COL-D3N050-CTLFireability-02: INITIAL false preprocessing
Murphy-COL-D3N050-CTLFireability-04: CONJ true CONJ
Murphy-COL-D3N050-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D3N050-CTLFireability-07: CTL false CTL model checker
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lola: caught signal Terminated - aborting LoLA

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