fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r519-tall-167987245100298
Last Updated
May 14, 2023

About the Execution of LoLa+red for Murphy-COL-D2N100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2417.716 69389.00 73170.00 564.10 TTFTFT?FTTFT?FF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245100298.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Murphy-COL-D2N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245100298
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 6.7K Mar 23 15:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K Mar 23 15:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Mar 23 15:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Mar 23 15:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 12K Mar 23 15:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 129K Mar 23 15:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 20K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-00
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-01
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-02
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-03
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-04
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-05
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-06
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-07
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-08
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-09
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-10
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-11
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-12
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-13
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-14
FORMULA_NAME Murphy-COL-D2N100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680847704920

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Murphy-COL-D2N100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 06:08:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 06:08:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 06:08:26] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-04-07 06:08:26] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-04-07 06:08:26] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 491 ms
[2023-04-07 06:08:26] [INFO ] Imported 6 HL places and 7 HL transitions for a total of 18 PT places and 21.0 transition bindings in 17 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
[2023-04-07 06:08:26] [INFO ] Built PT skeleton of HLPN with 6 places and 7 transitions 27 arcs in 3 ms.
[2023-04-07 06:08:26] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Initial state reduction rules removed 1 formulas.
FORMULA Murphy-COL-D2N100-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 5 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 4 steps, including 0 resets, run visited all 5 properties in 7 ms. (steps per millisecond=0 )
Parikh walk visited 0 properties in 0 ms.
[2023-04-07 06:08:27] [INFO ] Flatten gal took : 15 ms
[2023-04-07 06:08:27] [INFO ] Flatten gal took : 2 ms
Arc [2:1*[(MOD (ADD $x 1) 3)]] contains successor/predecessor on variables of sort CD
[2023-04-07 06:08:27] [INFO ] Unfolded HLPN to a Petri net with 18 places and 21 transitions 81 arcs in 6 ms.
[2023-04-07 06:08:27] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Support contains 18 out of 18 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 5 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
// Phase 1: matrix 21 rows 18 cols
[2023-04-07 06:08:27] [INFO ] Computed 4 invariants in 3 ms
[2023-04-07 06:08:27] [INFO ] Dead Transitions using invariants and state equation in 152 ms found 0 transitions.
[2023-04-07 06:08:27] [INFO ] Invariant cache hit.
[2023-04-07 06:08:27] [INFO ] Implicit Places using invariants in 30 ms returned []
[2023-04-07 06:08:27] [INFO ] Invariant cache hit.
[2023-04-07 06:08:27] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 06:08:27] [INFO ] Implicit Places using invariants and state equation in 49 ms returned []
Implicit Place search using SMT with State Equation took 81 ms to find 0 implicit places.
[2023-04-07 06:08:27] [INFO ] Invariant cache hit.
[2023-04-07 06:08:27] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 282 ms. Remains : 18/18 places, 21/21 transitions.
Support contains 18 out of 18 places after structural reductions.
[2023-04-07 06:08:27] [INFO ] Flatten gal took : 6 ms
[2023-04-07 06:08:27] [INFO ] Flatten gal took : 6 ms
[2023-04-07 06:08:27] [INFO ] Input system was already deterministic with 21 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 28) seen :21
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-04-07 06:08:27] [INFO ] Invariant cache hit.
[2023-04-07 06:08:27] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 06:08:27] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 0 ms returned sat
[2023-04-07 06:08:27] [INFO ] After 52ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-04-07 06:08:28] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 06:08:28] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-07 06:08:28] [INFO ] After 30ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:28] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 06:08:28] [INFO ] After 21ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:28] [INFO ] After 70ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 30 ms.
[2023-04-07 06:08:28] [INFO ] After 193ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Parikh walk visited 0 properties in 132 ms.
Support contains 18 out of 18 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 4 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:28] [INFO ] Invariant cache hit.
[2023-04-07 06:08:28] [INFO ] Dead Transitions using invariants and state equation in 58 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 62 ms. Remains : 18/18 places, 21/21 transitions.
Incomplete random walk after 10052 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=201 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 7) seen :0
Interrupted probabilistic random walk after 291994 steps, run timeout after 3001 ms. (steps per millisecond=97 ) properties seen :{}
Probabilistic random walk after 291994 steps, saw 191031 distinct states, run finished after 3002 ms. (steps per millisecond=97 ) properties seen :0
Running SMT prover for 7 properties.
[2023-04-07 06:08:31] [INFO ] Invariant cache hit.
[2023-04-07 06:08:31] [INFO ] [Real]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 06:08:31] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 0 ms returned sat
[2023-04-07 06:08:31] [INFO ] After 40ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-04-07 06:08:31] [INFO ] [Nat]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 06:08:31] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-07 06:08:31] [INFO ] After 22ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:31] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 06:08:31] [INFO ] After 21ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:31] [INFO ] After 53ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 27 ms.
[2023-04-07 06:08:31] [INFO ] After 137ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Parikh walk visited 0 properties in 91 ms.
Support contains 18 out of 18 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1 ms. Remains : 18/18 places, 21/21 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:31] [INFO ] Invariant cache hit.
[2023-04-07 06:08:31] [INFO ] Implicit Places using invariants in 18 ms returned []
[2023-04-07 06:08:31] [INFO ] Invariant cache hit.
[2023-04-07 06:08:31] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 06:08:31] [INFO ] Implicit Places using invariants and state equation in 32 ms returned []
Implicit Place search using SMT with State Equation took 52 ms to find 0 implicit places.
[2023-04-07 06:08:31] [INFO ] Redundant transitions in 0 ms returned []
[2023-04-07 06:08:31] [INFO ] Invariant cache hit.
[2023-04-07 06:08:31] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 86 ms. Remains : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Running SMT prover for 7 properties.
[2023-04-07 06:08:31] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] [Real]Absence check using 2 positive place invariants in 1 ms returned sat
[2023-04-07 06:08:32] [INFO ] [Real]Absence check using 2 positive and 2 generalized place invariants in 1 ms returned sat
[2023-04-07 06:08:32] [INFO ] After 23ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-04-07 06:08:32] [INFO ] [Nat]Absence check using 2 positive place invariants in 0 ms returned sat
[2023-04-07 06:08:32] [INFO ] [Nat]Absence check using 2 positive and 2 generalized place invariants in 0 ms returned sat
[2023-04-07 06:08:32] [INFO ] After 32ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:32] [INFO ] State equation strengthened by 6 read => feed constraints.
[2023-04-07 06:08:32] [INFO ] After 25ms SMT Verify possible using 6 Read/Feed constraints in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:32] [INFO ] After 52ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 28 ms.
[2023-04-07 06:08:32] [INFO ] After 152ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 4 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 7 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 2 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 20 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 18/18 places, 21/21 transitions.
Applied a total of 0 rules in 2 ms. Remains 18 /18 variables (removed 0) and now considering 21/21 (removed 0) transitions.
[2023-04-07 06:08:32] [INFO ] Invariant cache hit.
[2023-04-07 06:08:32] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 18/18 places, 21/21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 1 ms
[2023-04-07 06:08:32] [INFO ] Input system was already deterministic with 21 transitions.
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Flatten gal took : 3 ms
[2023-04-07 06:08:32] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-04-07 06:08:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 18 places, 21 transitions and 81 arcs took 0 ms.
Total runtime 6471 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Murphy-COL-D2N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA Murphy-COL-D2N100-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Murphy-COL-D2N100-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1680847774309

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 12 (type EXCL) for 9 Murphy-COL-D2N100-CTLFireability-03
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for Murphy-COL-D2N100-CTLFireability-03
lola: result : true
lola: markings : 34
lola: fired transitions : 42
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 28 (type EXCL) for 25 Murphy-COL-D2N100-CTLFireability-07
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for Murphy-COL-D2N100-CTLFireability-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 Murphy-COL-D2N100-CTLFireability-04
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Murphy-COL-D2N100-CTLFireability-04
lola: result : false
lola: markings : 4
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 61 (type EXCL) for 60 Murphy-COL-D2N100-CTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D2N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-03: CONJ 0 1 0 0 3 0 0 0
Murphy-COL-D2N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
Murphy-COL-D2N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
Murphy-COL-D2N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 5/211 13/32 Murphy-COL-D2N100-CTLFireability-12 2875657 m, 575131 m/sec, 8227359 t fired, .

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# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D2N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-03: CONJ 0 1 0 0 3 0 0 0
Murphy-COL-D2N100-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-09: CONJ 0 4 0 0 4 0 0 0
Murphy-COL-D2N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
Murphy-COL-D2N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 CTL EXCL 10/211 24/32 Murphy-COL-D2N100-CTLFireability-12 5603336 m, 545535 m/sec, 15997036 t fired, .

Time elapsed: 10 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 15
lola: CANCELED task # 61 (type EXCL) for Murphy-COL-D2N100-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Murphy-COL-D2N100-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Murphy-COL-D2N100-CTLFireability-03: CONJ 0 1 0 0 3 0 0 0
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Murphy-COL-D2N100-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
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Murphy-COL-D2N100-CTLFireability-00: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-01: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-02: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-14: CONJ false CTL model checker

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71 CTL EXCL 5/3570 7/32 Murphy-COL-D2N100-CTLFireability-15 1443210 m, 288642 m/sec, 8933801 t fired, .

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Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-14: CONJ false CTL model checker

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Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-11: CTL true CTL model checker
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Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-11: CTL true CTL model checker
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Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
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Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Murphy-COL-D2N100-CTLFireability-00: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-01: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-02: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-03: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-04: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-05: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-06: CTL unknown AGGR
Murphy-COL-D2N100-CTLFireability-07: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-08: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-09: CONJ true CONJ
Murphy-COL-D2N100-CTLFireability-10: CTL false CTL model checker
Murphy-COL-D2N100-CTLFireability-11: CTL true CTL model checker
Murphy-COL-D2N100-CTLFireability-12: CTL unknown AGGR
Murphy-COL-D2N100-CTLFireability-14: CONJ false CTL model checker
Murphy-COL-D2N100-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Murphy-COL-D2N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Murphy-COL-D2N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245100298"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Murphy-COL-D2N100.tgz
mv Murphy-COL-D2N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;