MCC'2023- Execution of r519-tall-167987245000258

About the Execution of LoLa+red for EisenbergMcGuire-PT-08

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16216.516	3600000.00	8441944.00	21219.80	?????F?FF??????T	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-ta
Waiting for the VM to be ready (probing
.........................................
...................
.........................................
.........................................
=========================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is EisenbergMcGuire-PT-08,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-16
=========================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 8.1K Mar
-rw-r--r-- 1 mcc users 84K Mar
-rw-r--r-- 1 mcc users 11K Mar
-rw-r--r-- 1 mcc users 83K Mar
-rw-r--r-- 1 mcc users 3.9K Mar
-rw-r--r-- 1 mcc users 25K Mar
-rw-r--r-- 1 mcc users 2.8K Mar
-rw-r--r-- 1 mcc users 17K Mar
-rw-r--r-- 1 mcc users 1 Mar
-rw-r--r-- 1 mcc users 9.0K Mar
-rw-r--r-- 1 mcc users 84K Mar
-rw-r--r-- 1 mcc users 9.3K Mar
-rw-r--r-- 1 mcc users 58K Mar
-rw-r--r-- 1 mcc users 1.7K Mar
-rw-r--r-- 1 mcc users 3.8K Mar
-rw-r--r-- 1 mcc users 6 Mar
-rw-r--r-- 1 mcc users 3 Mar
-rw-r--r-- 1 mcc users 6 Mar
-rw-r--r-- 1 mcc users 1.7M Mar

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector
BOOL_VECTOR

here is the order used to build
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi
FORMULA_NAME EisenbergMcGuire-PT-08-CTLFi

=== Now, execution of the tool begins

BK_START 1680822180767

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=EisenbergMcGuire-PT-08
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
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Parsed 16 properties from file /home/mcc/
Support contains 160 out of 712
Starting structural reductions in
Discarding 30 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 60 rules in 114
[2023-04-06 23:03:02] [INFO ]
// Phase 1: matrix 1128 rows 682 cols
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Implicit Place search using SMT
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Starting structural reductions in
Finished structural reductions in
Support contains 160 out of 682
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[2023-04-06 23:03:06] [INFO ]
Support contains 159 out of 682
Incomplete random walk after 10000
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Incomplete Best-First random walk after 101
Running SMT prover for 107 properties.
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Attempting to minimize the solution
Minimization took 1 ms.
[2023-04-06 23:03:34] [INFO ]
Fused 107 Parikh solutions to 97
Parikh walk visited 1 properties
Support contains 127 out of 682
Starting structural reductions in
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded
Performed 2 trivial Post agglomeration.
Iterating post reduction 0 with
Reduce places removed 2 places and
Iterating post reduction 1 with
Performed 181 Pre agglomeration
Pre-agglomeration after 2 with 181
Deduced a syphon composed of 181
Reduce places removed 181 places
Iterating global reduction 2 with
Discarding 7 places :
Symmetric choice reduction at 2
Iterating global reduction 2 with
Performed 51 Post agglomeration
Deduced a syphon composed of 51
Reduce places removed 51 places
Iterating global reduction 2 with
Applied a total of 482 rules in
Finished structural reductions in
Incomplete random walk after 10000
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Interrupted probabilistic random walk after 116667
Probabilistic random walk after 116667
Running SMT prover for 68 properties.
[2023-04-06 23:03:43] [INFO ]
// Phase 1: matrix 838 rows 441 cols
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Attempting to minimize the solution
Minimization took 2953 ms.
[2023-04-06 23:04:00] [INFO ]
Parikh walk visited 0 properties
Support contains 101 out of 441
Starting structural reductions in
Performed 12 Pre agglomeration using
Pre-agglomeration after 0 with 12
Deduced a syphon composed of 12
Reduce places removed 12 places
Iterating global reduction 0 with
Discarding 6 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Performed 3 Post agglomeration using
Deduced a syphon composed of 3 places
Reduce places removed 3 places and
Iterating global reduction 0 with
Applied a total of 42 rules in 118
Finished structural reductions in
Incomplete random walk after 10000
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Interrupted probabilistic random walk after 115038
Probabilistic random walk after 115038
Running SMT prover for 65 properties.
[2023-04-06 23:04:04] [INFO ]
// Phase 1: matrix 775 rows 420 cols
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Attempting to minimize the solution
Minimization took 3443 ms.
[2023-04-06 23:04:23] [INFO ]
Parikh walk visited 0 properties
Support contains 98 out of 420 places.
Starting structural reductions in
Discarding 3 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 6 rules in 70
Finished structural reductions in
Incomplete random walk after 10000
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Interrupted probabilistic random walk after 139221
Probabilistic random walk after 139221
Running SMT prover for 62 properties.
[2023-04-06 23:04:27] [INFO ]
// Phase 1: matrix 751 rows 417 cols
[2023-04-06 23:04:27] [INFO ]
[2023-04-06 23:04:28] [INFO ]
[2023-04-06 23:04:28] [INFO ]
[2023-04-06 23:04:28] [INFO ]
[2023-04-06 23:04:28] [INFO ]
[2023-04-06 23:04:28] [INFO ]
[2023-04-06 23:04:30] [INFO ]
[2023-04-06 23:04:30] [INFO ]
[2023-04-06 23:04:33] [INFO ]
[2023-04-06 23:04:33] [INFO ]
[2023-04-06 23:04:33] [INFO ]
[2023-04-06 23:04:33] [INFO ]
[2023-04-06 23:04:33] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:34] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:35] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:36] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:37] [INFO ]
[2023-04-06 23:04:38] [INFO ]
[2023-04-06 23:04:38] [INFO ]
[2023-04-06 23:04:38] [INFO ]
[2023-04-06 23:04:38] [INFO ]
[2023-04-06 23:04:39] [INFO ]
[2023-04-06 23:04:39] [INFO ]
[2023-04-06 23:04:39] [INFO ]
[2023-04-06 23:04:39] [INFO ]
[2023-04-06 23:04:40] [INFO ]
[2023-04-06 23:04:40] [INFO ]
[2023-04-06 23:04:41] [INFO ]
Attempting to minimize the solution
Minimization took 2788 ms.
[2023-04-06 23:04:43] [INFO ]
Parikh walk visited 0 properties
Support contains 94 out of 417 places.
Starting structural reductions in
Performed 1 Pre agglomeration using
Pre-agglomeration after 0 with 1
Deduced a syphon composed of 1 places
Reduce places removed 1 places and
Iterating global reduction 0 with
Discarding 1 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 4 rules in 79
Finished structural reductions in
Incomplete random walk after 10000
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Incomplete Best-First random walk after 1001
Interrupted probabilistic random walk after 81126
Probabilistic random walk after 81126
Running SMT prover for 62 properties.
[2023-04-06 23:04:48] [INFO ]
// Phase 1: matrix 742 rows 415 cols
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:48] [INFO ]
[2023-04-06 23:04:51] [INFO ]
[2023-04-06 23:04:51] [INFO ]
[2023-04-06 23:04:53] [INFO ]
[2023-04-06 23:04:53] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:54] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:55] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:56] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:57] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:58] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:04:59] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:00] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:01] [INFO ]
[2023-04-06 23:05:02] [INFO ]
Attempting to minimize the solution
Minimization took 2599 ms.
[2023-04-06 23:05:05] [INFO ]
Parikh walk visited 0 properties
Support contains 94 out of 415 places.
Starting structural reductions in
Applied a total of 0 rules in 64
Finished structural reductions in
Starting structural reductions in
Applied a total of 0 rules in 62
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:05] [INFO ]
[2023-04-06 23:05:06] [INFO ]
Implicit Place search using SMT
[2023-04-06 23:05:06] [INFO ]
[2023-04-06 23:05:06] [INFO ]
[2023-04-06 23:05:06] [INFO ]
[2023-04-06 23:05:07] [INFO ]
Finished structural reductions in
Successfully simplified 10 atomic
[2023-04-06 23:05:07] [INFO ]
[2023-04-06 23:05:07] [INFO ]
[2023-04-06 23:05:07] [INFO ]
Support contains 142 out of 682
Computed a total of 0 stabilizing
Starting structural reductions in
Discarding 24 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 48 rules in 26
Finished structural reductions in
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
Starting structural reductions in
Discarding 26 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 52 rules in 48
Finished structural reductions in
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
Starting structural reductions in
Discarding 25 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 50 rules in 43
Finished structural reductions in
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
[2023-04-06 23:05:08] [INFO ]
Starting structural reductions in
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded
Performed 8 trivial Post agglomeration.
Iterating post reduction 0 with
Reduce places removed 8 places and
Iterating post reduction 1 with
Performed 200 Pre agglomeration
Pre-agglomeration after 2 with 200
Deduced a syphon composed of 200
Reduce places removed 200 places
Iterating global reduction 2 with
Discarding 25 places :
Symmetric choice reduction at 2
Iterating global reduction 2 with
Performed 56 Post agglomeration
Deduced a syphon composed of 56
Reduce places removed 56 places
Iterating global reduction 2 with
Applied a total of 578 rules in
Finished structural reductions in
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
Starting structural reductions in
Discarding 23 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 46 rules in 42
Finished structural reductions in
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
Starting structural reductions in
Discarding 23 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 46 rules in 25
Finished structural reductions in
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
[2023-04-06 23:05:09] [INFO ]
Starting structural reductions in
Discarding 24 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 48 rules in 30
Finished structural reductions in
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
Starting structural reductions in
Discarding 24 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 48 rules in 21
Finished structural reductions in
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
Starting structural reductions in
Discarding 22 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 44 rules in 44
Finished structural reductions in
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
Starting structural reductions in
Discarding 24 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 48 rules in 22
Finished structural reductions in
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:10] [INFO ]
Starting structural reductions in
Discarding 26 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 52 rules in 22
Finished structural reductions in
[2023-04-06 23:05:10] [INFO ]
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
Starting structural reductions in
Discarding 23 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 46 rules in 32
Finished structural reductions in
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
Starting structural reductions in
Discarding 24 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 48 rules in 25
Finished structural reductions in
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
Starting structural reductions in
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded
Performed 8 trivial Post agglomeration.
Iterating post reduction 0 with
Reduce places removed 8 places and
Iterating post reduction 1 with
Performed 200 Pre agglomeration
Pre-agglomeration after 2 with 200
Deduced a syphon composed of 200
Reduce places removed 200 places
Iterating global reduction 2 with
Discarding 26 places :
Symmetric choice reduction at 2
Iterating global reduction 2 with
Performed 56 Post agglomeration
Deduced a syphon composed of 56
Reduce places removed 56 places
Iterating global reduction 2 with
Applied a total of 580 rules in
Finished structural reductions in
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
[2023-04-06 23:05:11] [INFO ]
Incomplete random walk after 10000
Incomplete Best-First random walk after 10001
Interrupted probabilistic random walk after 551583
Probabilistic random walk after 551583
Running SMT prover for 1 properties.
[2023-04-06 23:05:15] [INFO ]
// Phase 1: matrix 656 rows 392 cols
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:15] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
[2023-04-06 23:05:16] [INFO ]
Attempting to minimize the solution
Minimization took 47 ms.
[2023-04-06 23:05:16] [INFO ]
Parikh walk visited 0 properties
Support contains 3 out of 392 places.
Starting structural reductions in
Applied a total of 0 rules in 54
Finished structural reductions in
Incomplete random walk after 100000
Running SMT prover for 1 properties.
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
[2023-04-06 23:05:17] [INFO ]
Attempting to minimize the solution
Minimization took 7 ms.
[2023-04-06 23:05:17] [INFO ]
Incomplete random walk after 1000000
Incomplete Best-First random walk after 1000001
Interrupted probabilistic random walk after 1726947
Probabilistic random walk after 1726947
Running SMT prover for 1 properties.
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:30] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:31] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
Attempting to minimize the solution
Minimization took 47 ms.
[2023-04-06 23:05:32] [INFO ]
Parikh walk visited 0 properties
Support contains 3 out of 392 places.
Starting structural reductions in
Applied a total of 0 rules in 67
Finished structural reductions in
Starting structural reductions in
Applied a total of 0 rules in 57
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:32] [INFO ]
[2023-04-06 23:05:34] [INFO ]
Implicit Place search using SMT
[2023-04-06 23:05:34] [INFO ]
[2023-04-06 23:05:34] [INFO ]
[2023-04-06 23:05:34] [INFO ]
[2023-04-06 23:05:34] [INFO ]
Finished structural reductions in
Incomplete random walk after 100000
Running SMT prover for 1 properties.
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
[2023-04-06 23:05:35] [INFO ]
Attempting to minimize the solution
Minimization took 9 ms.
[2023-04-06 23:05:35] [INFO ]
Finished random walk after 458
Parikh walk visited 0 properties in 0 ms.
Finished random walk after 1 steps,
Parikh walk visited 0 properties in 0 ms.
Incomplete random walk after 10000
Incomplete Best-First random walk after 10001
Finished probabilistic random walk after 93886
Probabilistic random walk after 93886
Parikh walk visited 0 properties in 0 ms.
Graph (trivial) has 1938 edges and
Free SCC test removed 56 places
Drop transitions removed 216 transitions
Ensure Unique test removed 1400
Reduce isomorphic transitions removed
Drop transitions removed 78 transitions
Trivial Post-agglo rules discarded
Performed 78 trivial Post agglomeration.
Iterating post reduction 0 with
Reduce places removed 78 places
Iterating post reduction 1 with
Performed 17 Pre agglomeration using
Pre-agglomeration after 2 with 17
Deduced a syphon composed of 17
Ensure Unique test removed 8 places
Reduce places removed 25 places
Iterating global reduction 2 with
Performed 111 Post agglomeration
Deduced a syphon composed of 111
Reduce places removed 111 places
Iterating global reduction 2 with
Ensure Unique test removed 54 transitions
Reduce isomorphic transitions removed
Iterating post reduction 2 with
Performed 8 Post agglomeration using
Deduced a syphon composed of 8 places
Reduce places removed 8 places and
Iterating global reduction 3 with
Drop transitions removed 8 transitions
Reduce isomorphic transitions removed
Iterating post reduction 3 with
Drop transitions removed 9 transitions
Redundant transition composition
Iterating global reduction 4 with
Free-agglomeration rule applied
Iterating global reduction 4 with
Reduce places removed 57 places
Iterating post reduction 4 with
Partial Free-agglomeration rule
Drop transitions removed 8 transitions
Iterating global reduction 5 with
Applied a total of 630 rules in
Running SMT prover for 1 properties.
// Phase 1: matrix 154 rows 57 cols
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
Attempting to minimize the solution
Minimization took 6 ms.
[2023-04-06 23:05:36] [INFO ]
Starting structural reductions in
Discarding 25 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 50 rules in 46
Finished structural reductions in
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
[2023-04-06 23:05:36] [INFO ]
Starting structural reductions in
Discarding 22 places :
Symmetric choice reduction at 0
Iterating global reduction 0 with
Applied a total of 44 rules in 41
Finished structural reductions in
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
[2023-04-06 23:05:37] [INFO ]
Total runtime 155152 ms.
There are residual formulas that
starting LoLA
BK_INPUT EisenbergMcGuire-PT-08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//..
current directory: /home/mcc/execution/37
CTLFireability

FORMULA EisenbergMcGuire-PT-08-CTLFireability-05

FORMULA EisenbergMcGuire-PT-08-CTLFireability-15

FORMULA EisenbergMcGuire-PT-08-CTLFireability-08

FORMULA EisenbergMcGuire-PT-08-CTLFireability-07
TIME LIMIT: Killed by timeout
MemTotal: 16393216 kB
MemFree: 13782476 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16272192 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/it
+ PYTHONPATH=/home/mcc/BenchKit/itstools/
+ export LD_LIBRARY_PATH=/home/mcc/BenchK
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itst
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin/
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execut
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/executi
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/ex
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: RELEASE
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: RELEASE
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: RELEASE
lola: Created skeleton in 0.000000
lola: Created skeleton in 1.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 0.000000
lola: Created skeleton in 1.000000
lola: Created skeleton in 0.000000
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: LAUNCH task # 16 (type EXCL)
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: FINISHED task # 16 (type
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 1 (type EXCL)
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: LAUNCH task # 52 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: FINISHED task # 62 (type
lola: result : unknown
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
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lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: rewrite Frontend/Parser/formula_r
lola: LAUNCH task # 57 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/
sara: place or transition ordering
FINISHED FORMULA: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-05:

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EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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57 EF FNDP 6/3590

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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57 EF FNDP 11/3585

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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sara: warning, failure of lp_solve
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:
EisenbergMcGuire-PT-08-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 32/224
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
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EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
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lola: LAUNCH task # 25 (type EXCL)
lola: time limit : 391 sec
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lola: result : false
lola: markings :
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lola: LAUNCH task # 22 (type EXCL)
lola: time limit : 447 sec
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lola: FINISHED task # 22 (type
lola: result : false
lola: markings :
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lola: LAUNCH task # 13 (type EXCL)
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-00:
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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PENDING FORMULAS: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-01:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
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EisenbergMcGuire-PT-08-CTLFireability-01:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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PENDING FORMULAS: CATEGORY
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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PENDING FORMULAS: CATEGORY
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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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4 CTL EXCL 50/604
52 EF FNDP 617/1183
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57 EF FNDP 617/2979

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EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-01:
EisenbergMcGuire-PT-08-CTLFireability-02:
EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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57 EF FNDP 682/2914

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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52 EF FNDP 687/1113
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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52 EF FNDP 697/1103
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57 EF FNDP 697/2899
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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52 EF FNDP 702/1098
53 EF STEQ 702/1098
57 EF FNDP 702/2894
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

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52 EF FNDP 707/1093
53 EF STEQ 707/1093
57 EF FNDP 707/2889
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
EisenbergMcGuire-PT-08-CTLFireability-13:
EisenbergMcGuire-PT-08-CTLFireability-14:

TASK CATEGORY TYPE TIME/TLIMIT
52 EF FNDP 712/1088
53 EF STEQ 712/1088
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-14:

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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
EisenbergMcGuire-PT-08-CTLFireability-12:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-03:
EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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52 EF FNDP 802/998
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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52 EF FNDP 807/993
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
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EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
EisenbergMcGuire-PT-08-CTLFireability-09:
EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
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EisenbergMcGuire-PT-08-CTLFireability-04:
EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-10:
EisenbergMcGuire-PT-08-CTLFireability-11:
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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EisenbergMcGuire-PT-08-CTLFireability-06: SP ECTL
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57 EF FNDP 1108/3591
60 EF STEQ 205/2688

Time elapsed: 1117 secs. Pages
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-05:
EisenbergMcGuire-PT-08-CTLFireability-07:
EisenbergMcGuire-PT-08-CTLFireability-08:
EisenbergMcGuire-PT-08-CTLFireability-15:

PENDING FORMULAS: CATEGORY
EisenbergMcGuire-PT-08-CTLFireability-00:
EisenbergMcGuire-PT-08-CTLFireability-01:

========== file over 1MB has been
retrieve it from the run archives
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============================ examination is CTLFireability 7987245000258 ============================ 23 15:23 CTLCardinality.txt 23 15:23 CTLCardinality.xml 23 15:22 CTLFireability.txt 23 15:22 CTLFireability.xml 23 07:07 LTLCardinality.txt 23 07:07 LTLCardinality.xml 23 07:07 LTLFireability.txt 23 07:07 LTLFireability.xml 26 22:42 NewModel 23 15:24 ReachabilityCardinality.txt 23 15:24 ReachabilityCardinality.xml 23 15:24 ReachabilityFireability.txt 23 15:24 ReachabilityFireability.xml 23 07:07 UpperBounds.txt 23 07:07 UpperBounds.xml 26 22:42 equiv_col 26 22:42 instance 26 22:42 iscolored 31 16:48 model.pnml by BenchKit (invocation template) of booleans the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML] Parsing pnml file : /home/mcc/execution/model.pnml Load time of PNML (sax parser for PT used): 151 ms Transformed 712 places. Transformed 2816 transitions. Found NUPN structural information; Parsed PT model containing 712 places and 2816 transitions and 13440 arcs in 227 ms. execution/CTLFireability.xml in 16 ms. places. Attempting structural reductions. LTL mode, iteration 0 : 712/712 places, 2816/2816 transitions. with 30 rule applications. Total rules 30 place count 682 transition count 2576 30 rules applied. Total rules applied 60 place count 682 transition count 2576 ms. Remains 682 /712 variables (removed 30) and now considering 2576/2816 (removed 240) transitions. Flow matrix only has 1128 transitions (discarded 1448 similar events) Computed 25 invariants in 32 ms Implicit Places using invariants in 469 ms returned [] Flow matrix only has 1128 transitions (discarded 1448 similar events) Invariant cache hit. State equation strengthened by 466 read => feed constraints. Implicit Places using invariants and state equation in 1922 ms returned [] with State Equation took 2418 ms to find 0 implicit places. Flow matrix only has 1128 transitions (discarded 1448 similar events) Invariant cache hit. Dead Transitions using invariants and state equation in 847 ms found 0 transitions. LTL mode, iteration 1 : 682/712 places, 2576/2816 transitions. LTL mode , in 1 iterations and 3381 ms. Remains : 682/712 places, 2576/2816 transitions. places after structural reductions. Flatten gal took : 202 ms Flatten gal took : 111 ms Input system was already deterministic with 2576 transitions. places (down from 160) after GAL structural reductions. steps, including 2 resets, run finished after 609 ms. (steps per millisecond=16 ) properties (out of 132) seen :25 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=16 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 2 ms. (steps per millisecond=50 ) properties (out of 107) seen :0 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=33 ) properties (out of 107) seen :0 Flow matrix only has 1128 transitions (discarded 1448 similar events) Invariant cache hit. [Real]Absence check using 17 positive place invariants in 21 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 9 ms returned sat After 1737ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:106 [Nat]Absence check using 17 positive place invariants in 18 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 5 ms returned sat After 4717ms SMT Verify possible using state equation in natural domain returned unsat :8 sat :99 State equation strengthened by 466 read => feed constraints. After 5691ms SMT Verify possible using 466 Read/Feed constraints in natural domain returned unsat :8 sat :99 Deduced a trap composed of 3 places in 167 ms of which 5 ms to minimize. Deduced a trap composed of 3 places in 117 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 57 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 530 ms Deduced a trap composed of 82 places in 130 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 86 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 56 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 453 ms Deduced a trap composed of 36 places in 100 ms of which 0 ms to minimize. Deduced a trap composed of 26 places in 88 ms of which 1 ms to minimize. Deduced a trap composed of 47 places in 84 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 452 ms Deduced a trap composed of 194 places in 222 ms of which 1 ms to minimize. Deduced a trap composed of 134 places in 220 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 567 ms Deduced a trap composed of 44 places in 90 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 100 ms of which 0 ms to minimize. Deduced a trap composed of 38 places in 74 ms of which 0 ms to minimize. Deduced a trap composed of 56 places in 75 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 48 ms of which 0 ms to minimize. Deduced a trap composed of 32 places in 76 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 7/6 trap constraints in 823 ms Deduced a trap composed of 82 places in 183 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 196 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 518 ms Deduced a trap composed of 38 places in 247 ms of which 0 ms to minimize. Deduced a trap composed of 130 places in 252 ms of which 0 ms to minimize. Deduced a trap composed of 34 places in 231 ms of which 1 ms to minimize. Deduced a trap composed of 99 places in 229 ms of which 1 ms to minimize. Deduced a trap composed of 29 places in 80 ms of which 2 ms to minimize. Trap strengthening (SAT) tested/added 6/5 trap constraints in 1304 ms Deduced a trap composed of 20 places in 67 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 155 ms Deduced a trap composed of 41 places in 145 ms of which 0 ms to minimize. Deduced a trap composed of 50 places in 120 ms of which 0 ms to minimize. Deduced a trap composed of 29 places in 115 ms of which 0 ms to minimize. Deduced a trap composed of 36 places in 102 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 5/4 trap constraints in 720 ms Deduced a trap composed of 38 places in 98 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 193 ms Deduced a trap composed of 23 places in 142 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 225 ms Deduced a trap composed of 32 places in 104 ms of which 0 ms to minimize. Deduced a trap composed of 29 places in 82 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 315 ms Deduced a trap composed of 14 places in 67 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 153 ms Deduced a trap composed of 84 places in 246 ms of which 2 ms to minimize. Deduced a trap composed of 86 places in 140 ms of which 1 ms to minimize. Deduced a trap composed of 86 places in 134 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 719 ms Deduced a trap composed of 32 places in 75 ms of which 0 ms to minimize. Deduced a trap composed of 156 places in 210 ms of which 1 ms to minimize. Deduced a trap composed of 130 places in 208 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 690 ms Deduced a trap composed of 30 places in 135 ms of which 1 ms to minimize. Deduced a trap composed of 18 places in 135 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 400 ms Deduced a trap composed of 161 places in 198 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 292 ms Deduced a trap composed of 26 places in 93 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 182 ms Deduced a trap composed of 73 places in 80 ms of which 0 ms to minimize. Deduced a trap composed of 20 places in 73 ms of which 0 ms to minimize. Deduced a trap composed of 80 places in 79 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 428 ms Deduced a trap composed of 41 places in 74 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 166 ms Deduced a trap composed of 35 places in 63 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 170 ms After 18137ms SMT Verify possible using trap constraints in natural domain returned unsat :10 sat :96 found. After 25018ms SMT Verify possible using all constraints in natural domain returned unsat :10 sat :96 different solutions. in 4563 ms. places. Attempting structural reductions. REACHABILITY mode, iteration 0 : 682/682 places, 2576/2576 transitions. 2 transitions Transition count delta: 2 2 rules applied. Total rules applied 2 place count 682 transition count 2574 0 transitions. 2 rules applied. Total rules applied 4 place count 680 transition count 2574 using Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 4 place count 680 transition count 2393 places in 1 ms and 0 transitions. 362 rules applied. Total rules applied 366 place count 499 transition count 2393 with 7 rule applications. Total rules 373 place count 492 transition count 2337 7 rules applied. Total rules applied 380 place count 492 transition count 2337 using F-continuation condition.Transition count delta: 51 places in 5 ms and 0 transitions. 102 rules applied. Total rules applied 482 place count 441 transition count 2286 227 ms. Remains 441 /682 variables (removed 241) and now considering 2286/2576 (removed 290) transitions. REACHABILITY mode , in 1 iterations and 228 ms. Remains : 441/682 places, 2286/2576 transitions. steps, including 2 resets, run finished after 439 ms. (steps per millisecond=22 ) properties (out of 96) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 96) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 96) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 96) seen :1 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 95) seen :1 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 94) seen :1 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 93) seen :0 steps, run timeout after 3001 ms. (steps per millisecond=38 ) properties seen :{0=1, 3=1, 6=1, 7=1, 9=1, 12=1, 15=1, 21=1, 23=1, 24=1, 29=1, 34=1, 35=1, 36=1, 46=1, 52=1, 56=1, 58=1, 62=1, 64=1, 66=1, 72=1, 87=1, 91=1, 92=1} steps, saw 82949 distinct states, run finished after 3002 ms. (steps per millisecond=38 ) properties seen :25 Flow matrix only has 838 transitions (discarded 1448 similar events) Computed 25 invariants in 7 ms [Real]Absence check using 17 positive place invariants in 9 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 10 ms returned sat After 576ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:68 [Nat]Absence check using 17 positive place invariants in 9 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 4 ms returned sat After 2269ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :68 State equation strengthened by 417 read => feed constraints. After 3004ms SMT Verify possible using 417 Read/Feed constraints in natural domain returned unsat :0 sat :68 Deduced a trap composed of 3 places in 108 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 117 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 105 ms of which 0 ms to minimize. Deduced a trap composed of 25 places in 63 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 5/4 trap constraints in 542 ms Deduced a trap composed of 3 places in 112 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 102 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 83 ms of which 4 ms to minimize. Deduced a trap composed of 27 places in 82 ms of which 0 ms to minimize. Deduced a trap composed of 38 places in 60 ms of which 1 ms to minimize. Deduced a trap composed of 19 places in 63 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 7/6 trap constraints in 729 ms Deduced a trap composed of 3 places in 43 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 123 ms Deduced a trap composed of 24 places in 78 ms of which 0 ms to minimize. Deduced a trap composed of 27 places in 75 ms of which 1 ms to minimize. Deduced a trap composed of 24 places in 59 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 375 ms Deduced a trap composed of 3 places in 47 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 115 ms Deduced a trap composed of 27 places in 70 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 125 ms Deduced a trap composed of 11 places in 56 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 114 ms Deduced a trap composed of 29 places in 85 ms of which 0 ms to minimize. Deduced a trap composed of 49 places in 66 ms of which 2 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 244 ms Deduced a trap composed of 32 places in 68 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 127 ms Deduced a trap composed of 18 places in 58 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 118 ms Deduced a trap composed of 14 places in 68 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 124 ms Deduced a trap composed of 20 places in 65 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 124 ms Deduced a trap composed of 25 places in 59 ms of which 1 ms to minimize. Deduced a trap composed of 34 places in 63 ms of which 0 ms to minimize. Deduced a trap composed of 29 places in 74 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 320 ms Deduced a trap composed of 21 places in 81 ms of which 1 ms to minimize. Deduced a trap composed of 16 places in 81 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 255 ms Deduced a trap composed of 29 places in 64 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 135 ms After 10421ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :68 found. After 16616ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :68 in 704 ms. places. Attempting structural reductions. REACHABILITY mode, iteration 0 : 441/441 places, 2286/2286 transitions. Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 0 place count 441 transition count 2274 places in 1 ms and 0 transitions. 24 rules applied. Total rules applied 24 place count 429 transition count 2274 with 6 rule applications. Total rules 30 place count 423 transition count 2226 6 rules applied. Total rules applied 36 place count 423 transition count 2226 F-continuation condition.Transition count delta: 3 in 2 ms 0 transitions. 6 rules applied. Total rules applied 42 place count 420 transition count 2223 ms. Remains 420 /441 variables (removed 21) and now considering 2223/2286 (removed 63) transitions. REACHABILITY mode , in 1 iterations and 119 ms. Remains : 420/441 places, 2223/2286 transitions. steps, including 2 resets, run finished after 282 ms. (steps per millisecond=35 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 68) seen :0 steps, run timeout after 3001 ms. (steps per millisecond=38 ) properties seen :{2=1, 32=1, 51=1} steps, saw 78340 distinct states, run finished after 3001 ms. (steps per millisecond=38 ) properties seen :3 Flow matrix only has 775 transitions (discarded 1448 similar events) Computed 25 invariants in 6 ms [Real]Absence check using 17 positive place invariants in 10 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 580ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:65 [Nat]Absence check using 17 positive place invariants in 9 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 1909ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :65 State equation strengthened by 375 read => feed constraints. After 2378ms SMT Verify possible using 375 Read/Feed constraints in natural domain returned unsat :0 sat :65 Deduced a trap composed of 3 places in 146 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 86 ms of which 1 ms to minimize. Deduced a trap composed of 34 places in 80 ms of which 1 ms to minimize. Deduced a trap composed of 29 places in 62 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 5/4 trap constraints in 515 ms Deduced a trap composed of 5 places in 77 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 74 ms of which 1 ms to minimize. Deduced a trap composed of 19 places in 64 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 324 ms Deduced a trap composed of 11 places in 151 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 124 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 129 ms of which 0 ms to minimize. Deduced a trap composed of 38 places in 107 ms of which 0 ms to minimize. Deduced a trap composed of 21 places in 92 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 6/5 trap constraints in 766 ms Deduced a trap composed of 19 places in 76 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 125 ms of which 0 ms to minimize. Deduced a trap composed of 26 places in 109 ms of which 0 ms to minimize. Deduced a trap composed of 27 places in 81 ms of which 1 ms to minimize. Deduced a trap composed of 15 places in 98 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 6/5 trap constraints in 661 ms Deduced a trap composed of 19 places in 84 ms of which 0 ms to minimize. Deduced a trap composed of 20 places in 82 ms of which 0 ms to minimize. Deduced a trap composed of 15 places in 60 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 345 ms Deduced a trap composed of 11 places in 148 ms of which 1 ms to minimize. Deduced a trap composed of 13 places in 125 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 359 ms Deduced a trap composed of 60 places in 189 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 243 ms Deduced a trap composed of 25 places in 58 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 115 ms Deduced a trap composed of 25 places in 59 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 105 ms Deduced a trap composed of 17 places in 53 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 105 ms Deduced a trap composed of 20 places in 166 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 223 ms Deduced a trap composed of 19 places in 182 ms of which 1 ms to minimize. Deduced a trap composed of 21 places in 173 ms of which 1 ms to minimize. Deduced a trap composed of 52 places in 197 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 683 ms Deduced a trap composed of 54 places in 190 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 244 ms Deduced a trap composed of 24 places in 86 ms of which 0 ms to minimize. Deduced a trap composed of 28 places in 82 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 252 ms Deduced a trap composed of 32 places in 67 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 118 ms Deduced a trap composed of 22 places in 77 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 140 ms Deduced a trap composed of 23 places in 74 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 133 ms Deduced a trap composed of 113 places in 163 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 220 ms After 11318ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :65 found. After 17566ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :65 in 930 ms. Attempting structural reductions. REACHABILITY mode, iteration 0 : 420/420 places, 2223/2223 transitions. with 3 rule applications. Total rules 3 place count 417 transition count 2199 3 rules applied. Total rules applied 6 place count 417 transition count 2199 ms. Remains 417 /420 variables (removed 3) and now considering 2199/2223 (removed 24) transitions. REACHABILITY mode , in 1 iterations and 70 ms. Remains : 417/420 places, 2199/2223 transitions. steps, including 2 resets, run finished after 371 ms. (steps per millisecond=26 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 65) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 65) seen :1 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 64) seen :0 steps, run timeout after 3001 ms. (steps per millisecond=46 ) properties seen :{54=1, 62=1} steps, saw 91499 distinct states, run finished after 3002 ms. (steps per millisecond=46 ) properties seen :2 Flow matrix only has 751 transitions (discarded 1448 similar events) Computed 25 invariants in 3 ms [Real]Absence check using 17 positive place invariants in 9 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 4 ms returned sat After 483ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:62 [Nat]Absence check using 17 positive place invariants in 8 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 1845ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :62 State equation strengthened by 354 read => feed constraints. After 2361ms SMT Verify possible using 354 Read/Feed constraints in natural domain returned unsat :0 sat :62 Deduced a trap composed of 3 places in 133 ms of which 0 ms to minimize. Deduced a trap composed of 19 places in 133 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 142 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 130 ms of which 1 ms to minimize. Deduced a trap composed of 30 places in 106 ms of which 0 ms to minimize. Deduced a trap composed of 55 places in 62 ms of which 1 ms to minimize. Deduced a trap composed of 6 places in 107 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 56 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 90 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 10/9 trap constraints in 1230 ms Deduced a trap composed of 49 places in 105 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 96 ms of which 0 ms to minimize. Deduced a trap composed of 32 places in 76 ms of which 1 ms to minimize. Deduced a trap composed of 34 places in 56 ms of which 0 ms to minimize. Deduced a trap composed of 28 places in 70 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 6/5 trap constraints in 572 ms Deduced a trap composed of 3 places in 61 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 48 ms of which 0 ms to minimize. Deduced a trap composed of 31 places in 61 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 298 ms Deduced a trap composed of 23 places in 68 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 125 ms Deduced a trap composed of 24 places in 64 ms of which 0 ms to minimize. Deduced a trap composed of 17 places in 76 ms of which 0 ms to minimize. Deduced a trap composed of 18 places in 61 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 322 ms Deduced a trap composed of 22 places in 79 ms of which 0 ms to minimize. Deduced a trap composed of 11 places in 78 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 238 ms Deduced a trap composed of 15 places in 85 ms of which 0 ms to minimize. Deduced a trap composed of 20 places in 55 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 225 ms Deduced a trap composed of 17 places in 72 ms of which 2 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 127 ms Deduced a trap composed of 24 places in 70 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 135 ms Deduced a trap composed of 13 places in 96 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 152 ms Deduced a trap composed of 111 places in 174 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 227 ms Deduced a trap composed of 27 places in 99 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 167 ms Deduced a trap composed of 29 places in 70 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 138 ms Deduced a trap composed of 21 places in 73 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 127 ms Deduced a trap composed of 25 places in 80 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 136 ms Deduced a trap composed of 22 places in 67 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 130 ms After 10152ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :62 found. After 15603ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :62 in 521 ms. Attempting structural reductions. REACHABILITY mode, iteration 0 : 417/417 places, 2199/2199 transitions. Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 0 place count 417 transition count 2198 in 2 ms 0 transitions. 2 rules applied. Total rules applied 2 place count 416 transition count 2198 with 1 rule applications. Total rules 3 place count 415 transition count 2190 1 rules applied. Total rules applied 4 place count 415 transition count 2190 ms. Remains 415 /417 variables (removed 2) and now considering 2190/2199 (removed 9) transitions. REACHABILITY mode , in 1 iterations and 79 ms. Remains : 415/417 places, 2190/2199 transitions. steps, including 2 resets, run finished after 347 ms. (steps per millisecond=28 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 62) seen :0 steps, run timeout after 3001 ms. (steps per millisecond=27 ) properties seen :{} steps, saw 55353 distinct states, run finished after 3002 ms. (steps per millisecond=27 ) properties seen :0 Flow matrix only has 742 transitions (discarded 1448 similar events) Computed 25 invariants in 4 ms [Real]Absence check using 17 positive place invariants in 8 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 477ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:62 [Nat]Absence check using 17 positive place invariants in 9 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 1832ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :62 State equation strengthened by 347 read => feed constraints. After 2481ms SMT Verify possible using 347 Read/Feed constraints in natural domain returned unsat :0 sat :62 Deduced a trap composed of 3 places in 187 ms of which 0 ms to minimize. Deduced a trap composed of 19 places in 176 ms of which 1 ms to minimize. Deduced a trap composed of 27 places in 164 ms of which 1 ms to minimize. Deduced a trap composed of 24 places in 147 ms of which 0 ms to minimize. Deduced a trap composed of 76 places in 149 ms of which 0 ms to minimize. Deduced a trap composed of 29 places in 78 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 7/6 trap constraints in 1124 ms Deduced a trap composed of 3 places in 206 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 163 ms of which 0 ms to minimize. Deduced a trap composed of 4 places in 128 ms of which 1 ms to minimize. Deduced a trap composed of 10 places in 121 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 72 ms of which 0 ms to minimize. Deduced a trap composed of 23 places in 74 ms of which 1 ms to minimize. Deduced a trap composed of 19 places in 59 ms of which 0 ms to minimize. Deduced a trap composed of 23 places in 60 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 9/8 trap constraints in 1165 ms Deduced a trap composed of 3 places in 189 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 124 ms of which 0 ms to minimize. Deduced a trap composed of 57 places in 104 ms of which 0 ms to minimize. Deduced a trap composed of 49 places in 101 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 5/4 trap constraints in 661 ms Deduced a trap composed of 19 places in 77 ms of which 1 ms to minimize. Deduced a trap composed of 15 places in 64 ms of which 1 ms to minimize. Deduced a trap composed of 17 places in 57 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 316 ms Deduced a trap composed of 3 places in 39 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 89 ms Deduced a trap composed of 24 places in 60 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 115 ms Deduced a trap composed of 21 places in 61 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 125 ms Deduced a trap composed of 23 places in 78 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 134 ms Deduced a trap composed of 11 places in 64 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 118 ms Deduced a trap composed of 25 places in 59 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 128 ms Deduced a trap composed of 24 places in 62 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 126 ms Deduced a trap composed of 18 places in 66 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 122 ms Deduced a trap composed of 31 places in 60 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 119 ms Deduced a trap composed of 32 places in 63 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 117 ms Deduced a trap composed of 3 places in 48 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 101 ms Deduced a trap composed of 28 places in 86 ms of which 0 ms to minimize. Deduced a trap composed of 55 places in 66 ms of which 1 ms to minimize. Deduced a trap composed of 32 places in 64 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 4/3 trap constraints in 326 ms Deduced a trap composed of 20 places in 88 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 139 ms Deduced a trap composed of 15 places in 81 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 133 ms Deduced a trap composed of 25 places in 69 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 121 ms Deduced a trap composed of 28 places in 63 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 113 ms Deduced a trap composed of 35 places in 68 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 120 ms Deduced a trap composed of 28 places in 83 ms of which 0 ms to minimize. Deduced a trap composed of 22 places in 54 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 3/2 trap constraints in 223 ms After 11256ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :62 found. After 16490ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :62 in 417 ms. Attempting structural reductions. REACHABILITY mode, iteration 0 : 415/415 places, 2190/2190 transitions. ms. Remains 415 /415 variables (removed 0) and now considering 2190/2190 (removed 0) transitions. REACHABILITY mode , in 1 iterations and 64 ms. Remains : 415/415 places, 2190/2190 transitions. REACHABILITY mode, iteration 0 : 415/415 places, 2190/2190 transitions. ms. Remains 415 /415 variables (removed 0) and now considering 2190/2190 (removed 0) transitions. Flow matrix only has 742 transitions (discarded 1448 similar events) Invariant cache hit. Implicit Places using invariants in 178 ms returned [] Flow matrix only has 742 transitions (discarded 1448 similar events) Invariant cache hit. State equation strengthened by 347 read => feed constraints. Implicit Places using invariants and state equation in 1090 ms returned [] with State Equation took 1270 ms to find 0 implicit places. Redundant transitions in 115 ms returned [] Flow matrix only has 742 transitions (discarded 1448 similar events) Invariant cache hit. Dead Transitions using invariants and state equation in 661 ms found 0 transitions. REACHABILITY mode , in 1 iterations and 2114 ms. Remains : 415/415 places, 2190/2190 transitions. propositions for a total of 16 simplifications. Flatten gal took : 74 ms Flatten gal took : 88 ms Input system was already deterministic with 2576 transitions. places (down from 144) after GAL structural reductions. places and 0 stable transitions LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 24 rule applications. Total rules 24 place count 658 transition count 2384 24 rules applied. Total rules applied 48 place count 658 transition count 2384 ms. Remains 658 /682 variables (removed 24) and now considering 2384/2576 (removed 192) transitions. LTL mode , in 1 iterations and 27 ms. Remains : 658/682 places, 2384/2576 transitions. Flatten gal took : 57 ms Flatten gal took : 61 ms Input system was already deterministic with 2384 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 26 rule applications. Total rules 26 place count 656 transition count 2368 26 rules applied. Total rules applied 52 place count 656 transition count 2368 ms. Remains 656 /682 variables (removed 26) and now considering 2368/2576 (removed 208) transitions. LTL mode , in 1 iterations and 48 ms. Remains : 656/682 places, 2368/2576 transitions. Flatten gal took : 57 ms Flatten gal took : 63 ms Input system was already deterministic with 2368 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 25 rule applications. Total rules 25 place count 657 transition count 2376 25 rules applied. Total rules applied 50 place count 657 transition count 2376 ms. Remains 657 /682 variables (removed 25) and now considering 2376/2576 (removed 200) transitions. LTL mode , in 1 iterations and 43 ms. Remains : 657/682 places, 2376/2576 transitions. Flatten gal took : 55 ms Flatten gal took : 69 ms Input system was already deterministic with 2376 transitions. SI_CTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. 8 transitions Transition count delta: 8 8 rules applied. Total rules applied 8 place count 682 transition count 2568 0 transitions. 8 rules applied. Total rules applied 16 place count 674 transition count 2568 using Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 16 place count 674 transition count 2368 places in 2 ms and 0 transitions. 400 rules applied. Total rules applied 416 place count 474 transition count 2368 with 25 rule applications. Total rules 441 place count 449 transition count 2168 25 rules applied. Total rules applied 466 place count 449 transition count 2168 using F-continuation condition.Transition count delta: 56 places in 1 ms and 0 transitions. 112 rules applied. Total rules applied 578 place count 393 transition count 2112 175 ms. Remains 393 /682 variables (removed 289) and now considering 2112/2576 (removed 464) transitions. SI_CTL mode , in 1 iterations and 176 ms. Remains : 393/682 places, 2112/2576 transitions. Flatten gal took : 43 ms Flatten gal took : 48 ms Input system was already deterministic with 2112 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 23 rule applications. Total rules 23 place count 659 transition count 2392 23 rules applied. Total rules applied 46 place count 659 transition count 2392 ms. Remains 659 /682 variables (removed 23) and now considering 2392/2576 (removed 184) transitions. LTL mode , in 1 iterations and 42 ms. Remains : 659/682 places, 2392/2576 transitions. Flatten gal took : 47 ms Flatten gal took : 52 ms Input system was already deterministic with 2392 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 23 rule applications. Total rules 23 place count 659 transition count 2392 23 rules applied. Total rules applied 46 place count 659 transition count 2392 ms. Remains 659 /682 variables (removed 23) and now considering 2392/2576 (removed 184) transitions. LTL mode , in 1 iterations and 26 ms. Remains : 659/682 places, 2392/2576 transitions. Flatten gal took : 48 ms Flatten gal took : 53 ms Input system was already deterministic with 2392 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 24 rule applications. Total rules 24 place count 658 transition count 2384 24 rules applied. Total rules applied 48 place count 658 transition count 2384 ms. Remains 658 /682 variables (removed 24) and now considering 2384/2576 (removed 192) transitions. LTL mode , in 1 iterations and 31 ms. Remains : 658/682 places, 2384/2576 transitions. Flatten gal took : 48 ms Flatten gal took : 53 ms Input system was already deterministic with 2384 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 24 rule applications. Total rules 24 place count 658 transition count 2384 24 rules applied. Total rules applied 48 place count 658 transition count 2384 ms. Remains 658 /682 variables (removed 24) and now considering 2384/2576 (removed 192) transitions. LTL mode , in 1 iterations and 21 ms. Remains : 658/682 places, 2384/2576 transitions. Flatten gal took : 45 ms Flatten gal took : 50 ms Input system was already deterministic with 2384 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 22 rule applications. Total rules 22 place count 660 transition count 2400 22 rules applied. Total rules applied 44 place count 660 transition count 2400 ms. Remains 660 /682 variables (removed 22) and now considering 2400/2576 (removed 176) transitions. LTL mode , in 1 iterations and 44 ms. Remains : 660/682 places, 2400/2576 transitions. Flatten gal took : 46 ms Flatten gal took : 61 ms Input system was already deterministic with 2400 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 24 rule applications. Total rules 24 place count 658 transition count 2384 24 rules applied. Total rules applied 48 place count 658 transition count 2384 ms. Remains 658 /682 variables (removed 24) and now considering 2384/2576 (removed 192) transitions. LTL mode , in 1 iterations and 24 ms. Remains : 658/682 places, 2384/2576 transitions. Flatten gal took : 47 ms Flatten gal took : 50 ms Input system was already deterministic with 2384 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 26 rule applications. Total rules 26 place count 656 transition count 2368 26 rules applied. Total rules applied 52 place count 656 transition count 2368 ms. Remains 656 /682 variables (removed 26) and now considering 2368/2576 (removed 208) transitions. LTL mode , in 1 iterations and 22 ms. Remains : 656/682 places, 2368/2576 transitions. Flatten gal took : 44 ms Flatten gal took : 51 ms Input system was already deterministic with 2368 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 23 rule applications. Total rules 23 place count 659 transition count 2392 23 rules applied. Total rules applied 46 place count 659 transition count 2392 ms. Remains 659 /682 variables (removed 23) and now considering 2392/2576 (removed 184) transitions. LTL mode , in 1 iterations and 32 ms. Remains : 659/682 places, 2392/2576 transitions. Flatten gal took : 46 ms Flatten gal took : 51 ms Input system was already deterministic with 2392 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 24 rule applications. Total rules 24 place count 658 transition count 2384 24 rules applied. Total rules applied 48 place count 658 transition count 2384 ms. Remains 658 /682 variables (removed 24) and now considering 2384/2576 (removed 192) transitions. LTL mode , in 1 iterations and 25 ms. Remains : 658/682 places, 2384/2576 transitions. Flatten gal took : 45 ms Flatten gal took : 51 ms Input system was already deterministic with 2384 transitions. SI_CTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. 8 transitions Transition count delta: 8 8 rules applied. Total rules applied 8 place count 682 transition count 2568 0 transitions. 8 rules applied. Total rules applied 16 place count 674 transition count 2568 using Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 16 place count 674 transition count 2368 places in 1 ms and 0 transitions. 400 rules applied. Total rules applied 416 place count 474 transition count 2368 with 26 rule applications. Total rules 442 place count 448 transition count 2160 26 rules applied. Total rules applied 468 place count 448 transition count 2160 using F-continuation condition.Transition count delta: 56 places in 1 ms and 0 transitions. 112 rules applied. Total rules applied 580 place count 392 transition count 2104 117 ms. Remains 392 /682 variables (removed 290) and now considering 2104/2576 (removed 472) transitions. SI_CTL mode , in 1 iterations and 118 ms. Remains : 392/682 places, 2104/2576 transitions. Flatten gal took : 39 ms Flatten gal took : 44 ms Input system was already deterministic with 2104 transitions. steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 1) seen :0 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=1666 ) properties (out of 1) seen :0 steps, run timeout after 3001 ms. (steps per millisecond=183 ) properties seen :{} steps, saw 284989 distinct states, run finished after 3001 ms. (steps per millisecond=183 ) properties seen :0 Flow matrix only has 656 transitions (discarded 1448 similar events) Computed 25 invariants in 8 ms [Real]Absence check using 17 positive place invariants in 6 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 242ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1 [Nat]Absence check using 17 positive place invariants in 6 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 147ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1 State equation strengthened by 284 read => feed constraints. After 74ms SMT Verify possible using 284 Read/Feed constraints in natural domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 149 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 127 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 105 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 90 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 82 ms of which 0 ms to minimize. Deduced a trap composed of 16 places in 85 ms of which 0 ms to minimize. Deduced a trap composed of 12 places in 51 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 41 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 91 ms of which 0 ms to minimize. Deduced a trap composed of 23 places in 57 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 11/10 trap constraints in 1171 ms After 1267ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1 found. After 1557ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1 in 16 ms. Attempting structural reductions. REACHABILITY mode, iteration 0 : 392/392 places, 2104/2104 transitions. ms. Remains 392 /392 variables (removed 0) and now considering 2104/2104 (removed 0) transitions. REACHABILITY mode , in 1 iterations and 54 ms. Remains : 392/392 places, 2104/2104 transitions. steps, including 2 resets, run finished after 358 ms. (steps per millisecond=279 ) properties (out of 3) seen :2 Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. [Real]Absence check using 17 positive place invariants in 5 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 123ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 State equation strengthened by 284 read => feed constraints. After 39ms SMT Verify possible using 284 Read/Feed constraints in real domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 46 ms of which 1 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 103 ms After 160ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:1 After 357ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1 [Nat]Absence check using 17 positive place invariants in 6 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 123ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1 After 42ms SMT Verify possible using 284 Read/Feed constraints in natural domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 48 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 97 ms After 155ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1 found. After 344ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1 steps, including 2 resets, run finished after 2511 ms. (steps per millisecond=398 ) properties (out of 1) seen :0 steps, including 2 resets, run finished after 551 ms. (steps per millisecond=1814 ) properties (out of 1) seen :0 steps, run timeout after 9001 ms. (steps per millisecond=191 ) properties seen :{} steps, saw 630571 distinct states, run finished after 9001 ms. (steps per millisecond=191 ) properties seen :0 Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. [Real]Absence check using 17 positive place invariants in 6 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 223ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1 [Nat]Absence check using 17 positive place invariants in 6 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 140ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1 State equation strengthened by 284 read => feed constraints. After 78ms SMT Verify possible using 284 Read/Feed constraints in natural domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 132 ms of which 1 ms to minimize. Deduced a trap composed of 4 places in 119 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 139 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 123 ms of which 1 ms to minimize. Deduced a trap composed of 3 places in 114 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 103 ms of which 0 ms to minimize. Deduced a trap composed of 3 places in 100 ms of which 0 ms to minimize. Deduced a trap composed of 28 places in 106 ms of which 0 ms to minimize. Deduced a trap composed of 46 places in 96 ms of which 0 ms to minimize. Deduced a trap composed of 37 places in 98 ms of which 0 ms to minimize. Deduced a trap composed of 26 places in 97 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 12/11 trap constraints in 1586 ms After 1695ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1 found. After 1956ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1 in 28 ms. Attempting structural reductions. REACHABILITY mode, iteration 0 : 392/392 places, 2104/2104 transitions. ms. Remains 392 /392 variables (removed 0) and now considering 2104/2104 (removed 0) transitions. REACHABILITY mode , in 1 iterations and 67 ms. Remains : 392/392 places, 2104/2104 transitions. REACHABILITY mode, iteration 0 : 392/392 places, 2104/2104 transitions. ms. Remains 392 /392 variables (removed 0) and now considering 2104/2104 (removed 0) transitions. Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. Implicit Places using invariants in 333 ms returned [] Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. State equation strengthened by 284 read => feed constraints. Implicit Places using invariants and state equation in 1523 ms returned [] with State Equation took 1857 ms to find 0 implicit places. Redundant transitions in 95 ms returned [] Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. Dead Transitions using invariants and state equation in 631 ms found 0 transitions. REACHABILITY mode , in 1 iterations and 2651 ms. Remains : 392/392 places, 2104/2104 transitions. steps, including 2 resets, run finished after 238 ms. (steps per millisecond=420 ) properties (out of 3) seen :2 Flow matrix only has 656 transitions (discarded 1448 similar events) Invariant cache hit. [Real]Absence check using 17 positive place invariants in 6 ms returned sat [Real]Absence check using 17 positive and 8 generalized place invariants in 3 ms returned sat After 136ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 State equation strengthened by 284 read => feed constraints. After 32ms SMT Verify possible using 284 Read/Feed constraints in real domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 44 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 103 ms After 158ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:1 After 368ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1 [Nat]Absence check using 17 positive place invariants in 6 ms returned sat [Nat]Absence check using 17 positive and 8 generalized place invariants in 9 ms returned sat After 137ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1 After 44ms SMT Verify possible using 284 Read/Feed constraints in natural domain returned unsat :0 sat :1 Deduced a trap composed of 3 places in 44 ms of which 0 ms to minimize. Trap strengthening (SAT) tested/added 2/1 trap constraints in 94 ms After 166ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1 found. After 384ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=152 ) including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=1 ) steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 1) seen :0 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=1250 ) properties (out of 1) seen :0 steps, run visited all 1 properties in 519 ms. (steps per millisecond=180 ) steps, saw 60395 distinct states, run finished after 519 ms. (steps per millisecond=180 ) properties seen :1 392 vertex of which 64 / 392 are part of one of the 8 SCC in 3 ms transitions 1616 transitions. 78 transitions Transition count delta: 78 78 rules applied. Total rules applied 79 place count 336 transition count 410 and 0 transitions. 78 rules applied. Total rules applied 157 place count 258 transition count 410 Quasi-Persistent + Divergent Free condition.. Pre rules applied. Total rules applied 157 place count 258 transition count 393 places in 0 ms and 0 transitions. 42 rules applied. Total rules applied 199 place count 233 transition count 393 using F-continuation condition.Transition count delta: 111 places in 0 ms and 0 transitions. 222 rules applied. Total rules applied 421 place count 122 transition count 282 54 transitions. 54 rules applied. Total rules applied 475 place count 122 transition count 228 F-continuation condition.Transition count delta: 0 in 0 ms 0 transitions. 16 rules applied. Total rules applied 491 place count 114 transition count 228 8 transitions. 8 rules applied. Total rules applied 499 place count 114 transition count 220 rules discarded 9 transitions 9 rules applied. Total rules applied 508 place count 114 transition count 211 57 times. 57 rules applied. Total rules applied 565 place count 114 transition count 154 and 0 transitions. 57 rules applied. Total rules applied 622 place count 57 transition count 154 applied 8 times. 8 rules applied. Total rules applied 630 place count 57 transition count 154 40 ms. Remains 57 /392 variables (removed 335) and now considering 154/2104 (removed 1950) transitions. Computed 17 invariants in 1 ms [Real]Absence check using 17 positive place invariants in 2 ms returned sat After 53ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1 [Nat]Absence check using 17 positive place invariants in 3 ms returned sat After 28ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1 State equation strengthened by 8 read => feed constraints. After 7ms SMT Verify possible using 8 Read/Feed constraints in natural domain returned unsat :0 sat :1 After 15ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1 found. After 85ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1 LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 25 rule applications. Total rules 25 place count 657 transition count 2376 25 rules applied. Total rules applied 50 place count 657 transition count 2376 ms. Remains 657 /682 variables (removed 25) and now considering 2376/2576 (removed 200) transitions. LTL mode , in 1 iterations and 46 ms. Remains : 657/682 places, 2376/2576 transitions. Flatten gal took : 45 ms Flatten gal took : 51 ms Input system was already deterministic with 2376 transitions. LTL mode, iteration 0 : 682/682 places, 2576/2576 transitions. with 22 rule applications. Total rules 22 place count 660 transition count 2400 22 rules applied. Total rules applied 44 place count 660 transition count 2400 ms. Remains 660 /682 variables (removed 22) and now considering 2400/2576 (removed 176) transitions. LTL mode , in 1 iterations and 41 ms. Remains : 660/682 places, 2400/2576 transitions. Flatten gal took : 45 ms Flatten gal took : 51 ms Input system was already deterministic with 2400 transitions. Flatten gal took : 53 ms Flatten gal took : 53 ms Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms. Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 682 places, 2576 transitions and 12480 arcs took 13 ms. ITS could not solve within timeout /reducer/bin//../../lola/bin/ 6 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT after 3600 seconds stools/pylibs pylibs it/itstools/pylibs: ools/pylibs: bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar /../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML ion/376/model.pnml net on/376/model.pnml ecution/376/CTLFireability.xml ewrite.k:317 ewrite.k:322 ewrite.k:328 ewrite.k:317 ewrite.k:296 ewrite.k:314 ewrite.k:296 ewrite.k:322 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:325 ewrite.k:328 ewrite.k:296 ewrite.k:325 ewrite.k:337 ewrite.k:317 ewrite.k:325 ewrite.k:334 ewrite.k:296 ewrite.k:325 ewrite.k:331 ewrite.k:296 ewrite.k:322 ewrite.k:328 ewrite.k:325 ewrite.k:331 ewrite.k:296 ewrite.k:98 ewrite.k:129 ewrite.k:547 ewrite.k:547 ewrite.k:322 ewrite.k:334 ewrite.k:296 ewrite.k:253 ewrite.k:325 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:250 ewrite.k:550 ewrite.k:550 ewrite.k:325 ewrite.k:337 ewrite.k:317 ewrite.k:296 ewrite.k:325 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:322 ewrite.k:337 ewrite.k:322 ewrite.k:331 ewrite.k:296 ewrite.k:325 ewrite.k:334 ewrite.k:296 ewrite.k:253 ewrite.k:472 ewrite.k:553 ewrite.k:397 ewrite.k:397 ewrite.k:544 ewrite.k:253 ewrite.k:322 ewrite.k:334 ewrite.k:296 ewrite.k:322 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:469 ewrite.k:314 ewrite.k:322 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:296 ewrite.k:250 ewrite.k:250 ewrite.k:98 ewrite.k:129 ewrite.k:325 ewrite.k:337 ewrite.k:322 ewrite.k:331 ewrite.k:325 ewrite.k:328 ewrite.k:296 ewrite.k:296 ewrite.k:253 ewrite.k:253 ewrite.k:317 ewrite.k:322 ewrite.k:337 ewrite.k:296 ewrite.k:296 ewrite.k:317 ewrite.k:296 ewrite.k:296 secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. secs. places removed secs. secs. secs. secs. secs. ewrite.k:810 ewrite.k:806 ewrite.k:811 ewrite.k:812 ewrite.k:813 ewrite.k:813 ewrite.k:806 ewrite.k:815 ewrite.k:814 ewrite.k:711 ewrite.k:806 ewrite.k:815 ewrite.k:812 ewrite.k:806 ewrite.k:814 ewrite.k:812 ewrite.k:812 ewrite.k:808 ewrite.k:808 ewrite.k:811 ewrite.k:815 ewrite.k:808 ewrite.k:812 ewrite.k:810 ewrite.k:815 for 15 EisenbergMcGuire-PT-08-CTLFireability-05 ewrite.k:806 ewrite.k:811 ewrite.k:813 ewrite.k:813 ewrite.k:814 ewrite.k:808 ewrite.k:813 ewrite.k:811 ewrite.k:811 ewrite.k:814 ewrite.k:808 ewrite.k:807 ewrite.k:807 ewrite.k:659 ewrite.k:661 ewrite.k:666 ewrite.k:665 ewrite.k:659 ewrite.k:662 ewrite.k:668 ewrite.k:659 ewrite.k:661 ewrite.k:668 ewrite.k:668 ewrite.k:679 ewrite.k:679 ewrite.k:679 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-05 4711 17594 0.000000 1 for 0 EisenbergMcGuire-PT-08-CTLFireability-00 ewrite.k:753 ewrite.k:767 ewrite.k:779 ewrite.k:787 ewrite.k:793 ewrite.k:813 ewrite.k:812 ewrite.k:812 ewrite.k:721 ewrite.k:787 ewrite.k:711 ewrite.k:806 ewrite.k:808 ewrite.k:807 ewrite.k:812 ewrite.k:814 ewrite.k:807 ewrite.k:807 ewrite.k:806 ewrite.k:809 ewrite.k:811 ewrite.k:711 ewrite.k:806 ewrite.k:809 ewrite.k:811 ewrite.k:811 ewrite.k:807 ewrite.k:813 ewrite.k:806 ewrite.k:807 ewrite.k:806 ewrite.k:812 ewrite.k:808 ewrite.k:809 ewrite.k:812 ewrite.k:809 ewrite.k:812 ewrite.k:806 ewrite.k:811 ewrite.k:810 ewrite.k:814 ewrite.k:813 ewrite.k:808 ewrite.k:812 ewrite.k:808 for 43 EisenbergMcGuire-PT-08-CTLFireability-13 for 43 EisenbergMcGuire-PT-08-CTLFireability-13 for 43 EisenbergMcGuire-PT-08-CTLFireability-13 ewrite.k:806 ewrite.k:812 ewrite.k:811 ewrite.k:807 ewrite.k:814 ewrite.k:813 ewrite.k:809 ewrite.k:813 ewrite.k:814 ewrite.k:806 ewrite.k:810 ewrite.k:811 ewrite.k:809 SRCH) for EisenbergMcGuire-PT-08-CTLFireability-13 0.000000 1 ewrite.k:808 ewrite.k:806 ewrite.k:812 ewrite.k:806 ewrite.k:813 ewrite.k:721 ewrite.k:787 ewrite.k:806 ewrite.k:806 ewrite.k:806 ewrite.k:806 ewrite.k:813 ewrite.k:809 ewrite.k:807 ewrite.k:809 ewrite.k:811 ewrite.k:809 ewrite.k:807 ewrite.k:813 ewrite.k:813 ewrite.k:811 ewrite.k:808 ewrite.k:815 ewrite.k:809 ewrite.k:808 ewrite.k:812 ewrite.k:807 ewrite.k:806 ewrite.k:711 ewrite.k:721 ewrite.k:787 for 27 EisenbergMcGuire-PT-08-CTLFireability-09 execution/376/CTLFireability-53.sara. is non-deterministic VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 EisenbergMcGuire-PT-08-CTLFireability-00 214339 m, 42867 m/sec, 435873 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 146639 t fired, 1 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 117728 t fired, 1 attempts, . in use: 3 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 EisenbergMcGuire-PT-08-CTLFireability-00 701137 m, 97359 m/sec, 1504574 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 582125 t fired, 1 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 563681 t fired, 1 attempts, . in use: 7 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 EisenbergMcGuire-PT-08-CTLFireability-00 1170760 m, 93924 m/sec, 2582364 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 1009018 t fired, 2 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 1000523 t fired, 2 attempts, . in use: 10 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 EisenbergMcGuire-PT-08-CTLFireability-00 1629045 m, 91657 m/sec, 3668933 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 1427102 t fired, 2 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 1426055 t fired, 2 attempts, . in use: 14 (at job 1765) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 EisenbergMcGuire-PT-08-CTLFireability-00 2078708 m, 89932 m/sec, 4738961 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 1831374 t fired, 2 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 1841683 t fired, 2 attempts, . in use: 18 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 EisenbergMcGuire-PT-08-CTLFireability-00 2522941 m, 88846 m/sec, 5812257 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 2223829 t fired, 3 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 2245848 t fired, 3 attempts, . in use: 21 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 EisenbergMcGuire-PT-08-CTLFireability-00 2964000 m, 88211 m/sec, 6877794 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 2606967 t fired, 3 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 2639756 t fired, 3 attempts, . in use: 25 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 EisenbergMcGuire-PT-08-CTLFireability-00 3395007 m, 86201 m/sec, 7941287 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 2981739 t fired, 3 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 3024147 t fired, 4 attempts, . in use: 28 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 EisenbergMcGuire-PT-08-CTLFireability-00 3821467 m, 85292 m/sec, 8990521 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 3349273 t fired, 4 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 3401187 t fired, 4 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 3713781 t fired, 4 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 3771472 t fired, 4 attempts, . in use: 32 for 6 EisenbergMcGuire-PT-08-CTLFireability-02 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 4078894 t fired, 5 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 2/32 EisenbergMcGuire-PT-08-CTLFireability-02 201966 m, 40393 m/sec, 319078 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 4140727 t fired, 5 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 4440562 t fired, 5 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 3/32 EisenbergMcGuire-PT-08-CTLFireability-02 410363 m, 41679 m/sec, 710559 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 4507156 t fired, 5 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 4797680 t fired, 5 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 4/32 EisenbergMcGuire-PT-08-CTLFireability-02 613540 m, 40635 m/sec, 1100248 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 4868927 t fired, 5 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 5151385 t fired, 6 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 5/32 EisenbergMcGuire-PT-08-CTLFireability-02 812180 m, 39728 m/sec, 1485777 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 5227477 t fired, 6 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 5503134 t fired, 6 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 6/32 EisenbergMcGuire-PT-08-CTLFireability-02 1006471 m, 38858 m/sec, 1871721 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 5583840 t fired, 6 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 5851954 t fired, 6 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 7/32 EisenbergMcGuire-PT-08-CTLFireability-02 1203837 m, 39473 m/sec, 2251411 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 5938261 t fired, 6 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 6200075 t fired, 7 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 8/32 EisenbergMcGuire-PT-08-CTLFireability-02 1399384 m, 39109 m/sec, 2635575 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 6290596 t fired, 7 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 6546007 t fired, 7 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 9/32 EisenbergMcGuire-PT-08-CTLFireability-02 1596443 m, 39411 m/sec, 3017899 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 6641253 t fired, 7 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 6890828 t fired, 7 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 10/32 EisenbergMcGuire-PT-08-CTLFireability-02 1791855 m, 39082 m/sec, 3399679 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 6991593 t fired, 7 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 7234476 t fired, 8 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 11/32 EisenbergMcGuire-PT-08-CTLFireability-02 1984997 m, 38628 m/sec, 3781379 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 7339658 t fired, 8 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 7577682 t fired, 8 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 12/32 EisenbergMcGuire-PT-08-CTLFireability-02 2177723 m, 38545 m/sec, 4165591 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 7687681 t fired, 8 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 7918114 t fired, 8 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 12/32 EisenbergMcGuire-PT-08-CTLFireability-02 2368475 m, 38150 m/sec, 4549150 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 8034233 t fired, 9 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 8259464 t fired, 9 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 13/32 EisenbergMcGuire-PT-08-CTLFireability-02 2559073 m, 38119 m/sec, 4933679 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 8380936 t fired, 9 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 8600052 t fired, 9 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 14/32 EisenbergMcGuire-PT-08-CTLFireability-02 2749091 m, 38003 m/sec, 5321535 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 8726559 t fired, 9 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 8939345 t fired, 9 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 15/32 EisenbergMcGuire-PT-08-CTLFireability-02 2940143 m, 38210 m/sec, 5710009 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 9071078 t fired, 10 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 9277777 t fired, 10 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 16/32 EisenbergMcGuire-PT-08-CTLFireability-02 3131719 m, 38315 m/sec, 6093319 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 9415257 t fired, 10 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 9615834 t fired, 10 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 17/32 EisenbergMcGuire-PT-08-CTLFireability-02 3322202 m, 38096 m/sec, 6477006 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 9759629 t fired, 10 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 9953279 t fired, 10 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 18/32 EisenbergMcGuire-PT-08-CTLFireability-02 3513744 m, 38308 m/sec, 6865053 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 10102912 t fired, 11 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 10290437 t fired, 11 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 19/32 EisenbergMcGuire-PT-08-CTLFireability-02 3706839 m, 38619 m/sec, 7247297 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 10447214 t fired, 11 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 10628330 t fired, 11 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 20/32 EisenbergMcGuire-PT-08-CTLFireability-02 3896141 m, 37860 m/sec, 7633846 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 10790527 t fired, 11 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 10965921 t fired, 11 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 20/32 EisenbergMcGuire-PT-08-CTLFireability-02 4083787 m, 37529 m/sec, 8020698 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 11132692 t fired, 12 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 11302000 t fired, 12 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 21/32 EisenbergMcGuire-PT-08-CTLFireability-02 4276943 m, 38631 m/sec, 8404133 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 11474836 t fired, 12 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 11637689 t fired, 12 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 22/32 EisenbergMcGuire-PT-08-CTLFireability-02 4468715 m, 38354 m/sec, 8783807 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 11816771 t fired, 12 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 11974435 t fired, 12 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 23/32 EisenbergMcGuire-PT-08-CTLFireability-02 4659733 m, 38203 m/sec, 9168685 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 12158140 t fired, 13 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 12310263 t fired, 13 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 24/32 EisenbergMcGuire-PT-08-CTLFireability-02 4851845 m, 38422 m/sec, 9550337 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 12498873 t fired, 13 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 12645195 t fired, 13 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 25/32 EisenbergMcGuire-PT-08-CTLFireability-02 5040562 m, 37743 m/sec, 9933626 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 12840668 t fired, 13 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 12981320 t fired, 13 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 26/32 EisenbergMcGuire-PT-08-CTLFireability-02 5231957 m, 38279 m/sec, 10314602 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 13179922 t fired, 14 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 13316574 t fired, 14 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 27/32 EisenbergMcGuire-PT-08-CTLFireability-02 5421641 m, 37936 m/sec, 10697170 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 13520206 t fired, 14 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 13651977 t fired, 14 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 27/32 EisenbergMcGuire-PT-08-CTLFireability-02 5614350 m, 38541 m/sec, 11078146 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 13860635 t fired, 14 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 13987025 t fired, 14 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 28/32 EisenbergMcGuire-PT-08-CTLFireability-02 5804151 m, 37960 m/sec, 11461466 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 14200888 t fired, 15 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 14320788 t fired, 15 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 29/32 EisenbergMcGuire-PT-08-CTLFireability-02 5994953 m, 38160 m/sec, 11844839 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 14541048 t fired, 15 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 14654621 t fired, 15 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 30/32 EisenbergMcGuire-PT-08-CTLFireability-02 6186846 m, 38378 m/sec, 12226893 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 14880735 t fired, 15 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 14988198 t fired, 15 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 31/32 EisenbergMcGuire-PT-08-CTLFireability-02 6380578 m, 38746 m/sec, 12603682 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 15218561 t fired, 16 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 15322394 t fired, 16 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 32/32 EisenbergMcGuire-PT-08-CTLFireability-02 6571275 m, 38139 m/sec, 12985872 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 15557822 t fired, 16 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 15656268 t fired, 16 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 15898657 t fired, 16 attempts, . in use: 32 for 49 EisenbergMcGuire-PT-08-CTLFireability-15 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-15 8 7 0.000000 1 for 46 EisenbergMcGuire-PT-08-CTLFireability-14 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 EisenbergMcGuire-PT-08-CTLFireability-14 307462 m, 61492 m/sec, 819553 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 15989014 t fired, 16 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 16237293 t fired, 17 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 EisenbergMcGuire-PT-08-CTLFireability-14 598749 m, 58257 m/sec, 1626339 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 16322623 t fired, 17 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 16576233 t fired, 17 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 EisenbergMcGuire-PT-08-CTLFireability-14 876326 m, 55515 m/sec, 2450280 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 16655514 t fired, 17 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 16914435 t fired, 17 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 EisenbergMcGuire-PT-08-CTLFireability-14 1125263 m, 49787 m/sec, 3314104 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 16989203 t fired, 17 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 17253006 t fired, 18 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 EisenbergMcGuire-PT-08-CTLFireability-14 1345152 m, 43977 m/sec, 4237748 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 17322434 t fired, 18 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 17591166 t fired, 18 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 EisenbergMcGuire-PT-08-CTLFireability-14 1593422 m, 49654 m/sec, 5101702 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 17655626 t fired, 18 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 17929715 t fired, 18 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-14 1828963 m, 47108 m/sec, 5966679 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 17989528 t fired, 18 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 18268328 t fired, 19 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 EisenbergMcGuire-PT-08-CTLFireability-14 1995949 m, 33397 m/sec, 7003839 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 18322977 t fired, 19 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 18606837 t fired, 19 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 EisenbergMcGuire-PT-08-CTLFireability-14 2233235 m, 47457 m/sec, 7871737 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 18655407 t fired, 19 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 18945081 t fired, 19 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 EisenbergMcGuire-PT-08-CTLFireability-14 2472098 m, 47772 m/sec, 8735955 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 18988583 t fired, 19 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 19283924 t fired, 20 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 EisenbergMcGuire-PT-08-CTLFireability-14 2707461 m, 47072 m/sec, 9578266 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 19322220 t fired, 20 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 19623143 t fired, 20 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 EisenbergMcGuire-PT-08-CTLFireability-14 2950203 m, 48548 m/sec, 10407126 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 19656026 t fired, 20 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 19961549 t fired, 20 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 EisenbergMcGuire-PT-08-CTLFireability-14 3163311 m, 42621 m/sec, 11295999 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 19989324 t fired, 20 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 20300102 t fired, 21 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 EisenbergMcGuire-PT-08-CTLFireability-14 3361369 m, 39611 m/sec, 12231265 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 20322671 t fired, 21 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 20639002 t fired, 21 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 EisenbergMcGuire-PT-08-CTLFireability-14 3576533 m, 43032 m/sec, 13118563 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 20656226 t fired, 21 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 20977435 t fired, 21 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 EisenbergMcGuire-PT-08-CTLFireability-14 3792445 m, 43182 m/sec, 13994130 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 20989942 t fired, 21 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 21316356 t fired, 22 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-14 4001072 m, 41725 m/sec, 14901182 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 21322794 t fired, 22 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 21654998 t fired, 22 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 EisenbergMcGuire-PT-08-CTLFireability-14 4216457 m, 43077 m/sec, 15790452 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 21656144 t fired, 22 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 21993424 t fired, 22 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 EisenbergMcGuire-PT-08-CTLFireability-14 4419003 m, 40509 m/sec, 16670697 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 21989062 t fired, 22 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 22332081 t fired, 23 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-14 4610214 m, 38242 m/sec, 17582273 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 22320768 t fired, 23 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 22669865 t fired, 23 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 22651044 t fired, 23 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 23006734 t fired, 24 attempts, . in use: 32 for 40 EisenbergMcGuire-PT-08-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 EisenbergMcGuire-PT-08-CTLFireability-12 525796 m, 105159 m/sec, 1114794 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 22981246 t fired, 23 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 23343777 t fired, 24 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 EisenbergMcGuire-PT-08-CTLFireability-12 1013717 m, 97584 m/sec, 2212507 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 23313633 t fired, 24 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 23681300 t fired, 24 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-12 1482532 m, 93763 m/sec, 3325471 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 23644686 t fired, 24 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 24017993 t fired, 25 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 EisenbergMcGuire-PT-08-CTLFireability-12 1941310 m, 91755 m/sec, 4413668 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 23974873 t fired, 24 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 24352969 t fired, 25 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 EisenbergMcGuire-PT-08-CTLFireability-12 2391940 m, 90126 m/sec, 5492566 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 24306263 t fired, 25 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 24690170 t fired, 25 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 EisenbergMcGuire-PT-08-CTLFireability-12 2837045 m, 89021 m/sec, 6565386 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 24637582 t fired, 25 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 25027472 t fired, 26 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-12 3269975 m, 86586 m/sec, 7629748 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 24961042 t fired, 25 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 25356881 t fired, 26 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-12 3696199 m, 85244 m/sec, 8683296 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 25284977 t fired, 26 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 25686739 t fired, 26 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 25612052 t fired, 26 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 26019780 t fired, 27 attempts, . in use: 32 for 37 EisenbergMcGuire-PT-08-CTLFireability-11 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 EisenbergMcGuire-PT-08-CTLFireability-11 522639 m, 104527 m/sec, 1107179 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 25935158 t fired, 26 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 26349449 t fired, 27 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 EisenbergMcGuire-PT-08-CTLFireability-11 1001692 m, 95810 m/sec, 2183678 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 26257523 t fired, 27 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 26677394 t fired, 27 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-11 1452548 m, 90171 m/sec, 3254832 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 26580103 t fired, 27 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 27006428 t fired, 28 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 EisenbergMcGuire-PT-08-CTLFireability-11 1899596 m, 89409 m/sec, 4313709 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 26903253 t fired, 27 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 27335279 t fired, 28 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 EisenbergMcGuire-PT-08-CTLFireability-11 2345216 m, 89124 m/sec, 5378209 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 27223041 t fired, 28 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 27661905 t fired, 28 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 EisenbergMcGuire-PT-08-CTLFireability-11 2788690 m, 88694 m/sec, 6454795 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 27543187 t fired, 28 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 27986910 t fired, 28 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-11 3219972 m, 86256 m/sec, 7505306 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 27863640 t fired, 28 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 28312354 t fired, 29 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 EisenbergMcGuire-PT-08-CTLFireability-11 3641607 m, 84327 m/sec, 8548384 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 28183754 t fired, 29 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 28637732 t fired, 29 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-11 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 28502445 t fired, 29 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 28963921 t fired, 29 attempts, . in use: 32 for 34 EisenbergMcGuire-PT-08-CTLFireability-10 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 EisenbergMcGuire-PT-08-CTLFireability-10 512204 m, 102440 m/sec, 1084412 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 28822655 t fired, 29 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 29289965 t fired, 30 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 EisenbergMcGuire-PT-08-CTLFireability-10 996723 m, 96903 m/sec, 2171563 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 29142445 t fired, 30 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 29615162 t fired, 30 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-10 1461767 m, 93008 m/sec, 3278541 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 29461921 t fired, 30 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 29940599 t fired, 30 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 EisenbergMcGuire-PT-08-CTLFireability-10 1915140 m, 90674 m/sec, 4350493 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 29785118 t fired, 30 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 30268895 t fired, 31 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 EisenbergMcGuire-PT-08-CTLFireability-10 2360349 m, 89041 m/sec, 5413055 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 30109962 t fired, 31 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 30598909 t fired, 31 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 EisenbergMcGuire-PT-08-CTLFireability-10 2814014 m, 90733 m/sec, 6510922 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 30428824 t fired, 31 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 30923297 t fired, 31 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-10 3254843 m, 88165 m/sec, 7594015 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 30753584 t fired, 31 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 31252903 t fired, 32 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-10 3682611 m, 85553 m/sec, 8652075 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 31080575 t fired, 32 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 31585349 t fired, 32 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 4 1 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 31409008 t fired, 32 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 31918689 t fired, 32 attempts, . in use: 32 for 27 EisenbergMcGuire-PT-08-CTLFireability-09 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-09 1 1 0.000000 1 for 24 EisenbergMcGuire-PT-08-CTLFireability-08 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-08 44 67 0.000000 1 for 21 EisenbergMcGuire-PT-08-CTLFireability-07 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-07 73 166 0.000000 1 for 12 EisenbergMcGuire-PT-08-CTLFireability-04 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 EisenbergMcGuire-PT-08-CTLFireability-04 323609 m, 64721 m/sec, 862691 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 31736513 t fired, 32 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 32252938 t fired, 33 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 EisenbergMcGuire-PT-08-CTLFireability-04 621276 m, 59533 m/sec, 1691987 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 32065878 t fired, 33 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 32587613 t fired, 33 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 EisenbergMcGuire-PT-08-CTLFireability-04 901997 m, 56144 m/sec, 2545405 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 32394248 t fired, 33 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 32922276 t fired, 33 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 EisenbergMcGuire-PT-08-CTLFireability-04 1158685 m, 51337 m/sec, 3415625 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 32722871 t fired, 33 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 33256027 t fired, 34 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 EisenbergMcGuire-PT-08-CTLFireability-04 1380656 m, 44394 m/sec, 4344924 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 33051033 t fired, 34 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 33589902 t fired, 34 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 EisenbergMcGuire-PT-08-CTLFireability-04 1629109 m, 49690 m/sec, 5218171 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 33378086 t fired, 34 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 33922709 t fired, 34 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-04 1859785 m, 46135 m/sec, 6104800 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 33708362 t fired, 34 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 34258238 t fired, 35 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 EisenbergMcGuire-PT-08-CTLFireability-04 2025038 m, 33050 m/sec, 7133001 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 34037290 t fired, 35 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 34593443 t fired, 35 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 EisenbergMcGuire-PT-08-CTLFireability-04 2273397 m, 49671 m/sec, 8002401 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 34366889 t fired, 35 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 34927643 t fired, 35 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 EisenbergMcGuire-PT-08-CTLFireability-04 2515039 m, 48328 m/sec, 8881820 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 34695907 t fired, 35 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 35262890 t fired, 36 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 EisenbergMcGuire-PT-08-CTLFireability-04 2756059 m, 48204 m/sec, 9731464 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 35025978 t fired, 36 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 35598692 t fired, 36 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 EisenbergMcGuire-PT-08-CTLFireability-04 2996845 m, 48157 m/sec, 10582628 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 35355564 t fired, 36 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 35934321 t fired, 36 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 EisenbergMcGuire-PT-08-CTLFireability-04 3213877 m, 43406 m/sec, 11489761 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 35684022 t fired, 36 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 36269444 t fired, 37 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 EisenbergMcGuire-PT-08-CTLFireability-04 3405075 m, 38239 m/sec, 12442975 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 36011307 t fired, 37 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 36602395 t fired, 37 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 EisenbergMcGuire-PT-08-CTLFireability-04 3633992 m, 45783 m/sec, 13351309 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 36335611 t fired, 37 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 36931356 t fired, 37 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 EisenbergMcGuire-PT-08-CTLFireability-04 3860776 m, 45356 m/sec, 14256302 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 36660260 t fired, 37 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 37262868 t fired, 38 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 EisenbergMcGuire-PT-08-CTLFireability-04 4065472 m, 40939 m/sec, 15218402 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 36985612 t fired, 37 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 37594333 t fired, 38 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 EisenbergMcGuire-PT-08-CTLFireability-04 4293407 m, 45587 m/sec, 16115369 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 37311976 t fired, 38 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 37925739 t fired, 38 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-04 4511408 m, 43600 m/sec, 17024210 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 37637575 t fired, 38 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 38255837 t fired, 39 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 EisenbergMcGuire-PT-08-CTLFireability-04 4708983 m, 39515 m/sec, 17970802 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 37963022 t fired, 38 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 38587047 t fired, 39 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 38289079 t fired, 39 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 38919084 t fired, 39 attempts, . in use: 32 for 3 EisenbergMcGuire-PT-08-CTLFireability-01 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 EisenbergMcGuire-PT-08-CTLFireability-01 282662 m, 56532 m/sec, 1052701 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 38615093 t fired, 39 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 39250367 t fired, 40 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 EisenbergMcGuire-PT-08-CTLFireability-01 489610 m, 41389 m/sec, 2100747 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 38939964 t fired, 39 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 39581096 t fired, 40 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 EisenbergMcGuire-PT-08-CTLFireability-01 739529 m, 49983 m/sec, 3136095 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 39265991 t fired, 40 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 39913105 t fired, 40 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 EisenbergMcGuire-PT-08-CTLFireability-01 964733 m, 45040 m/sec, 4162209 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 39591452 t fired, 40 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 40244284 t fired, 41 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 EisenbergMcGuire-PT-08-CTLFireability-01 1201617 m, 47376 m/sec, 5180026 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 39917813 t fired, 40 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 40575819 t fired, 41 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 EisenbergMcGuire-PT-08-CTLFireability-01 1432063 m, 46089 m/sec, 6198666 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 40243318 t fired, 41 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 40905867 t fired, 41 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 EisenbergMcGuire-PT-08-CTLFireability-01 1648178 m, 43223 m/sec, 7216206 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 40569928 t fired, 41 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 41237324 t fired, 42 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 EisenbergMcGuire-PT-08-CTLFireability-01 1853774 m, 41119 m/sec, 8225718 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 40893783 t fired, 41 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 41565931 t fired, 42 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 EisenbergMcGuire-PT-08-CTLFireability-01 2096077 m, 48460 m/sec, 9241911 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 41208290 t fired, 42 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 41886280 t fired, 42 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 EisenbergMcGuire-PT-08-CTLFireability-01 2292755 m, 39335 m/sec, 10237926 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 41528227 t fired, 42 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 42211899 t fired, 43 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 EisenbergMcGuire-PT-08-CTLFireability-01 2491615 m, 39772 m/sec, 11209025 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 41856808 t fired, 42 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 42544721 t fired, 43 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 EisenbergMcGuire-PT-08-CTLFireability-01 2687710 m, 39219 m/sec, 12178610 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 42183379 t fired, 43 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 42876689 t fired, 43 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 EisenbergMcGuire-PT-08-CTLFireability-01 2865516 m, 35561 m/sec, 13169083 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 42511230 t fired, 43 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 43210301 t fired, 44 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 EisenbergMcGuire-PT-08-CTLFireability-01 3046956 m, 36288 m/sec, 14147595 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 42838682 t fired, 43 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 43543463 t fired, 44 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 EisenbergMcGuire-PT-08-CTLFireability-01 3233957 m, 37400 m/sec, 15128515 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 43166352 t fired, 44 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 43876485 t fired, 44 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 EisenbergMcGuire-PT-08-CTLFireability-01 3399656 m, 33139 m/sec, 16122295 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 43493327 t fired, 44 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 44209466 t fired, 45 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 EisenbergMcGuire-PT-08-CTLFireability-01 3565223 m, 33113 m/sec, 17095771 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 43820744 t fired, 44 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 44543103 t fired, 45 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 EisenbergMcGuire-PT-08-CTLFireability-01 3711935 m, 29342 m/sec, 18085915 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 44147913 t fired, 45 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 44876187 t fired, 45 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-01 3855238 m, 28660 m/sec, 19079822 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 44476789 t fired, 45 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 45209627 t fired, 46 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 EisenbergMcGuire-PT-08-CTLFireability-01 4074445 m, 43841 m/sec, 20046605 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 44804310 t fired, 45 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 45542022 t fired, 46 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 EisenbergMcGuire-PT-08-CTLFireability-01 4252645 m, 35640 m/sec, 21046705 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 45131862 t fired, 46 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 45875037 t fired, 46 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-01 4424209 m, 34312 m/sec, 22063614 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 45449274 t fired, 46 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 46198015 t fired, 47 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 EisenbergMcGuire-PT-08-CTLFireability-01 4610917 m, 37341 m/sec, 23068170 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 45766573 t fired, 46 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 46520896 t fired, 47 attempts, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-01 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 3 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 46092132 t fired, 47 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 46851549 t fired, 47 attempts, . in use: 32 for 27 EisenbergMcGuire-PT-08-CTLFireability-09 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 46418832 t fired, 47 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 47184258 t fired, 48 attempts, . 2/32 EisenbergMcGuire-PT-08-CTLFireability-09 238294 m, 47658 m/sec, 472032 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 46745827 t fired, 47 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 47516604 t fired, 48 attempts, . 3/32 EisenbergMcGuire-PT-08-CTLFireability-09 472256 m, 46792 m/sec, 956882 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 47072372 t fired, 48 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 47849015 t fired, 48 attempts, . 4/32 EisenbergMcGuire-PT-08-CTLFireability-09 699970 m, 45542 m/sec, 1439363 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 47399437 t fired, 48 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 48180780 t fired, 49 attempts, . 6/32 EisenbergMcGuire-PT-08-CTLFireability-09 927311 m, 45468 m/sec, 1921640 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 47713323 t fired, 48 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 48485374 t fired, 49 attempts, . 7/32 EisenbergMcGuire-PT-08-CTLFireability-09 1133207 m, 41179 m/sec, 2365255 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 48027636 t fired, 49 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 48797731 t fired, 49 attempts, . 8/32 EisenbergMcGuire-PT-08-CTLFireability-09 1353416 m, 44041 m/sec, 2835224 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 48350194 t fired, 49 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 49126195 t fired, 50 attempts, . 9/32 EisenbergMcGuire-PT-08-CTLFireability-09 1565745 m, 42465 m/sec, 3293395 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 48668396 t fired, 49 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 49453920 t fired, 50 attempts, . 10/32 EisenbergMcGuire-PT-08-CTLFireability-09 1786614 m, 44173 m/sec, 3764361 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 48968541 t fired, 49 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 49770335 t fired, 50 attempts, . 12/32 EisenbergMcGuire-PT-08-CTLFireability-09 2003264 m, 43330 m/sec, 4229290 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 49281480 t fired, 50 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 50072281 t fired, 51 attempts, . 13/32 EisenbergMcGuire-PT-08-CTLFireability-09 2225988 m, 44544 m/sec, 4715047 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 49586034 t fired, 50 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 50387290 t fired, 51 attempts, . 14/32 EisenbergMcGuire-PT-08-CTLFireability-09 2451413 m, 45085 m/sec, 5199225 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 49889750 t fired, 50 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 50700306 t fired, 51 attempts, . 15/32 EisenbergMcGuire-PT-08-CTLFireability-09 2679689 m, 45655 m/sec, 5681378 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 50198172 t fired, 51 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 51007715 t fired, 52 attempts, . 17/32 EisenbergMcGuire-PT-08-CTLFireability-09 2905552 m, 45172 m/sec, 6165158 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 50515207 t fired, 51 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 51323835 t fired, 52 attempts, . 18/32 EisenbergMcGuire-PT-08-CTLFireability-09 3130433 m, 44976 m/sec, 6645556 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 50826289 t fired, 51 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 51629037 t fired, 52 attempts, . 19/32 EisenbergMcGuire-PT-08-CTLFireability-09 3349803 m, 43874 m/sec, 7120417 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 51135590 t fired, 52 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 51935284 t fired, 52 attempts, . 20/32 EisenbergMcGuire-PT-08-CTLFireability-09 3569917 m, 44022 m/sec, 7588663 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 51440138 t fired, 52 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 52255186 t fired, 53 attempts, . 22/32 EisenbergMcGuire-PT-08-CTLFireability-09 3782784 m, 42573 m/sec, 8053082 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 51740805 t fired, 52 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 52558171 t fired, 53 attempts, . 23/32 EisenbergMcGuire-PT-08-CTLFireability-09 3988881 m, 41219 m/sec, 8502916 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 52044357 t fired, 53 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 52858975 t fired, 53 attempts, . 24/32 EisenbergMcGuire-PT-08-CTLFireability-09 4200699 m, 42363 m/sec, 8964887 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 52347362 t fired, 53 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 53169289 t fired, 54 attempts, . 25/32 EisenbergMcGuire-PT-08-CTLFireability-09 4403585 m, 40577 m/sec, 9406935 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 52644914 t fired, 53 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 53475697 t fired, 54 attempts, . 26/32 EisenbergMcGuire-PT-08-CTLFireability-09 4617366 m, 42756 m/sec, 9862197 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 52948672 t fired, 53 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 53774925 t fired, 54 attempts, . 27/32 EisenbergMcGuire-PT-08-CTLFireability-09 4822446 m, 41016 m/sec, 10307048 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 53255119 t fired, 54 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 54077369 t fired, 55 attempts, . 29/32 EisenbergMcGuire-PT-08-CTLFireability-09 5021506 m, 39812 m/sec, 10738127 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 53565940 t fired, 54 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 54379484 t fired, 55 attempts, . 30/32 EisenbergMcGuire-PT-08-CTLFireability-09 5228567 m, 41412 m/sec, 11182655 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 53865778 t fired, 54 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 54677209 t fired, 55 attempts, . 31/32 EisenbergMcGuire-PT-08-CTLFireability-09 5447781 m, 43842 m/sec, 11658152 t fired, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 2 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 54183233 t fired, 55 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 55015692 t fired, 56 attempts, . 32/32 EisenbergMcGuire-PT-08-CTLFireability-09 5667290 m, 43901 m/sec, 12132016 t fired, . in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 54497931 t fired, 55 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 55327572 t fired, 56 attempts, . in use: 32 for 43 EisenbergMcGuire-PT-08-CTLFireability-13 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 54807490 t fired, 55 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 2/32 EisenbergMcGuire-PT-08-CTLFireability-13 216705 m, 43341 m/sec, 400078 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 55635266 t fired, 56 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 55119548 t fired, 56 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 3/32 EisenbergMcGuire-PT-08-CTLFireability-13 423144 m, 41287 m/sec, 801006 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 55960499 t fired, 56 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 55413556 t fired, 56 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 4/32 EisenbergMcGuire-PT-08-CTLFireability-13 615990 m, 38569 m/sec, 1185120 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 56279719 t fired, 57 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 55725893 t fired, 56 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 5/32 EisenbergMcGuire-PT-08-CTLFireability-13 817064 m, 40214 m/sec, 1590440 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 56567385 t fired, 57 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 56031776 t fired, 57 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 7/32 EisenbergMcGuire-PT-08-CTLFireability-13 1047076 m, 46002 m/sec, 2054028 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 56886819 t fired, 57 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 56333216 t fired, 57 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 8/32 EisenbergMcGuire-PT-08-CTLFireability-13 1276612 m, 45907 m/sec, 2514180 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 57204381 t fired, 58 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 56643900 t fired, 57 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 9/32 EisenbergMcGuire-PT-08-CTLFireability-13 1501771 m, 45031 m/sec, 2963671 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 57516125 t fired, 58 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 56950949 t fired, 57 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 10/32 EisenbergMcGuire-PT-08-CTLFireability-13 1726681 m, 44982 m/sec, 3415576 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 57830489 t fired, 58 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 57263485 t fired, 58 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 12/32 EisenbergMcGuire-PT-08-CTLFireability-13 1966958 m, 48055 m/sec, 3901255 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 58148837 t fired, 59 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 57579127 t fired, 58 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 13/32 EisenbergMcGuire-PT-08-CTLFireability-13 2209162 m, 48440 m/sec, 4386029 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 58468457 t fired, 59 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 57892201 t fired, 58 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 15/32 EisenbergMcGuire-PT-08-CTLFireability-13 2448760 m, 47919 m/sec, 4868104 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 58804226 t fired, 59 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 58245777 t fired, 59 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 16/32 EisenbergMcGuire-PT-08-CTLFireability-13 2679632 m, 46174 m/sec, 5331676 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 59128801 t fired, 60 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 58559820 t fired, 59 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 17/32 EisenbergMcGuire-PT-08-CTLFireability-13 2917187 m, 47511 m/sec, 5812028 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 59446279 t fired, 60 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 58876244 t fired, 59 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 19/32 EisenbergMcGuire-PT-08-CTLFireability-13 3153519 m, 47266 m/sec, 6284125 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 59755141 t fired, 60 attempts, . in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 59180870 t fired, 60 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-13 sara is running. 20/32 EisenbergMcGuire-PT-08-CTLFireability-13 3391679 m, 47632 m/sec, 6762346 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 60066742 t fired, 61 attempts, . in use: 32 FNDP) for EisenbergMcGuire-PT-08-CTLFireability-13 (local timeout) EQUN) for EisenbergMcGuire-PT-08-CTLFireability-13 (local timeout) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 2 1 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 2 2 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 EisenbergMcGuire-PT-08-CTLFireability-13 3627161 m, 47096 m/sec, 7236875 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 60375759 t fired, 61 attempts, . in use: 32 for 27 EisenbergMcGuire-PT-08-CTLFireability-09 for 27 EisenbergMcGuire-PT-08-CTLFireability-09 FNDP) for EisenbergMcGuire-PT-08-CTLFireability-13 59489101 61 903.000000 0 ewrite.k:721 ewrite.k:787 SRCH) for EisenbergMcGuire-PT-08-CTLFireability-09 0.000000 1 for 43 EisenbergMcGuire-PT-08-CTLFireability-13 ewrite.k:711 execution/376/CTLFireability-53.sara. execution/376/CTLFireability-60.sara. EQUN) for EisenbergMcGuire-PT-08-CTLFireability-13 is non-deterministic is non-deterministic VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 EisenbergMcGuire-PT-08-CTLFireability-13 3845536 m, 43675 m/sec, 7677912 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 60699052 t fired, 61 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 EisenbergMcGuire-PT-08-CTLFireability-13 4082551 m, 47403 m/sec, 8151566 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 61038146 t fired, 62 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 EisenbergMcGuire-PT-08-CTLFireability-13 4321001 m, 47690 m/sec, 8630210 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 61378434 t fired, 62 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 EisenbergMcGuire-PT-08-CTLFireability-13 4558662 m, 47532 m/sec, 9113403 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 61718622 t fired, 62 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 (at job 1765) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 EisenbergMcGuire-PT-08-CTLFireability-13 4798280 m, 47923 m/sec, 9598087 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 62065365 t fired, 63 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 EisenbergMcGuire-PT-08-CTLFireability-13 5025820 m, 45508 m/sec, 10060111 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 62405952 t fired, 63 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 EisenbergMcGuire-PT-08-CTLFireability-13 5256625 m, 46161 m/sec, 10531491 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 62746258 t fired, 63 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-13 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 63086395 t fired, 64 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 for 18 EisenbergMcGuire-PT-08-CTLFireability-06 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 63426244 t fired, 64 attempts, . 2/32 EisenbergMcGuire-PT-08-CTLFireability-06 129982 m, 25996 m/sec, 412573 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 63766210 t fired, 64 attempts, . 3/32 EisenbergMcGuire-PT-08-CTLFireability-06 256378 m, 25279 m/sec, 896728 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 64106535 t fired, 65 attempts, . 4/32 EisenbergMcGuire-PT-08-CTLFireability-06 380558 m, 24836 m/sec, 1403473 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 (at job 5082) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 64446351 t fired, 65 attempts, . 6/32 EisenbergMcGuire-PT-08-CTLFireability-06 502589 m, 24406 m/sec, 1887250 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 64786381 t fired, 65 attempts, . 7/32 EisenbergMcGuire-PT-08-CTLFireability-06 623317 m, 24145 m/sec, 2372879 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 65126528 t fired, 66 attempts, . 8/32 EisenbergMcGuire-PT-08-CTLFireability-06 737261 m, 22788 m/sec, 2857459 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 65466954 t fired, 66 attempts, . 9/32 EisenbergMcGuire-PT-08-CTLFireability-06 855218 m, 23591 m/sec, 3368033 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 65798683 t fired, 66 attempts, . 10/32 EisenbergMcGuire-PT-08-CTLFireability-06 969798 m, 22916 m/sec, 3880234 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 66136707 t fired, 67 attempts, . 11/32 EisenbergMcGuire-PT-08-CTLFireability-06 1087577 m, 23555 m/sec, 4390029 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 66477018 t fired, 67 attempts, . 12/32 EisenbergMcGuire-PT-08-CTLFireability-06 1199641 m, 22412 m/sec, 4890940 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 66817858 t fired, 67 attempts, . 14/32 EisenbergMcGuire-PT-08-CTLFireability-06 1313030 m, 22677 m/sec, 5395996 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 67158276 t fired, 68 attempts, . 15/32 EisenbergMcGuire-PT-08-CTLFireability-06 1428471 m, 23088 m/sec, 5918721 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 67497618 t fired, 68 attempts, . 16/32 EisenbergMcGuire-PT-08-CTLFireability-06 1536937 m, 21693 m/sec, 6396055 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 67838100 t fired, 68 attempts, . 17/32 EisenbergMcGuire-PT-08-CTLFireability-06 1651335 m, 22879 m/sec, 6883794 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 68178413 t fired, 69 attempts, . 18/32 EisenbergMcGuire-PT-08-CTLFireability-06 1766436 m, 23020 m/sec, 7402976 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 68517291 t fired, 69 attempts, . 19/32 EisenbergMcGuire-PT-08-CTLFireability-06 1879160 m, 22544 m/sec, 7905716 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 68857273 t fired, 69 attempts, . 20/32 EisenbergMcGuire-PT-08-CTLFireability-06 1988596 m, 21887 m/sec, 8389829 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 69197784 t fired, 70 attempts, . 21/32 EisenbergMcGuire-PT-08-CTLFireability-06 2095856 m, 21452 m/sec, 8867751 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 69538579 t fired, 70 attempts, . 22/32 EisenbergMcGuire-PT-08-CTLFireability-06 2202944 m, 21417 m/sec, 9381539 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 69879906 t fired, 70 attempts, . 23/32 EisenbergMcGuire-PT-08-CTLFireability-06 2314621 m, 22335 m/sec, 9881922 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 70224234 t fired, 71 attempts, . 24/32 EisenbergMcGuire-PT-08-CTLFireability-06 2422958 m, 21667 m/sec, 10403633 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 70565248 t fired, 71 attempts, . 25/32 EisenbergMcGuire-PT-08-CTLFireability-06 2528527 m, 21113 m/sec, 10901558 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 70905546 t fired, 71 attempts, . 26/32 EisenbergMcGuire-PT-08-CTLFireability-06 2637752 m, 21845 m/sec, 11388006 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 71246407 t fired, 72 attempts, . 27/32 EisenbergMcGuire-PT-08-CTLFireability-06 2750506 m, 22550 m/sec, 11897748 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 71587749 t fired, 72 attempts, . 28/32 EisenbergMcGuire-PT-08-CTLFireability-06 2863778 m, 22654 m/sec, 12428942 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 71928302 t fired, 72 attempts, . 29/32 EisenbergMcGuire-PT-08-CTLFireability-06 2972624 m, 21769 m/sec, 12925886 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 72269558 t fired, 73 attempts, . 30/32 EisenbergMcGuire-PT-08-CTLFireability-06 3074263 m, 20327 m/sec, 13432714 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 72608719 t fired, 73 attempts, . 31/32 EisenbergMcGuire-PT-08-CTLFireability-06 3183741 m, 21895 m/sec, 13940517 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 EXCL) for EisenbergMcGuire-PT-08-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 72934641 t fired, 73 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 for 9 EisenbergMcGuire-PT-08-CTLFireability-03 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 EisenbergMcGuire-PT-08-CTLFireability-03 264100 m, 52820 m/sec, 1580235 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 73259446 t fired, 74 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 EisenbergMcGuire-PT-08-CTLFireability-03 503526 m, 47885 m/sec, 3269590 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 73590618 t fired, 74 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 EisenbergMcGuire-PT-08-CTLFireability-03 736293 m, 46553 m/sec, 4957420 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 73921478 t fired, 74 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 AXAG 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 0 DISJ 0 0 2 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 EisenbergMcGuire-PT-08-CTLFireability-03 965432 m, 45827 m/sec, 6607237 t fired, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 74251304 t fired, 75 attempts, . 0/5 EisenbergMcGuire-PT-08-CTLFireability-09 sara is running. in use: 32 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 truncated ====== if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="EisenbergMcGuire-PT-08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is EisenbergMcGuire-PT-08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245000258"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/EisenbergMcGuire-PT-08.tgz
mv EisenbergMcGuire-PT-08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;