fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r519-tall-167987245000210
Last Updated
May 14, 2023

About the Execution of LoLa+red for CryptoMiner-PT-D20N100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4840.623 289951.00 278508.00 1144.40 F?F???T?TFTT??F? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r519-tall-167987245000210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CryptoMiner-PT-D20N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987245000210
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 884K
-rw-r--r-- 1 mcc users 24K Mar 23 15:21 CTLCardinality.txt
-rw-r--r-- 1 mcc users 146K Mar 23 15:21 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K Mar 23 15:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 98K Mar 23 15:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 17K Mar 23 07:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Mar 23 07:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K Mar 23 07:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K Mar 23 07:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 28K Mar 23 15:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Mar 23 15:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 29K Mar 23 15:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 191K Mar 23 15:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 07:07 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.3K Mar 23 07:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 27K Mar 31 16:48 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-00
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-01
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-02
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-03
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-04
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-05
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-06
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-07
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-08
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-09
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-10
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-11
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-12
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-13
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-14
FORMULA_NAME CryptoMiner-PT-D20N100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680845081921

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CryptoMiner-PT-D20N100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 05:24:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 05:24:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 05:24:43] [INFO ] Load time of PNML (sax parser for PT used): 28 ms
[2023-04-07 05:24:43] [INFO ] Transformed 63 places.
[2023-04-07 05:24:43] [INFO ] Transformed 63 transitions.
[2023-04-07 05:24:43] [INFO ] Parsed PT model containing 63 places and 63 transitions and 187 arcs in 83 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Support contains 62 out of 63 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 63/63 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 62 transition count 63
Applied a total of 1 rules in 10 ms. Remains 62 /63 variables (removed 1) and now considering 63/63 (removed 0) transitions.
// Phase 1: matrix 63 rows 62 cols
[2023-04-07 05:24:43] [INFO ] Computed 0 invariants in 12 ms
[2023-04-07 05:24:43] [INFO ] Implicit Places using invariants in 146 ms returned []
[2023-04-07 05:24:43] [INFO ] Invariant cache hit.
[2023-04-07 05:24:43] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-04-07 05:24:43] [INFO ] Implicit Places using invariants and state equation in 106 ms returned []
Implicit Place search using SMT with State Equation took 274 ms to find 0 implicit places.
[2023-04-07 05:24:43] [INFO ] Invariant cache hit.
[2023-04-07 05:24:43] [INFO ] Dead Transitions using invariants and state equation in 59 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 62/63 places, 63/63 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 346 ms. Remains : 62/63 places, 63/63 transitions.
Support contains 62 out of 62 places after structural reductions.
[2023-04-07 05:24:44] [INFO ] Flatten gal took : 21 ms
[2023-04-07 05:24:44] [INFO ] Flatten gal took : 12 ms
[2023-04-07 05:24:44] [INFO ] Input system was already deterministic with 63 transitions.
Incomplete random walk after 10086 steps, including 3 resets, run finished after 61 ms. (steps per millisecond=165 ) properties (out of 52) seen :37
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 15) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 15) seen :3
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 12) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 12) seen :0
Running SMT prover for 12 properties.
[2023-04-07 05:24:44] [INFO ] Invariant cache hit.
[2023-04-07 05:24:44] [INFO ] After 65ms SMT Verify possible using state equation in real domain returned unsat :1 sat :7 real:4
[2023-04-07 05:24:44] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-04-07 05:24:44] [INFO ] After 29ms SMT Verify possible using 20 Read/Feed constraints in real domain returned unsat :1 sat :0 real:11
[2023-04-07 05:24:44] [INFO ] After 171ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:11
[2023-04-07 05:24:44] [INFO ] After 71ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :11
[2023-04-07 05:24:44] [INFO ] After 38ms SMT Verify possible using 20 Read/Feed constraints in natural domain returned unsat :1 sat :11
[2023-04-07 05:24:44] [INFO ] After 109ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :11
Attempting to minimize the solution found.
Minimization took 39 ms.
[2023-04-07 05:24:44] [INFO ] After 289ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :11
Fused 12 Parikh solutions to 11 different solutions.
Parikh walk visited 1 properties in 274 ms.
Support contains 27 out of 62 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 62/62 places, 63/63 transitions.
Free-agglomeration rule applied 7 times.
Iterating global reduction 0 with 7 rules applied. Total rules applied 7 place count 62 transition count 56
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 0 with 7 rules applied. Total rules applied 14 place count 55 transition count 56
Applied a total of 14 rules in 19 ms. Remains 55 /62 variables (removed 7) and now considering 56/63 (removed 7) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 19 ms. Remains : 55/62 places, 56/63 transitions.
Incomplete random walk after 10071 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=839 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=714 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 56 rows 55 cols
[2023-04-07 05:24:45] [INFO ] Computed 0 invariants in 1 ms
[2023-04-07 05:24:45] [INFO ] After 48ms SMT Verify possible using state equation in real domain returned unsat :0 sat :7 real:2
[2023-04-07 05:24:45] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-04-07 05:24:45] [INFO ] After 27ms SMT Verify possible using 20 Read/Feed constraints in real domain returned unsat :0 sat :4 real:5
[2023-04-07 05:24:45] [INFO ] After 53ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :2 real:7
Attempting to minimize the solution found.
Minimization took 7 ms.
[2023-04-07 05:24:45] [INFO ] After 159ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :2 real:7
[2023-04-07 05:24:45] [INFO ] After 34ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :9
[2023-04-07 05:24:45] [INFO ] After 29ms SMT Verify possible using 20 Read/Feed constraints in natural domain returned unsat :0 sat :9
[2023-04-07 05:24:45] [INFO ] After 69ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :9
Attempting to minimize the solution found.
Minimization took 28 ms.
[2023-04-07 05:24:45] [INFO ] After 177ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :9
Parikh walk visited 2 properties in 284 ms.
Support contains 21 out of 55 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 55/55 places, 56/56 transitions.
Free-agglomeration rule applied 3 times.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 55 transition count 53
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 6 place count 52 transition count 53
Applied a total of 6 rules in 8 ms. Remains 52 /55 variables (removed 3) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 8 ms. Remains : 52/55 places, 53/56 transitions.
Incomplete random walk after 10064 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=2516 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=714 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 7) seen :0
Interrupted probabilistic random walk after 360912 steps, run timeout after 3001 ms. (steps per millisecond=120 ) properties seen :{}
Probabilistic random walk after 360912 steps, saw 179141 distinct states, run finished after 3002 ms. (steps per millisecond=120 ) properties seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 53 rows 52 cols
[2023-04-07 05:24:49] [INFO ] Computed 0 invariants in 1 ms
[2023-04-07 05:24:49] [INFO ] After 28ms SMT Verify possible using state equation in real domain returned unsat :0 sat :6 real:1
[2023-04-07 05:24:49] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-04-07 05:24:49] [INFO ] After 18ms SMT Verify possible using 20 Read/Feed constraints in real domain returned unsat :0 sat :3 real:4
[2023-04-07 05:24:49] [INFO ] After 32ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :2 real:5
Attempting to minimize the solution found.
Minimization took 5 ms.
[2023-04-07 05:24:49] [INFO ] After 111ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1 real:6
[2023-04-07 05:24:49] [INFO ] After 29ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-04-07 05:24:49] [INFO ] After 23ms SMT Verify possible using 20 Read/Feed constraints in natural domain returned unsat :0 sat :7
[2023-04-07 05:24:49] [INFO ] After 59ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 23 ms.
[2023-04-07 05:24:49] [INFO ] After 148ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Parikh walk visited 0 properties in 39 ms.
Support contains 21 out of 52 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 52/52 places, 53/53 transitions.
Applied a total of 0 rules in 3 ms. Remains 52 /52 variables (removed 0) and now considering 53/53 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3 ms. Remains : 52/52 places, 53/53 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 52/52 places, 53/53 transitions.
Applied a total of 0 rules in 4 ms. Remains 52 /52 variables (removed 0) and now considering 53/53 (removed 0) transitions.
[2023-04-07 05:24:49] [INFO ] Invariant cache hit.
[2023-04-07 05:24:49] [INFO ] Implicit Places using invariants in 24 ms returned []
[2023-04-07 05:24:49] [INFO ] Invariant cache hit.
[2023-04-07 05:24:49] [INFO ] State equation strengthened by 20 read => feed constraints.
[2023-04-07 05:24:49] [INFO ] Implicit Places using invariants and state equation in 46 ms returned []
Implicit Place search using SMT with State Equation took 72 ms to find 0 implicit places.
[2023-04-07 05:24:49] [INFO ] Redundant transitions in 2 ms returned []
[2023-04-07 05:24:49] [INFO ] Invariant cache hit.
[2023-04-07 05:24:49] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 120 ms. Remains : 52/52 places, 53/53 transitions.
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 52 transition count 46
Reduce places removed 7 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 9 rules applied. Total rules applied 16 place count 45 transition count 44
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 18 place count 43 transition count 44
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 18 place count 43 transition count 43
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 20 place count 42 transition count 43
Free-agglomeration rule applied 7 times.
Iterating global reduction 3 with 7 rules applied. Total rules applied 27 place count 42 transition count 36
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 3 with 7 rules applied. Total rules applied 34 place count 35 transition count 36
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 4 with 3 rules applied. Total rules applied 37 place count 35 transition count 33
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 4 with 3 rules applied. Total rules applied 40 place count 32 transition count 33
Applied a total of 40 rules in 7 ms. Remains 32 /52 variables (removed 20) and now considering 33/53 (removed 20) transitions.
Running SMT prover for 7 properties.
// Phase 1: matrix 33 rows 32 cols
[2023-04-07 05:24:49] [INFO ] Computed 0 invariants in 0 ms
[2023-04-07 05:24:49] [INFO ] After 48ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-04-07 05:24:49] [INFO ] After 18ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-04-07 05:24:49] [INFO ] After 36ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 13 ms.
[2023-04-07 05:24:49] [INFO ] After 78ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 7 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 9 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Computed a total of 40 stabilizing places and 41 stable transitions
Graph (complete) has 162 edges and 62 vertex of which 22 are kept as prefixes of interest. Removing 40 places using SCC suffix rule.1 ms
Starting structural reductions in SI_CTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Graph (trivial) has 21 edges and 62 vertex of which 21 / 62 are part of one of the 1 SCC in 2 ms
Free SCC test removed 20 places
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Applied a total of 1 rules in 4 ms. Remains 42 /62 variables (removed 20) and now considering 43/63 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 42/62 places, 43/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 4 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 4 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 3 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 5 ms
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:49] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:49] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 3 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Graph (trivial) has 37 edges and 62 vertex of which 21 / 62 are part of one of the 1 SCC in 0 ms
Free SCC test removed 20 places
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Applied a total of 1 rules in 3 ms. Remains 42 /62 variables (removed 20) and now considering 43/63 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 42/62 places, 43/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 0 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 0 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 62/62 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 62 /62 variables (removed 0) and now considering 63/63 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 62/62 places, 63/63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 3 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 2 ms
[2023-04-07 05:24:50] [INFO ] Input system was already deterministic with 63 transitions.
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 6 ms
[2023-04-07 05:24:50] [INFO ] Flatten gal took : 6 ms
[2023-04-07 05:24:50] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-04-07 05:24:50] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 62 places, 63 transitions and 186 arcs took 1 ms.
Total runtime 6944 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CryptoMiner-PT-D20N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability

FORMULA CryptoMiner-PT-D20N100-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA CryptoMiner-PT-D20N100-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1680845371872

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 10 (type EXCL) for 9 CryptoMiner-PT-D20N100-CTLFireability-03
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:738
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CryptoMiner-PT-D20N100-CTLFireability-00: AFAG 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-06: EG 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/225 8/32 CryptoMiner-PT-D20N100-CTLFireability-03 1540945 m, 308189 m/sec, 5709475 t fired, .

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CryptoMiner-PT-D20N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-06: EG 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/225 14/32 CryptoMiner-PT-D20N100-CTLFireability-03 2696705 m, 231152 m/sec, 10333988 t fired, .

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CryptoMiner-PT-D20N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-06: EG 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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CryptoMiner-PT-D20N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 25/3360 24/32 CryptoMiner-PT-D20N100-CTLFireability-12 4623933 m, 159658 m/sec, 27460331 t fired, .

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CryptoMiner-PT-D20N100-CTLFireability-00: AFAG false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-02: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-06: EG true state space / EG
CryptoMiner-PT-D20N100-CTLFireability-08: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-09: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-10: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-11: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-14: CTL false CTL model checker

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CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 30/3360 28/32 CryptoMiner-PT-D20N100-CTLFireability-12 5420382 m, 159289 m/sec, 32407527 t fired, .

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CryptoMiner-PT-D20N100-CTLFireability-06: EG true state space / EG
CryptoMiner-PT-D20N100-CTLFireability-08: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-09: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-10: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-11: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-14: CTL false CTL model checker

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CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 35/3360 32/32 CryptoMiner-PT-D20N100-CTLFireability-12 6193635 m, 154650 m/sec, 37241748 t fired, .

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CryptoMiner-PT-D20N100-CTLFireability-00: AFAG false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-02: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-06: EG true state space / EG
CryptoMiner-PT-D20N100-CTLFireability-08: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-09: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-10: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-11: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-14: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CryptoMiner-PT-D20N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-05: EU 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D20N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CryptoMiner-PT-D20N100-CTLFireability-00: AFAG false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-01: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-02: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-03: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-04: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-05: EU unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-06: EG true state space / EG
CryptoMiner-PT-D20N100-CTLFireability-07: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-08: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-09: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-10: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-11: CTL true CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-12: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-13: CTL unknown AGGR
CryptoMiner-PT-D20N100-CTLFireability-14: CTL false CTL model checker
CryptoMiner-PT-D20N100-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CryptoMiner-PT-D20N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CryptoMiner-PT-D20N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987245000210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CryptoMiner-PT-D20N100.tgz
mv CryptoMiner-PT-D20N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;