About the Execution of LoLa+red for CryptoMiner-PT-D05N100
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5606.271 | 248284.00 | 236225.00 | 1098.60 | ?????F?FF??F?FT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r519-tall-167987244900178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is CryptoMiner-PT-D05N100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987244900178
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 708K
-rw-r--r-- 1 mcc users 11K Mar 23 15:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Mar 23 15:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K Mar 23 15:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Mar 23 15:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.7K Mar 23 07:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Mar 23 07:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Mar 23 07:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 23 07:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 38K Mar 23 15:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 277K Mar 23 15:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Mar 23 15:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Mar 23 15:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.3K Mar 23 07:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Mar 23 07:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 7.8K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-00
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-01
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-02
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-03
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-04
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-05
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-06
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-07
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-08
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-09
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-10
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-11
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-12
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-13
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-14
FORMULA_NAME CryptoMiner-PT-D05N100-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1680843365220
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=CryptoMiner-PT-D05N100
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 04:56:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 04:56:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 04:56:06] [INFO ] Load time of PNML (sax parser for PT used): 20 ms
[2023-04-07 04:56:06] [INFO ] Transformed 18 places.
[2023-04-07 04:56:06] [INFO ] Transformed 18 transitions.
[2023-04-07 04:56:06] [INFO ] Parsed PT model containing 18 places and 18 transitions and 52 arcs in 74 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 17 out of 18 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 18/18 places, 18/18 transitions.
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 17 transition count 18
Applied a total of 1 rules in 8 ms. Remains 17 /18 variables (removed 1) and now considering 18/18 (removed 0) transitions.
// Phase 1: matrix 18 rows 17 cols
[2023-04-07 04:56:06] [INFO ] Computed 0 invariants in 5 ms
[2023-04-07 04:56:07] [INFO ] Implicit Places using invariants in 265 ms returned []
[2023-04-07 04:56:07] [INFO ] Invariant cache hit.
[2023-04-07 04:56:07] [INFO ] State equation strengthened by 5 read => feed constraints.
[2023-04-07 04:56:07] [INFO ] Implicit Places using invariants and state equation in 56 ms returned []
Implicit Place search using SMT with State Equation took 345 ms to find 0 implicit places.
[2023-04-07 04:56:07] [INFO ] Invariant cache hit.
[2023-04-07 04:56:07] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 17/18 places, 18/18 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 383 ms. Remains : 17/18 places, 18/18 transitions.
Support contains 17 out of 17 places after structural reductions.
[2023-04-07 04:56:07] [INFO ] Flatten gal took : 13 ms
[2023-04-07 04:56:07] [INFO ] Flatten gal took : 4 ms
[2023-04-07 04:56:07] [INFO ] Input system was already deterministic with 18 transitions.
Incomplete random walk after 10047 steps, including 6 resets, run finished after 49 ms. (steps per millisecond=205 ) properties (out of 33) seen :22
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 243 ms. (steps per millisecond=41 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 11) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 39 ms. (steps per millisecond=256 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2023-04-07 04:56:08] [INFO ] Invariant cache hit.
[2023-04-07 04:56:08] [INFO ] After 76ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:8
[2023-04-07 04:56:08] [INFO ] After 24ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :5
[2023-04-07 04:56:08] [INFO ] State equation strengthened by 5 read => feed constraints.
[2023-04-07 04:56:08] [INFO ] After 19ms SMT Verify possible using 5 Read/Feed constraints in natural domain returned unsat :4 sat :5
[2023-04-07 04:56:08] [INFO ] After 45ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :5
Attempting to minimize the solution found.
Minimization took 21 ms.
[2023-04-07 04:56:08] [INFO ] After 152ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :5
Fused 9 Parikh solutions to 5 different solutions.
Parikh walk visited 0 properties in 64 ms.
Support contains 17 out of 17 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 10 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10 ms. Remains : 17/17 places, 18/18 transitions.
Incomplete random walk after 10019 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=3339 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=416 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 5) seen :0
Interrupted probabilistic random walk after 600245 steps, run timeout after 3001 ms. (steps per millisecond=200 ) properties seen :{}
Probabilistic random walk after 600245 steps, saw 252002 distinct states, run finished after 3004 ms. (steps per millisecond=199 ) properties seen :0
Running SMT prover for 5 properties.
[2023-04-07 04:56:11] [INFO ] Invariant cache hit.
[2023-04-07 04:56:11] [INFO ] After 8ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:3
[2023-04-07 04:56:11] [INFO ] State equation strengthened by 5 read => feed constraints.
[2023-04-07 04:56:11] [INFO ] After 3ms SMT Verify possible using 5 Read/Feed constraints in real domain returned unsat :0 sat :1 real:4
[2023-04-07 04:56:11] [INFO ] After 6ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :1 real:4
Attempting to minimize the solution found.
Minimization took 2 ms.
[2023-04-07 04:56:11] [INFO ] After 46ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :1 real:4
[2023-04-07 04:56:11] [INFO ] After 17ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-04-07 04:56:11] [INFO ] After 13ms SMT Verify possible using 5 Read/Feed constraints in natural domain returned unsat :0 sat :5
[2023-04-07 04:56:11] [INFO ] After 40ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 13 ms.
[2023-04-07 04:56:11] [INFO ] After 107ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Parikh walk visited 0 properties in 48 ms.
Support contains 17 out of 17 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 10 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 10 ms. Remains : 17/17 places, 18/18 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
[2023-04-07 04:56:11] [INFO ] Invariant cache hit.
[2023-04-07 04:56:11] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-04-07 04:56:11] [INFO ] Invariant cache hit.
[2023-04-07 04:56:11] [INFO ] State equation strengthened by 5 read => feed constraints.
[2023-04-07 04:56:11] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 65 ms to find 0 implicit places.
[2023-04-07 04:56:11] [INFO ] Redundant transitions in 1 ms returned []
[2023-04-07 04:56:11] [INFO ] Invariant cache hit.
[2023-04-07 04:56:11] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 112 ms. Remains : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Running SMT prover for 5 properties.
[2023-04-07 04:56:11] [INFO ] Invariant cache hit.
[2023-04-07 04:56:11] [INFO ] After 7ms SMT Verify possible using state equation in real domain returned unsat :0 sat :2 real:3
[2023-04-07 04:56:11] [INFO ] After 14ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :2 real:3
Attempting to minimize the solution found.
Minimization took 4 ms.
[2023-04-07 04:56:11] [INFO ] After 50ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :2 real:3
[2023-04-07 04:56:11] [INFO ] After 23ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :5
[2023-04-07 04:56:11] [INFO ] After 40ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :5
Attempting to minimize the solution found.
Minimization took 11 ms.
[2023-04-07 04:56:11] [INFO ] After 78ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :5
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
[2023-04-07 04:56:11] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-04-07 04:56:11] [INFO ] Flatten gal took : 3 ms
FORMULA CryptoMiner-PT-D05N100-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CryptoMiner-PT-D05N100-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-07 04:56:11] [INFO ] Flatten gal took : 4 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Computed a total of 10 stabilizing places and 11 stable transitions
Graph (complete) has 42 edges and 17 vertex of which 7 are kept as prefixes of interest. Removing 10 places using SCC suffix rule.1 ms
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Graph (trivial) has 10 edges and 17 vertex of which 6 / 17 are part of one of the 1 SCC in 2 ms
Free SCC test removed 5 places
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Applied a total of 1 rules in 3 ms. Remains 12 /17 variables (removed 5) and now considering 13/18 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 12/17 places, 13/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 13 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 0 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 17/17 places, 18/18 transitions.
Applied a total of 0 rules in 1 ms. Remains 17 /17 variables (removed 0) and now considering 18/18 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 17/17 places, 18/18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 1 ms
[2023-04-07 04:56:12] [INFO ] Input system was already deterministic with 18 transitions.
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Flatten gal took : 2 ms
[2023-04-07 04:56:12] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-04-07 04:56:12] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 17 places, 18 transitions and 51 arcs took 1 ms.
Total runtime 5517 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT CryptoMiner-PT-D05N100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA CryptoMiner-PT-D05N100-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CryptoMiner-PT-D05N100-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CryptoMiner-PT-D05N100-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CryptoMiner-PT-D05N100-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1680843613504
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 1 (type EXCL) for 0 CryptoMiner-PT-D05N100-CTLFireability-00
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CryptoMiner-PT-D05N100-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-05: EFAG 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/240 7/32 CryptoMiner-PT-D05N100-CTLFireability-00 1627273 m, 325454 m/sec, 10025754 t fired, .
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CryptoMiner-PT-D05N100-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/240 14/32 CryptoMiner-PT-D05N100-CTLFireability-00 3050618 m, 284669 m/sec, 18931529 t fired, .
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CryptoMiner-PT-D05N100-CTLFireability-05: EFAG 0 1 0 0 1 0 0 0
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CryptoMiner-PT-D05N100-CTLFireability-05: EFAG 0 1 0 0 1 0 0 0
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CryptoMiner-PT-D05N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 5/3380 12/32 CryptoMiner-PT-D05N100-CTLFireability-04 2667540 m, 533508 m/sec, 8526061 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CryptoMiner-PT-D05N100-CTLFireability-05: EFAG false tscc_search
CryptoMiner-PT-D05N100-CTLFireability-08: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-11: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CryptoMiner-PT-D05N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
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CryptoMiner-PT-D05N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 10/3380 21/32 CryptoMiner-PT-D05N100-CTLFireability-04 4758553 m, 418202 m/sec, 15386228 t fired, .
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CryptoMiner-PT-D05N100-CTLFireability-05: EFAG false tscc_search
CryptoMiner-PT-D05N100-CTLFireability-08: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-11: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CryptoMiner-PT-D05N100-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-04: DISJ 0 0 1 0 3 0 0 0
CryptoMiner-PT-D05N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
15 CTL EXCL 15/3380 29/32 CryptoMiner-PT-D05N100-CTLFireability-04 6722390 m, 392767 m/sec, 21869509 t fired, .
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CryptoMiner-PT-D05N100-CTLFireability-05: EFAG false tscc_search
CryptoMiner-PT-D05N100-CTLFireability-08: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-11: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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CryptoMiner-PT-D05N100-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-04: DISJ 0 0 0 0 3 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
CryptoMiner-PT-D05N100-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CryptoMiner-PT-D05N100-CTLFireability-00: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-01: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-02: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-03: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-04: DISJ unknown DISJ
CryptoMiner-PT-D05N100-CTLFireability-05: EFAG false tscc_search
CryptoMiner-PT-D05N100-CTLFireability-06: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-08: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-09: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-10: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-11: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-12: CTL unknown AGGR
CryptoMiner-PT-D05N100-CTLFireability-13: CTL false CTL model checker
CryptoMiner-PT-D05N100-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CryptoMiner-PT-D05N100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is CryptoMiner-PT-D05N100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987244900178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CryptoMiner-PT-D05N100.tgz
mv CryptoMiner-PT-D05N100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;