About the Execution of LoLa+red for Anderson-PT-04
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 326.663 | 6149.00 | 12820.00 | 244.50 | TTFFFFTTTTTTTFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r519-tall-167987244700002.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Anderson-PT-04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r519-tall-167987244700002
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 6.4K Mar 23 15:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Mar 23 15:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Mar 23 15:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 44K Mar 23 15:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 23 07:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 23 07:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 21K Mar 23 07:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 7.6K Mar 23 15:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 70K Mar 23 15:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 15:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32K Mar 23 15:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 07:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 103K Mar 31 16:48 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Anderson-PT-04-CTLFireability-00
FORMULA_NAME Anderson-PT-04-CTLFireability-01
FORMULA_NAME Anderson-PT-04-CTLFireability-02
FORMULA_NAME Anderson-PT-04-CTLFireability-03
FORMULA_NAME Anderson-PT-04-CTLFireability-04
FORMULA_NAME Anderson-PT-04-CTLFireability-05
FORMULA_NAME Anderson-PT-04-CTLFireability-06
FORMULA_NAME Anderson-PT-04-CTLFireability-07
FORMULA_NAME Anderson-PT-04-CTLFireability-08
FORMULA_NAME Anderson-PT-04-CTLFireability-09
FORMULA_NAME Anderson-PT-04-CTLFireability-10
FORMULA_NAME Anderson-PT-04-CTLFireability-11
FORMULA_NAME Anderson-PT-04-CTLFireability-12
FORMULA_NAME Anderson-PT-04-CTLFireability-13
FORMULA_NAME Anderson-PT-04-CTLFireability-14
FORMULA_NAME Anderson-PT-04-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1680827067873
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Anderson-PT-04
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2023-04-07 00:24:29] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-04-07 00:24:29] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-04-07 00:24:29] [INFO ] Load time of PNML (sax parser for PT used): 54 ms
[2023-04-07 00:24:29] [INFO ] Transformed 105 places.
[2023-04-07 00:24:29] [INFO ] Transformed 200 transitions.
[2023-04-07 00:24:29] [INFO ] Found NUPN structural information;
[2023-04-07 00:24:29] [INFO ] Parsed PT model containing 105 places and 200 transitions and 752 arcs in 117 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 56 out of 105 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 105/105 places, 200/200 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 99 transition count 194
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 99 transition count 194
Applied a total of 12 rules in 17 ms. Remains 99 /105 variables (removed 6) and now considering 194/200 (removed 6) transitions.
// Phase 1: matrix 194 rows 99 cols
[2023-04-07 00:24:29] [INFO ] Computed 11 invariants in 17 ms
[2023-04-07 00:24:29] [INFO ] Implicit Places using invariants in 315 ms returned []
[2023-04-07 00:24:29] [INFO ] Invariant cache hit.
[2023-04-07 00:24:30] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-04-07 00:24:30] [INFO ] Implicit Places using invariants and state equation in 132 ms returned []
Implicit Place search using SMT with State Equation took 472 ms to find 0 implicit places.
[2023-04-07 00:24:30] [INFO ] Invariant cache hit.
[2023-04-07 00:24:30] [INFO ] Dead Transitions using invariants and state equation in 122 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 99/105 places, 194/200 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 613 ms. Remains : 99/105 places, 194/200 transitions.
Support contains 56 out of 99 places after structural reductions.
[2023-04-07 00:24:30] [INFO ] Flatten gal took : 41 ms
[2023-04-07 00:24:30] [INFO ] Flatten gal took : 24 ms
[2023-04-07 00:24:30] [INFO ] Input system was already deterministic with 194 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 338 ms. (steps per millisecond=29 ) properties (out of 71) seen :50
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 21) seen :4
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 17) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 16) seen :5
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 11) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 11) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 10) seen :3
Running SMT prover for 7 properties.
[2023-04-07 00:24:30] [INFO ] Invariant cache hit.
[2023-04-07 00:24:31] [INFO ] After 69ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-04-07 00:24:31] [INFO ] [Nat]Absence check using 5 positive place invariants in 3 ms returned sat
[2023-04-07 00:24:31] [INFO ] [Nat]Absence check using 5 positive and 6 generalized place invariants in 19 ms returned sat
[2023-04-07 00:24:31] [INFO ] After 121ms SMT Verify possible using state equation in natural domain returned unsat :3 sat :4
[2023-04-07 00:24:31] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-04-07 00:24:31] [INFO ] After 47ms SMT Verify possible using 12 Read/Feed constraints in natural domain returned unsat :3 sat :4
[2023-04-07 00:24:31] [INFO ] After 118ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :4
Attempting to minimize the solution found.
Minimization took 46 ms.
[2023-04-07 00:24:31] [INFO ] After 366ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :4
Fused 7 Parikh solutions to 4 different solutions.
Parikh walk visited 0 properties in 7 ms.
Support contains 5 out of 99 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 99/99 places, 194/194 transitions.
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 11 Pre rules applied. Total rules applied 0 place count 99 transition count 183
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 0 with 22 rules applied. Total rules applied 22 place count 88 transition count 183
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 36 place count 74 transition count 115
Iterating global reduction 0 with 14 rules applied. Total rules applied 50 place count 74 transition count 115
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 52 place count 73 transition count 114
Applied a total of 52 rules in 19 ms. Remains 73 /99 variables (removed 26) and now considering 114/194 (removed 80) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 19 ms. Remains : 73/99 places, 114/194 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 58 ms. (steps per millisecond=172 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 2) seen :1
Finished Best-First random walk after 3174 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=1058 )
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
FORMULA Anderson-PT-04-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 13 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 16 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 194 transitions.
Support contains 51 out of 99 places (down from 54) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 12 Pre rules applied. Total rules applied 0 place count 99 transition count 182
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 0 with 24 rules applied. Total rules applied 24 place count 87 transition count 182
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 40 place count 71 transition count 106
Iterating global reduction 0 with 16 rules applied. Total rules applied 56 place count 71 transition count 106
Applied a total of 56 rules in 11 ms. Remains 71 /99 variables (removed 28) and now considering 106/194 (removed 88) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 71/99 places, 106/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 84 transition count 113
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 84 transition count 113
Applied a total of 30 rules in 4 ms. Remains 84 /99 variables (removed 15) and now considering 113/194 (removed 81) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 84/99 places, 113/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 113 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 84 transition count 125
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 84 transition count 125
Applied a total of 30 rules in 5 ms. Remains 84 /99 variables (removed 15) and now considering 125/194 (removed 69) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 84/99 places, 125/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 125 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 85 transition count 132
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 85 transition count 132
Applied a total of 28 rules in 4 ms. Remains 85 /99 variables (removed 14) and now considering 132/194 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 85/99 places, 132/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 82 transition count 111
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 82 transition count 111
Applied a total of 34 rules in 4 ms. Remains 82 /99 variables (removed 17) and now considering 111/194 (removed 83) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 82/99 places, 111/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 111 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 83 transition count 118
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 83 transition count 118
Applied a total of 32 rules in 5 ms. Remains 83 /99 variables (removed 16) and now considering 118/194 (removed 76) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 83/99 places, 118/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 15 places :
Symmetric choice reduction at 0 with 15 rule applications. Total rules 15 place count 84 transition count 125
Iterating global reduction 0 with 15 rules applied. Total rules applied 30 place count 84 transition count 125
Applied a total of 30 rules in 4 ms. Remains 84 /99 variables (removed 15) and now considering 125/194 (removed 69) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 84/99 places, 125/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 125 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 85 transition count 120
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 85 transition count 120
Applied a total of 28 rules in 3 ms. Remains 85 /99 variables (removed 14) and now considering 120/194 (removed 74) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 85/99 places, 120/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 120 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 83 transition count 118
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 83 transition count 118
Applied a total of 32 rules in 3 ms. Remains 83 /99 variables (removed 16) and now considering 118/194 (removed 76) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 83/99 places, 118/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 82 transition count 111
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 82 transition count 111
Applied a total of 34 rules in 2 ms. Remains 82 /99 variables (removed 17) and now considering 111/194 (removed 83) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 82/99 places, 111/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 5 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 111 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 90 transition count 155
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 90 transition count 155
Applied a total of 18 rules in 2 ms. Remains 90 /99 variables (removed 9) and now considering 155/194 (removed 39) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 90/99 places, 155/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 8 ms
[2023-04-07 00:24:31] [INFO ] Input system was already deterministic with 155 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 85 transition count 132
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 85 transition count 132
Applied a total of 28 rules in 2 ms. Remains 85 /99 variables (removed 14) and now considering 132/194 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 85/99 places, 132/194 transitions.
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:31] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:32] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 12 Pre rules applied. Total rules applied 0 place count 99 transition count 182
Deduced a syphon composed of 12 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 0 with 24 rules applied. Total rules applied 24 place count 87 transition count 182
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 40 place count 71 transition count 106
Iterating global reduction 0 with 16 rules applied. Total rules applied 56 place count 71 transition count 106
Applied a total of 56 rules in 8 ms. Remains 71 /99 variables (removed 28) and now considering 106/194 (removed 88) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 71/99 places, 106/194 transitions.
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 5 ms
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 5 ms
[2023-04-07 00:24:32] [INFO ] Input system was already deterministic with 106 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 85 transition count 132
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 85 transition count 132
Applied a total of 28 rules in 2 ms. Remains 85 /99 variables (removed 14) and now considering 132/194 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 85/99 places, 132/194 transitions.
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 6 ms
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 5 ms
[2023-04-07 00:24:32] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 99/99 places, 194/194 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 85 transition count 132
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 85 transition count 132
Applied a total of 28 rules in 2 ms. Remains 85 /99 variables (removed 14) and now considering 132/194 (removed 62) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 85/99 places, 132/194 transitions.
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 5 ms
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 7 ms
[2023-04-07 00:24:32] [INFO ] Input system was already deterministic with 132 transitions.
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 8 ms
[2023-04-07 00:24:32] [INFO ] Flatten gal took : 8 ms
[2023-04-07 00:24:32] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-04-07 00:24:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 99 places, 194 transitions and 740 arcs took 1 ms.
Total runtime 2707 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Anderson-PT-04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability
FORMULA Anderson-PT-04-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Anderson-PT-04-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1680827074022
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 7 (type EXCL) for 6 Anderson-PT-04-CTLFireability-03
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for Anderson-PT-04-CTLFireability-03
lola: result : false
lola: markings : 2300
lola: fired transitions : 2771
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 22 (type EXCL) for 21 Anderson-PT-04-CTLFireability-08
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 22 (type EXCL) for Anderson-PT-04-CTLFireability-08
lola: result : true
lola: markings : 67
lola: fired transitions : 322
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 Anderson-PT-04-CTLFireability-06
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for Anderson-PT-04-CTLFireability-06
lola: result : true
lola: markings : 29
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 Anderson-PT-04-CTLFireability-13
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 37 (type EXCL) for Anderson-PT-04-CTLFireability-13
lola: result : false
lola: markings : 9274
lola: fired transitions : 49584
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 Anderson-PT-04-CTLFireability-11
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 31 (type EXCL) for Anderson-PT-04-CTLFireability-11
lola: result : true
lola: markings : 15029
lola: fired transitions : 69628
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 Anderson-PT-04-CTLFireability-15
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for Anderson-PT-04-CTLFireability-15
lola: result : true
lola: markings : 2299
lola: fired transitions : 6689
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 Anderson-PT-04-CTLFireability-14
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for Anderson-PT-04-CTLFireability-14
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 Anderson-PT-04-CTLFireability-12
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for Anderson-PT-04-CTLFireability-12
lola: result : true
lola: markings : 24568
lola: fired transitions : 156983
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 Anderson-PT-04-CTLFireability-10
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for Anderson-PT-04-CTLFireability-10
lola: result : true
lola: markings : 24568
lola: fired transitions : 125191
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 Anderson-PT-04-CTLFireability-09
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for Anderson-PT-04-CTLFireability-09
lola: result : true
lola: markings : 24568
lola: fired transitions : 154783
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 Anderson-PT-04-CTLFireability-05
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for Anderson-PT-04-CTLFireability-05
lola: result : false
lola: markings : 35
lola: fired transitions : 70
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 Anderson-PT-04-CTLFireability-04
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Anderson-PT-04-CTLFireability-04
lola: result : false
lola: markings : 43
lola: fired transitions : 89
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 Anderson-PT-04-CTLFireability-02
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for Anderson-PT-04-CTLFireability-02
lola: result : false
lola: markings : 14857
lola: fired transitions : 54423
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Anderson-PT-04-CTLFireability-01
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Anderson-PT-04-CTLFireability-01
lola: result : true
lola: markings : 57
lola: fired transitions : 169
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 Anderson-PT-04-CTLFireability-07
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for Anderson-PT-04-CTLFireability-07
lola: result : true
lola: markings : 36
lola: fired transitions : 211
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-04-CTLFireability-01: CTL true CTL model checker
Anderson-PT-04-CTLFireability-02: CTL false CTL model checker
Anderson-PT-04-CTLFireability-03: CTL false CTL model checker
Anderson-PT-04-CTLFireability-04: CTL false CTL model checker
Anderson-PT-04-CTLFireability-05: CTL false CTL model checker
Anderson-PT-04-CTLFireability-06: CTL true CTL model checker
Anderson-PT-04-CTLFireability-07: CTL true CTL model checker
Anderson-PT-04-CTLFireability-08: CTL true CTL model checker
Anderson-PT-04-CTLFireability-09: CTL true CTL model checker
Anderson-PT-04-CTLFireability-10: CTL true CTL model checker
Anderson-PT-04-CTLFireability-11: CTL true CTL model checker
Anderson-PT-04-CTLFireability-12: CTL true CTL model checker
Anderson-PT-04-CTLFireability-13: CTL false CTL model checker
Anderson-PT-04-CTLFireability-14: CTL false CTL model checker
Anderson-PT-04-CTLFireability-15: CTL true CTL model checker
Time elapsed: 0 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Anderson-PT-04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Anderson-PT-04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r519-tall-167987244700002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Anderson-PT-04.tgz
mv Anderson-PT-04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;