fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r518-tall-167987244100066
Last Updated
May 14, 2023

About the Execution of LoLA for Anderson-PT-12

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5476.008 376056.00 524412.00 892.40 ?TF?F??FF??FF?FT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r518-tall-167987244100066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Anderson-PT-12, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r518-tall-167987244100066
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.4M
-rw-r--r-- 1 mcc users 8.2K Mar 23 15:19 CTLCardinality.txt
-rw-r--r-- 1 mcc users 84K Mar 23 15:19 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Mar 23 15:18 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Mar 23 15:18 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Mar 23 07:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Mar 23 07:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 23 07:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 23 07:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 26 22:42 NewModel
-rw-r--r-- 1 mcc users 14K Mar 23 15:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 145K Mar 23 15:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Mar 23 15:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Mar 23 15:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 23 07:06 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 23 07:06 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 26 22:42 instance
-rw-r--r-- 1 mcc users 6 Mar 26 22:42 iscolored
-rw-r--r-- 1 mcc users 1.9M Mar 26 22:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Anderson-PT-12-CTLFireability-00
FORMULA_NAME Anderson-PT-12-CTLFireability-01
FORMULA_NAME Anderson-PT-12-CTLFireability-02
FORMULA_NAME Anderson-PT-12-CTLFireability-03
FORMULA_NAME Anderson-PT-12-CTLFireability-04
FORMULA_NAME Anderson-PT-12-CTLFireability-05
FORMULA_NAME Anderson-PT-12-CTLFireability-06
FORMULA_NAME Anderson-PT-12-CTLFireability-07
FORMULA_NAME Anderson-PT-12-CTLFireability-08
FORMULA_NAME Anderson-PT-12-CTLFireability-09
FORMULA_NAME Anderson-PT-12-CTLFireability-10
FORMULA_NAME Anderson-PT-12-CTLFireability-11
FORMULA_NAME Anderson-PT-12-CTLFireability-12
FORMULA_NAME Anderson-PT-12-CTLFireability-13
FORMULA_NAME Anderson-PT-12-CTLFireability-14
FORMULA_NAME Anderson-PT-12-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679885645764

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Anderson-PT-12
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Anderson-PT-12
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA Anderson-PT-12-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Anderson-PT-12-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679886021820

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 64 (type SKEL/SRCH) for 3 Anderson-PT-12-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 65 (type SKEL/SRCH) for 9 Anderson-PT-12-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/SRCH) for Anderson-PT-12-CTLFireability-03
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 64 (type SKEL/SRCH) for Anderson-PT-12-CTLFireability-01
lola: result : true
lola: markings : 6521
lola: fired transitions : 8278
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 66 (type SKEL/SRCH) for 25 Anderson-PT-12-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 66 (type SKEL/SRCH) for Anderson-PT-12-CTLFireability-07
lola: result : false
lola: markings : 9287
lola: fired transitions : 11479
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 69 (type SKEL/FNDP) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SKEL/EQUN) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 71 (type SKEL/SRCH) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/CTLFireability-70.sara.
lola: FINISHED task # 72 (type SKEL/SRCH) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
lola: markings : 1535
lola: fired transitions : 2966
lola: time used : 1.000000
lola: memory pages used : 1
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-01: EGEF 1 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 0 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 0 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 4/3588 0/5 Anderson-PT-12-CTLFireability-12 119199 t fired, 1 attempts, .
70 EF STEQ 4/3588 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 4/3588 1/5 Anderson-PT-12-CTLFireability-12 23063 m, 4612 m/sec, 25737 t fired, .

Time elapsed: 16 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 Anderson-PT-12-CTLFireability-01
lola: time limit : 188 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 4 (type EXCL) for Anderson-PT-12-CTLFireability-01
lola: result : true
lola: markings : 10740
lola: fired transitions : 11203
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 62 (type EXCL) for 61 Anderson-PT-12-CTLFireability-15
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 62 (type EXCL) for Anderson-PT-12-CTLFireability-15
lola: result : true
lola: markings : 1415
lola: fired transitions : 1426
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 59 (type EXCL) for 58 Anderson-PT-12-CTLFireability-14
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for Anderson-PT-12-CTLFireability-14
lola: result : false
lola: markings : 7128
lola: fired transitions : 7592
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 Anderson-PT-12-CTLFireability-13
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 4/223 3/32 Anderson-PT-12-CTLFireability-13 226653 m, 45330 m/sec, 320918 t fired, .
69 EF FNDP 9/1787 0/5 Anderson-PT-12-CTLFireability-12 391029 t fired, 1 attempts, .
70 EF STEQ 9/1787 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 9/1787 1/5 Anderson-PT-12-CTLFireability-12 151060 m, 25599 m/sec, 181323 t fired, .

Time elapsed: 21 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 9/223 6/32 Anderson-PT-12-CTLFireability-13 618794 m, 78428 m/sec, 879925 t fired, .
69 EF FNDP 14/1785 0/5 Anderson-PT-12-CTLFireability-12 701795 t fired, 1 attempts, .
70 EF STEQ 14/1785 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 14/1785 1/5 Anderson-PT-12-CTLFireability-12 348043 m, 39396 m/sec, 430824 t fired, .

Time elapsed: 26 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 14/223 9/32 Anderson-PT-12-CTLFireability-13 998464 m, 75934 m/sec, 1421145 t fired, .
69 EF FNDP 19/1780 0/5 Anderson-PT-12-CTLFireability-12 1017535 t fired, 2 attempts, .
70 EF STEQ 19/1780 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 19/1780 1/5 Anderson-PT-12-CTLFireability-12 540337 m, 38458 m/sec, 682987 t fired, .

Time elapsed: 31 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 19/223 12/32 Anderson-PT-12-CTLFireability-13 1365219 m, 73351 m/sec, 2008273 t fired, .
69 EF FNDP 24/1775 0/5 Anderson-PT-12-CTLFireability-12 1335113 t fired, 2 attempts, .
70 EF STEQ 24/1775 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 24/1775 1/5 Anderson-PT-12-CTLFireability-12 731357 m, 38204 m/sec, 940592 t fired, .

Time elapsed: 36 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 24/223 15/32 Anderson-PT-12-CTLFireability-13 1734655 m, 73887 m/sec, 2555764 t fired, .
69 EF FNDP 29/1770 0/5 Anderson-PT-12-CTLFireability-12 1652699 t fired, 2 attempts, .
70 EF STEQ 29/1770 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 29/1770 1/5 Anderson-PT-12-CTLFireability-12 922046 m, 38137 m/sec, 1202148 t fired, .

Time elapsed: 41 secs. Pages in use: 16
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 29/223 18/32 Anderson-PT-12-CTLFireability-13 2104750 m, 74019 m/sec, 3092662 t fired, .
69 EF FNDP 34/1765 0/5 Anderson-PT-12-CTLFireability-12 1970612 t fired, 2 attempts, .
70 EF STEQ 34/1765 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 34/1765 1/5 Anderson-PT-12-CTLFireability-12 1111359 m, 37862 m/sec, 1468420 t fired, .

Time elapsed: 46 secs. Pages in use: 19
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 5 3 0 2 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 34/223 21/32 Anderson-PT-12-CTLFireability-13 2470345 m, 73119 m/sec, 3618050 t fired, .
69 EF FNDP 39/1760 0/5 Anderson-PT-12-CTLFireability-12 2290370 t fired, 3 attempts, .
70 EF STEQ 39/1760 0/5 Anderson-PT-12-CTLFireability-12 sara is running.
71 EF SRCH 39/1760 1/5 Anderson-PT-12-CTLFireability-12 1300807 m, 37889 m/sec, 1741861 t fired, .

Time elapsed: 51 secs. Pages in use: 22
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 71 (type SKEL/SRCH) for Anderson-PT-12-CTLFireability-12
lola: result : true
lola: markings : 1368732
lola: fired transitions : 1842041
lola: time used : 41.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for Anderson-PT-12-CTLFireability-12 (obsolete)
lola: CANCELED task # 70 (type EQUN) for Anderson-PT-12-CTLFireability-12 (obsolete)
lola: LAUNCH task # 74 (type FNDP) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SRCH) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 69 (type SKEL/FNDP) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
lola: fired transitions : 2405985
lola: tried executions : 4
lola: time used : 41.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 77 (type SRCH) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 70 (type SKEL/EQUN) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
sara: try reading problem file /home/mcc/execution/CTLFireability-75.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 2 2 0 6 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 39/223 24/32 Anderson-PT-12-CTLFireability-13 2823585 m, 70648 m/sec, 4129104 t fired, .
74 EF FNDP 3/3547 0/5 Anderson-PT-12-CTLFireability-12 11893 t fired, 1 attempts, .
75 EF STEQ 3/3547 0/5 Anderson-PT-12-CTLFireability-12 sara is running.

Time elapsed: 56 secs. Pages in use: 24
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 2 2 0 6 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 44/223 27/32 Anderson-PT-12-CTLFireability-13 3184283 m, 72139 m/sec, 4652366 t fired, .
74 EF FNDP 8/3547 0/5 Anderson-PT-12-CTLFireability-12 31175 t fired, 1 attempts, .
75 EF STEQ 8/3547 0/5 Anderson-PT-12-CTLFireability-12 sara is running.

Time elapsed: 61 secs. Pages in use: 27
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 2 2 0 6 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 49/223 30/32 Anderson-PT-12-CTLFireability-13 3546091 m, 72361 m/sec, 5177528 t fired, .
74 EF FNDP 13/3547 0/5 Anderson-PT-12-CTLFireability-12 49819 t fired, 1 attempts, .
75 EF STEQ 13/3547 0/5 Anderson-PT-12-CTLFireability-12 sara is running.

Time elapsed: 66 secs. Pages in use: 30
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 56 (type EXCL) for Anderson-PT-12-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-12: CONJ 0 2 2 0 6 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
74 EF FNDP 18/3547 0/5 Anderson-PT-12-CTLFireability-12 68656 t fired, 1 attempts, .
75 EF STEQ 18/3547 0/5 Anderson-PT-12-CTLFireability-12 sara is running.

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 53 (type EXCL) for 48 Anderson-PT-12-CTLFireability-12
lola: time limit : 235 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for Anderson-PT-12-CTLFireability-12
lola: result : false
lola: markings : 85
lola: fired transitions : 86
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for Anderson-PT-12-CTLFireability-12 (obsolete)
lola: CANCELED task # 75 (type EQUN) for Anderson-PT-12-CTLFireability-12 (obsolete)
lola: LAUNCH task # 43 (type EXCL) for 38 Anderson-PT-12-CTLFireability-10
lola: time limit : 271 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type FNDP) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
lola: fired transitions : 68686
lola: tried executions : 2
lola: time used : 18.000000
lola: memory pages used : 0
lola: FINISHED task # 75 (type EQUN) for Anderson-PT-12-CTLFireability-12
lola: result : unknown
lola: FINISHED task # 43 (type EXCL) for Anderson-PT-12-CTLFireability-10
lola: result : false
lola: markings : 12
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 35 Anderson-PT-12-CTLFireability-09
lola: time limit : 294 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 5/294 5/32 Anderson-PT-12-CTLFireability-09 548775 m, 109755 m/sec, 704119 t fired, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 10/294 9/32 Anderson-PT-12-CTLFireability-09 948619 m, 79968 m/sec, 1447570 t fired, .

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 15/294 12/32 Anderson-PT-12-CTLFireability-09 1360363 m, 82348 m/sec, 2169648 t fired, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 20/294 15/32 Anderson-PT-12-CTLFireability-09 1771058 m, 82139 m/sec, 2860550 t fired, .

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 25/294 18/32 Anderson-PT-12-CTLFireability-09 2165361 m, 78860 m/sec, 3566944 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 30/294 21/32 Anderson-PT-12-CTLFireability-09 2507169 m, 68361 m/sec, 4298360 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 35/294 25/32 Anderson-PT-12-CTLFireability-09 2915098 m, 81585 m/sec, 4989072 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 40/294 27/32 Anderson-PT-12-CTLFireability-09 3262524 m, 69485 m/sec, 5674185 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
36 CTL EXCL 45/294 30/32 Anderson-PT-12-CTLFireability-09 3582833 m, 64061 m/sec, 6440960 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 36 (type EXCL) for Anderson-PT-12-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
Anderson-PT-12-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 33 (type EXCL) for 32 Anderson-PT-12-CTLFireability-08
lola: time limit : 316 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for Anderson-PT-12-CTLFireability-08
lola: result : false
lola: markings : 84
lola: fired transitions : 252
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 25 Anderson-PT-12-CTLFireability-07
lola: time limit : 347 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for Anderson-PT-12-CTLFireability-07
lola: result : false
lola: markings : 6730
lola: fired transitions : 6939
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 Anderson-PT-12-CTLFireability-06
lola: time limit : 434 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 5/434 6/32 Anderson-PT-12-CTLFireability-06 684826 m, 136965 m/sec, 702324 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 10/434 11/32 Anderson-PT-12-CTLFireability-06 1332839 m, 129602 m/sec, 1367758 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 15/434 16/32 Anderson-PT-12-CTLFireability-06 1963073 m, 126046 m/sec, 2016314 t fired, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 20/434 21/32 Anderson-PT-12-CTLFireability-06 2581898 m, 123765 m/sec, 2653015 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 25/434 26/32 Anderson-PT-12-CTLFireability-06 3192560 m, 122132 m/sec, 3281611 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 30/434 31/32 Anderson-PT-12-CTLFireability-06 3792884 m, 120064 m/sec, 3899143 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 23 (type EXCL) for Anderson-PT-12-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 20 (type EXCL) for 19 Anderson-PT-12-CTLFireability-05
lola: time limit : 492 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 5/492 5/32 Anderson-PT-12-CTLFireability-05 476692 m, 95338 m/sec, 498596 t fired, .

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 10/492 8/32 Anderson-PT-12-CTLFireability-05 938548 m, 92371 m/sec, 981364 t fired, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 15/492 12/32 Anderson-PT-12-CTLFireability-05 1382493 m, 88789 m/sec, 1444461 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 20/492 15/32 Anderson-PT-12-CTLFireability-05 1814756 m, 86452 m/sec, 1895396 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 25/492 19/32 Anderson-PT-12-CTLFireability-05 2240078 m, 85064 m/sec, 2340416 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 30/492 22/32 Anderson-PT-12-CTLFireability-05 2665188 m, 85022 m/sec, 2783421 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 35/492 25/32 Anderson-PT-12-CTLFireability-05 3096799 m, 86322 m/sec, 3235018 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 40/492 29/32 Anderson-PT-12-CTLFireability-05 3526627 m, 85965 m/sec, 3684145 t fired, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 45/492 32/32 Anderson-PT-12-CTLFireability-05 3953626 m, 85399 m/sec, 4129668 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 20 (type EXCL) for Anderson-PT-12-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 17 (type EXCL) for 16 Anderson-PT-12-CTLFireability-04
lola: time limit : 565 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Anderson-PT-12-CTLFireability-04
lola: result : false
lola: markings : 85
lola: fired transitions : 86
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 9 Anderson-PT-12-CTLFireability-03
lola: time limit : 678 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 5/678 4/32 Anderson-PT-12-CTLFireability-03 352921 m, 70584 m/sec, 845277 t fired, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 10/678 5/32 Anderson-PT-12-CTLFireability-03 578878 m, 45191 m/sec, 1751992 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 15/678 8/32 Anderson-PT-12-CTLFireability-03 860503 m, 56325 m/sec, 2612071 t fired, .

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 20/678 10/32 Anderson-PT-12-CTLFireability-03 1135172 m, 54933 m/sec, 3459897 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 25/678 12/32 Anderson-PT-12-CTLFireability-03 1410484 m, 55062 m/sec, 4298774 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 30/678 14/32 Anderson-PT-12-CTLFireability-03 1679598 m, 53822 m/sec, 5121503 t fired, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 35/678 16/32 Anderson-PT-12-CTLFireability-03 1948383 m, 53757 m/sec, 5942918 t fired, .

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 40/678 18/32 Anderson-PT-12-CTLFireability-03 2216544 m, 53632 m/sec, 6759799 t fired, .

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 45/678 21/32 Anderson-PT-12-CTLFireability-03 2483615 m, 53414 m/sec, 7573218 t fired, .

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 50/678 23/32 Anderson-PT-12-CTLFireability-03 2747447 m, 52766 m/sec, 8381779 t fired, .

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 55/678 25/32 Anderson-PT-12-CTLFireability-03 3008719 m, 52254 m/sec, 9179134 t fired, .

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 60/678 27/32 Anderson-PT-12-CTLFireability-03 3271423 m, 52540 m/sec, 9979499 t fired, .

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 65/678 29/32 Anderson-PT-12-CTLFireability-03 3533576 m, 52430 m/sec, 10772031 t fired, .

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 70/678 31/32 Anderson-PT-12-CTLFireability-03 3790803 m, 51445 m/sec, 11565769 t fired, .

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 14 (type EXCL) for Anderson-PT-12-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 1 0 0 3 0 0 0
Anderson-PT-12-CTLFireability-11: F 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 Anderson-PT-12-CTLFireability-02
lola: time limit : 829 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Anderson-PT-12-CTLFireability-02
lola: result : false
lola: markings : 323
lola: fired transitions : 694
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 78 (type EXCL) for 45 Anderson-PT-12-CTLFireability-11
lola: time limit : 1106 sec
lola: memory limit: 32 pages
lola: FINISHED task # 78 (type EXCL) for Anderson-PT-12-CTLFireability-11
lola: result : true
lola: markings : 90
lola: fired transitions : 90
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 38 Anderson-PT-12-CTLFireability-10
lola: time limit : 1659 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 5/1659 4/32 Anderson-PT-12-CTLFireability-10 634215 m, 126843 m/sec, 908447 t fired, .

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 10/1659 7/32 Anderson-PT-12-CTLFireability-10 1271817 m, 127520 m/sec, 1880052 t fired, .

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 15/1659 10/32 Anderson-PT-12-CTLFireability-10 1904319 m, 126500 m/sec, 2763767 t fired, .

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 20/1659 14/32 Anderson-PT-12-CTLFireability-10 2532673 m, 125670 m/sec, 3746793 t fired, .

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 25/1659 17/32 Anderson-PT-12-CTLFireability-10 3191685 m, 131802 m/sec, 4689278 t fired, .

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 30/1659 20/32 Anderson-PT-12-CTLFireability-10 3804993 m, 122661 m/sec, 5605519 t fired, .

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 35/1659 24/32 Anderson-PT-12-CTLFireability-10 4451713 m, 129344 m/sec, 6501721 t fired, .

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 40/1659 27/32 Anderson-PT-12-CTLFireability-10 5123530 m, 134363 m/sec, 7416359 t fired, .

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 1 0 3 0 0 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 45/1659 31/32 Anderson-PT-12-CTLFireability-10 5782050 m, 131704 m/sec, 8414804 t fired, .

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL) for Anderson-PT-12-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 Anderson-PT-12-CTLFireability-00
lola: time limit : 3269 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/3269 5/32 Anderson-PT-12-CTLFireability-00 586907 m, 117381 m/sec, 1149184 t fired, .

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/3269 9/32 Anderson-PT-12-CTLFireability-00 1148069 m, 112232 m/sec, 2255698 t fired, .

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/3269 12/32 Anderson-PT-12-CTLFireability-00 1693019 m, 108990 m/sec, 3328539 t fired, .

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/3269 16/32 Anderson-PT-12-CTLFireability-00 2233864 m, 108169 m/sec, 4391710 t fired, .

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/3269 20/32 Anderson-PT-12-CTLFireability-00 2766826 m, 106592 m/sec, 5442184 t fired, .

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/3269 23/32 Anderson-PT-12-CTLFireability-00 3295208 m, 105676 m/sec, 6474197 t fired, .

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/3269 27/32 Anderson-PT-12-CTLFireability-00 3821069 m, 105172 m/sec, 7515975 t fired, .

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/3269 30/32 Anderson-PT-12-CTLFireability-00 4343759 m, 104538 m/sec, 8542459 t fired, .

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for Anderson-PT-12-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Anderson-PT-12-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-03: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
Anderson-PT-12-CTLFireability-10: DISJ 0 0 0 0 3 0 1 0
Anderson-PT-12-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Anderson-PT-12-CTLFireability-00: CTL unknown AGGR
Anderson-PT-12-CTLFireability-01: EGEF true CTL model checker
Anderson-PT-12-CTLFireability-02: CTL false CTL model checker
Anderson-PT-12-CTLFireability-03: DISJ unknown DISJ
Anderson-PT-12-CTLFireability-04: CTL false CTL model checker
Anderson-PT-12-CTLFireability-05: CTL unknown AGGR
Anderson-PT-12-CTLFireability-06: CTL unknown AGGR
Anderson-PT-12-CTLFireability-07: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-08: CTL false CTL model checker
Anderson-PT-12-CTLFireability-09: CTL unknown AGGR
Anderson-PT-12-CTLFireability-10: DISJ unknown DISJ
Anderson-PT-12-CTLFireability-11: F false state space / EG
Anderson-PT-12-CTLFireability-12: CONJ false CTL model checker
Anderson-PT-12-CTLFireability-13: CTL unknown AGGR
Anderson-PT-12-CTLFireability-14: CTL false CTL model checker
Anderson-PT-12-CTLFireability-15: CTL true CTL model checker


Time elapsed: 376 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Anderson-PT-12"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Anderson-PT-12, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r518-tall-167987244100066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Anderson-PT-12.tgz
mv Anderson-PT-12 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;