Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r500-tall-167912723600291.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Szymanski-PT-b06, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r500-tall-167912723600291
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.0M
-rw-r--r-- 1 mcc users 6.1K Feb 26 17:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 26 17:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 16:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 26 16:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 17:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.7K Feb 26 17:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 17:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Feb 26 17:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 17:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.7M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1679259166089

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=Szymanski-PT-b06
Not applying reductions.
Model is PT
ReachabilityDeadlock PT
starting LoLA
BK_INPUT Szymanski-PT-b06
BK_EXAMINATION: ReachabilityDeadlock
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: ReachabilityDeadlock

FORMULA ReachabilityDeadlock TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679259166706

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: REM DEA TR: t = t3757
lola: REM DEA TR: t = t2434
lola: REM DEA TR: t = t1111
lola: REM DEA TR: t = t2497
lola: REM DEA TR: t = t1174
lola: REM DEA TR: t = t859
lola: REM DEA TR: t = t7348
lola: REM DEA TR: t = t6025
lola: REM DEA TR: t = t6088
lola: REM DEA TR: t = t3820
lola: REM DEA TR: t = t40
lola: REM DEA TR: t = t3883
lola: REM DEA TR: t = t2560
lola: REM DEA TR: t = t1237
lola: REM DEA TR: t = t922
lola: REM DEA TR: t = t7411
lola: REM DEA TR: t = t985
lola: REM DEA TR: t = t7474
lola: REM DEA TR: t = t6151
lola: REM DEA TR: t = t3946
lola: REM DEA TR: t = t2623
lola: REM DEA TR: t = t1300
lola: REM DEA TR: t = t2686
lola: REM DEA TR: t = t1363
lola: REM DEA TR: t = t7537
lola: REM DEA TR: t = t6214
lola: REM DEA TR: t = t6277
lola: REM DEA TR: t = t2749
lola: REM DEA TR: t = t1426
lola: REM DEA TR: t = t1489
lola: REM DEA TR: t = t7600
lola: REM DEA TR: t = t7663
lola: REM DEA TR: t = t6340
lola: REM DEA TR: t = t5017
lola: REM DEA TR: t = t5080
lola: REM DEA TR: t = t2812
lola: REM DEA TR: t = t2875
lola: REM DEA TR: t = t1552
lola: REM DEA TR: t = t7726
lola: REM DEA TR: t = t6403
lola: REM DEA TR: t = t7789
lola: REM DEA TR: t = t6466
lola: REM DEA TR: t = t5143
lola: REM DEA TR: t = t2938
lola: REM DEA TR: t = t1615
lola: REM DEA TR: t = t1678
lola: REM DEA TR: t = t7852
lola: REM DEA TR: t = t6529
lola: REM DEA TR: t = t5206
lola: REM DEA TR: t = t6592
lola: REM DEA TR: t = t5269
lola: REM DEA TR: t = t1741
lola: REM DEA TR: t = t7915
lola: REM DEA TR: t = t7978
lola: REM DEA TR: t = t6655
lola: REM DEA TR: t = t5332
lola: REM DEA TR: t = t4009
lola: REM DEA TR: t = t5395
lola: REM DEA TR: t = t4072
lola: REM DEA TR: t = t1804
lola: REM DEA TR: t = t1867
lola: REM DEA TR: t = t6718
lola: REM DEA TR: t = t6781
lola: REM DEA TR: t = t5458
lola: REM DEA TR: t = t4135
lola: REM DEA TR: t = t4198
lola: REM DEA TR: t = t1930
lola: REM DEA TR: t = t1993
lola: REM DEA TR: t = t6844
lola: REM DEA TR: t = t5521
lola: REM DEA TR: t = t5584
lola: REM DEA TR: t = t4261
lola: REM DEA TR: t = t6907
lola: REM DEA TR: t = t6970
lola: REM DEA TR: t = t5647
lola: REM DEA TR: t = t4324
lola: REM DEA TR: t = t3001
lola: REM DEA TR: t = t4387
lola: REM DEA TR: t = t3064
lola: REM DEA TR: t = t103
lola: REM DEA TR: t = t166
lola: REM DEA TR: t = t5710
lola: REM DEA TR: t = t5773
lola: REM DEA TR: t = t4450
lola: REM DEA TR: t = t3127
lola: REM DEA TR: t = t3190
lola: REM DEA TR: t = t229
lola: REM DEA TR: t = t8041
lola: REM DEA TR: t = t292
lola: REM DEA TR: t = t5836
lola: REM DEA TR: t = t4513
lola: REM DEA TR: t = t5899
lola: REM DEA TR: t = t4576
lola: REM DEA TR: t = t3253
lola: REM DEA TR: t = t355
lola: REM DEA TR: t = t5962
lola: REM DEA TR: t = t4639
lola: REM DEA TR: t = t3316
lola: REM DEA TR: t = t3379
lola: REM DEA TR: t = t2056
lola: REM DEA TR: t = t418
lola: REM DEA TR: t = t481
lola: REM DEA TR: t = t4702
lola: REM DEA TR: t = t4765
lola: REM DEA TR: t = t3442
lola: REM DEA TR: t = t2119
lola: REM DEA TR: t = t2182
lola: REM DEA TR: t = t544
lola: REM DEA TR: t = t7033
lola: REM DEA TR: t = t7096
lola: REM DEA TR: t = t4828
lola: REM DEA TR: t = t3505
lola: REM DEA TR: t = t4891
lola: REM DEA TR: t = t3568
lola: REM DEA TR: t = t2245
lola: REM DEA TR: t = t607
lola: REM DEA TR: t = t670
lola: REM DEA TR: t = t7159
lola: REM DEA TR: t = t4954
lola: REM DEA TR: t = t3631
lola: REM DEA TR: t = t2308
lola: REM DEA TR: t = t3694
lola: REM DEA TR: t = t2371
lola: REM DEA TR: t = t1048
lola: REM DEA TR: t = t733
lola: REM DEA TR: t = t7222
lola: REM DEA TR: t = t796
lola: REM DEA TR: t = t7285
lola: REM DEA TR: t = t3716
lola: REM DEA TR: t = t3779
lola: REM DEA TR: t = t2456
lola: REM DEA TR: t = t1133
lola: REM DEA TR: t = t1196
lola: REM DEA TR: t = t818
lola: REM DEA TR: t = t7307
lola: REM DEA TR: t = t881
lola: REM DEA TR: t = t7370
lola: REM DEA TR: t = t6047
lola: REM DEA TR: t = t3842
lola: REM DEA TR: t = t2519
lola: REM DEA TR: t = t62
lola: REM DEA TR: t = t2582
lola: REM DEA TR: t = t1259
lola: REM DEA TR: t = t944
lola: REM DEA TR: t = t7433
lola: REM DEA TR: t = t6110
lola: REM DEA TR: t = t7496
lola: REM DEA TR: t = t6173
lola: REM DEA TR: t = t3905
lola: REM DEA TR: t = t3968
lola: REM DEA TR: t = t2645
lola: REM DEA TR: t = t1322
lola: REM DEA TR: t = t1385
lola: REM DEA TR: t = t7559
lola: REM DEA TR: t = t6236
lola: REM DEA TR: t = t6299
lola: REM DEA TR: t = t2708
lola: REM DEA TR: t = t2771
lola: REM DEA TR: t = t1448
lola: REM DEA TR: t = t7622
lola: REM DEA TR: t = t7685
lola: REM DEA TR: t = t6362
lola: REM DEA TR: t = t5039
lola: REM DEA TR: t = t2834
lola: REM DEA TR: t = t1511
lola: REM DEA TR: t = t2897
lola: REM DEA TR: t = t1574
lola: REM DEA TR: t = t7748
lola: REM DEA TR: t = t6425
lola: REM DEA TR: t = t5102
lola: REM DEA TR: t = t6488
lola: REM DEA TR: t = t5165
lola: REM DEA TR: t = t2960
lola: REM DEA TR: t = t1637
lola: REM DEA TR: t = t7811
lola: REM DEA TR: t = t7874
lola: REM DEA TR: t = t6551
lola: REM DEA TR: t = t5228
lola: REM DEA TR: t = t5291
lola: REM DEA TR: t = t1700
lola: REM DEA TR: t = t1763
lola: REM DEA TR: t = t7937
lola: REM DEA TR: t = t6614
lola: REM DEA TR: t = t6677
lola: REM DEA TR: t = t5354
lola: REM DEA TR: t = t4031
lola: REM DEA TR: t = t4094
lola: REM DEA TR: t = t1826
lola: REM DEA TR: t = t1889
lola: REM DEA TR: t = t6740
lola: REM DEA TR: t = t5417
lola: REM DEA TR: t = t5480
lola: REM DEA TR: t = t4157
lola: REM DEA TR: t = t1952
lola: REM DEA TR: t = t6803
lola: REM DEA TR: t = t6866
lola: REM DEA TR: t = t5543
lola: REM DEA TR: t = t4220
lola: REM DEA TR: t = t4283
lola: REM DEA TR: t = t6929
lola: REM DEA TR: t = t5606
lola: REM DEA TR: t = t6992
lola: REM DEA TR: t = t5669
lola: REM DEA TR: t = t4346
lola: REM DEA TR: t = t3023
lola: REM DEA TR: t = t3086
lola: REM DEA TR: t = t125
lola: REM DEA TR: t = t188
lola: REM DEA TR: t = t5732
lola: REM DEA TR: t = t4409
lola: REM DEA TR: t = t5795
lola: REM DEA TR: t = t4472
lola: REM DEA TR: t = t3149
lola: REM DEA TR: t = t8000
lola: REM DEA TR: t = t251
lola: REM DEA TR: t = t8063
lola: REM DEA TR: t = t5858
lola: REM DEA TR: t = t4535
lola: REM DEA TR: t = t3212
lola: REM DEA TR: t = t4598
lola: REM DEA TR: t = t3275
lola: REM DEA TR: t = t314
lola: REM DEA TR: t = t377
lola: REM DEA TR: t = t5921
lola: REM DEA TR: t = t5984
lola: REM DEA TR: t = t4661
lola: REM DEA TR: t = t3338
lola: REM DEA TR: t = t2015
lola: REM DEA TR: t = t2078
lola: REM DEA TR: t = t440
lola: REM DEA TR: t = t4724
lola: REM DEA TR: t = t3401
lola: REM DEA TR: t = t4787
lola: REM DEA TR: t = t3464
lola: REM DEA TR: t = t2141
lola: REM DEA TR: t = t503
lola: REM DEA TR: t = t566
lola: REM DEA TR: t = t7055
lola: REM DEA TR: t = t4850
lola: REM DEA TR: t = t3527
lola: REM DEA TR: t = t2204
lola: REM DEA TR: t = t3590
lola: REM DEA TR: t = t2267
lola: REM DEA TR: t = t629
lola: REM DEA TR: t = t7118
lola: REM DEA TR: t = t692
lola: REM DEA TR: t = t7181
lola: REM DEA TR: t = t4913
lola: REM DEA TR: t = t4976
lola: REM DEA TR: t = t3653
lola: REM DEA TR: t = t2330
lola: REM DEA TR: t = t1007
lola: REM DEA TR: t = t2393
lola: REM DEA TR: t = t1070
lola: REM DEA TR: t = t755
lola: REM DEA TR: t = t7244
lola: A deadlock is reachable.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Szymanski-PT-b06"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Szymanski-PT-b06, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r500-tall-167912723600291"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Szymanski-PT-b06.tgz
mv Szymanski-PT-b06 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;