Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r495-tall-167912717700281.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is Szymanski-PT-b02, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r495-tall-167912717700281
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.1M
-rw-r--r-- 1 mcc users 7.6K Feb 26 16:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 16:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 16:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 16:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 16:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Feb 26 16:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 16:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 16:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.7M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1679242526731

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=Szymanski-PT-b02
Not applying reductions.
Model is PT
ReachabilityDeadlock PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=/home/mcc/BenchKit/bin//../marcie/bin//ReachabilityDeadlock.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Szymanski_PT_b02
(NrP: 568 NrTr: 8320 NrArc: 33408)

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.603sec

net check time: 0m 0.004sec

init dd package: 0m 2.773sec

TIME LIMIT: Killed by timeout after 1800 seconds
MemTotal: 16393916 kB
MemFree: 10493912 kB
After kill :
MemTotal: 16393916 kB
MemFree: 16229288 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
p335
p446
p258
p269
p280
p291
p302
p313
p324
p336
p347
p358
p369
p380
p391
p402
p413
p424
p435
p447
p458
p469
p480
p491
p502
p256
p257
p259
p260
p261
p262
p263
p264
p265
p266
p267
p268
p270
p271
p272
p273
p274
p275
p276
p277
p278
p279
p281
p282
p283
p284
p285
p286
p287
p288
p289
p290
p292
p293
p294
p295
p296
p297
p298
p299
p300
p301
p303
p304
p305
p306
p307
p308
p309
p310
p311
p312
p314
p315
p316
p317
p318
p319
p320
p321
p322
p323
p325
p326
p327
p328
p329
p330
p331
p332
p333
p334
p337
p338
p339
p340
p341
p342
p343
p344
p345
p346
p348
p349
p350
p351
p352
p353
p354
p355
p356
p357
p359
p360
p361
p362
p363
p364
p365
p366
p367
p368
p370
p371
p372
p373
p374
p375
p376
p377
p378
p379
p381
p382
p383
p384
p385
p386
p387
p388
p389
p390
p392
p393
p394
p395
p396
p397
p398
p399
p400
p401
p403
p404
p405
p406
p407
p408
p409
p410
p411
p412
p414
p415
p416
p417
p418
p419
p420
p421
p422
p423
p425
p426
p427
p428
p429
p430
p431
p432
p433
p434
p436
p437
p438
p439
p440
p441
p442
p443
p444
p445
p448
p449
p450
p451
p452
p453
p454
p455
p456
p457
p459
p460
p461
p462
p463
p464
p465
p466
p467
p468
p470
p471
p472
p473
p474
p475
p476
p477
p478
p479
p481
p482
p483
p484
p485
p486
p487
p488
p489
p490
p492
p493
p494
p495
p496
p497
p498
p499
p500
p501
p503
p504
p505
p506
p507
p508
p509
p510
p511
l30
l31
l52
l53

The net has transition(s) that can never fire:
t985
t2056
t4072
t1196
t1237
t1259
t1300
t1322
t1363
t1385
t1426
t1448
t1489
t1511
t1552
t1574
t1615
t1637
t1678
t1700
t1741
t1763
t1804
t1826
t1867
t1889
t1930
t1952
t1993
t2015
t4198
t4220
t4261
t2141
t2182
t2204
t2245
t2267
t2308
t2330
t2371
t2393
t2434
t2456
t2497
t2519
t2560
t2582
t2623
t2645
t2686
t2708
t2749
t2771
t2812
t2834
t2875
t2897
t2938
t2960
t3001
t3023
t3064
t3086
t3127
t3149
t3190
t3212
t3253
t3275
t3316
t3338
t3379
t3401
t3442
t3464
t3505
t3527
t3568
t3590
t3631
t3653
t3694
t3716
t3757
t3779
t3820
t3842
t3883
t3905
t3946
t3968
t4009
t4031
t4283
t4324
t4346
t4387
t4409
t4450
t4472
t4513
t4535
t4576
t4598
t4639
t4661
t4702
t4724
t4765
t4787
t4828
t4850
t4891
t4913
t4954
t4976
t5017
t5039
t5080
t5102
t5143
t5165
t5206
t5228
t5269
t5291
t5332
t5354
t5395
t5417
t5458
t5480
t5521
t5543
t5584
t5606
t5647
t5669
t5710
t5732
t5773
t5795
t5836
t5858
t5899
t5921
t5962
t5984
t6025
t6047
t6088
t6655
t6110
t6151
t6173
t6214
t6781
t6236
t6277
t6299
t6340
t6362
t6403
t6425
t6466
t6488
t6529
t6551
t6592
t6614
t6677
t6718
t6740
t6803
t6844
t6866
t6907
t6929
t6970
t6992
t7033
t7055
t7096
t7118
t7159
t7181
t7222
t7244
t7285
t7307
t7348
t7370
t7411
t7433
t7474
t7496
t7537
t7559
t7600
t7622
t7663
t7685
t7726
t7748
t7789
t7811
t7852
t7874
t7915
t7937
t7978
t8000
t8041
t8063
t4135
t4157
t2078
t4094
t2119
t1111
t1133
t1174
t1048
t125
t859
t944
t40
t62
t103
t166
t188
t229
t251
t292
t818
t314
t355
t377
t418
t440
t481
t503
t544
t566
t607
t629
t670
t692
t733
t755
t796
t1070
t1007
t881
t922

check for constant places
p256
p257
p258
p259
p260
p261
p262
p263
p264
p265
p266
p267
p268
p269
p270
p271
p272
p273
p274
p275
p276
p277
p278
p279
p280
p281
p282
p283
p284
p285
p286
p287
p288
p289
p290
p291
p292
p293
p294
p295
p296
p297
p298
p299
p300
p301
p302
p303
p304
p305
p306
p307
p308
p309
p310
p311
p312
p313
p314
p315
p316
p317
p318
p319
p320
p321
p322
p323
p324
p325
p326
p327
p328
p329
p330
p331
p332
p333
p334
p335
p336
p337
p338
p339
p340
p341
p342
p343
p344
p345
p346
p347
p348
p349
p350
p351
p352
p353
p354
p355
p356
p357
p358
p359
p360
p361
p362
p363
p364
p365
p366
p367
p368
p369
p370
p371
p372
p373
p374
p375
p376
p377
p378
p379
p380
p381
p382
p383
p384
p385
p386
p387
p388
p389
p390
p391
p392
p393
p394
p395
p396
p397
p398
p399
p400
p401
p402
p403
p404
p405
p406
p407
p408
p409
p410
p411
p412
p413
p414
p415
p416
p417
p418
p419
p420
p421
p422
p423
p424
p425
p426
p427
p428
p429
p430
p431
p432
p433
p434
p435
p436
p437
p438
p439
p440
p441
p442
p443
p444
p445
p446
p447
p448
p449
p450
p451
p452
p453
p454
p455
p456
p457
p458
p459
p460
p461
p462
p463
p464
p465
p466
p467
p468
p469
p470
p471
p472
p473
p474
p475
p476
p477
p478
p479
p480
p481
p482
p483
p484
p485
p486
p487
p488
p489
p490
p491
p492
p493
p494
p495
p496
p497
p498
p499
p500
p501
p502
p503
p504
p505
p506
p507
p508
p509
p510
p511
found 256 constant places
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.129sec

1645 2417 2851 3218 4178 4194 4633 4774 4853 5114 6365 6579 8084 8218 8485 8767 8499 8578 9005 9146 9391 9120 8591 9258 9815 10339 10890 10367 11005 11474 11232 11123 11600 11609 12021 11522 12127 11897 12118 11575 11848 11815 12346 12277 11460 11979 12452 12563 13020 12704 12411 12502 12488 13033 12975 13109 13105 13083 12472 13192 13303 13469 15545 16639 16494 17291 17721 18188 18243 17773 18683 18136 19051 18816 18565 19280 19504 19278 18528 17916 18220 18745 18395 19466 18907 18794 19417 18937 19216 19064 19345 19220 19207 20570 20757 21438 21429 21007 21783 22196 23019 22963 22608 23205 23635 24218 23754 23743 26983 26979 28056 27351 27459 28921 28739 28429 28706 28916 29082 29061 29692 30688 31619 31702 31502 31605 32053 32600 32561 33499 32516 33158 33415 33480 32880 32754 33222 33742 33856 34455 34580 35102 35323 37730 39239 38773 38221 36991 37787 37381 36423 36365 36373 37167 35604 36039 36201 36187 36091 36240 36361 38006 38763 38647 40006 39798 39944 40251 40635 39166 39317 39034 39320 40760 41314 40318 41447 41692 41752 41714 42874 43004 41697 42363 42278 41330 41833 41639 42691 43413 43594 43099 43786 43939 44294 44741 44857 45744 45489 46258 46143 46073 46129 46354 46501 46486 46188 46222 45646 45697 46517 46679 46841 47346 47288 46983 46803 46642 45466 45597 45478 45511 45894 45703 45115 45324 45065 44655 44694 45103 45457 45602 45477 45420 45760 46452 46855 47588 47768 47724 47643 48168 48126 48154 47892 47241 47220 46880 47302 47769 47553 47565 48047 47985 48167 48153 48221 48370 48249 48552 48715 48797 48704 48696 48713 49348 49501 49461 50084 50267 50238 49990 49949 50076 49845 50189 50483 50345 50557 50495 50870 50731 50301 50232 50993 51108 50890 50815 50835 50962 50974 50829 50779 50883 50940 50870 50716 50889 51044 51305 50888 52029 52901 52704 53020 53014 52814 53127 53647 53253 53242 53972 53950 54209 53994 53861 53654 53922 53351 53175 53665 53383 52441 51750 51683 51185 50758 50700 50715 50772 51071 51150 51365 51128 50330 49297 49275 49281 49571 49887 50632 50962 51194 51445 50878 50944 50888 50149 50184 51477 51691 51392 52077 51872 51654 52048 52504 52440 52422 52635 52803 51868 51697 52058 51566 51701 51676 51639 51881 51609 52816 52461 53357 52453 53787 53546 53297 53573 53814 53205 53280 53810 53971 53489 54880 55103 54761 54560 54801 54853 55508 54001 54862 55040 55364 55543 53625 53454 53517 53767 53716 53678 53456 53669 53869 53152 53321 53557 53410 54243 54723 54757 54945 54906 54624 54780 54907 52874 52322 52723 52542 52728 52892 53250 52831 52545 52769 52875 52609 52623 52891 53014 53367 52700 53247 53527 52961 52727 51618 51598 51286 50983 50600 51238 51543 52479 51650 51965 51643 51637 51689 50874 51141 51443 50714 50922 50192 50185 50800 50048 49588 49473 50007 49424 49172 49471 49185 49123 49172 49246 49270

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Szymanski-PT-b02"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is Szymanski-PT-b02, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r495-tall-167912717700281"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Szymanski-PT-b02.tgz
mv Szymanski-PT-b02 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;