Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r491-tall-167912711201006.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5348
Executing tool smartxred
Input is UtilityControlRoom-COL-Z2T4N06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r491-tall-167912711201006
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 8.1K Feb 26 14:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 14:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 26 14:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 26 14:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 14:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 14:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Feb 26 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 56K Feb 26 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-00
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-01
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-02
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-03
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-04
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-05
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-06
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-07
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-08
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-09
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-10
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-11
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-12
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-13
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-14
FORMULA_NAME UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679307353204

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=smartxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T4N06
Applying reductions before tool smart
Invoking reducer
Running Version 202303021504
[2023-03-20 10:15:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 10:15:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 10:15:55] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-20 10:15:55] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-20 10:15:55] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 744 ms
[2023-03-20 10:15:55] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 106 PT places and 162.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 25 ms.
Working with output stream class java.io.PrintStream
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 10:15:56] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 4 ms.
[2023-03-20 10:15:56] [INFO ] Skeletonized 15 HLPN properties in 2 ms.
Remains 15 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
[2023-03-20 10:15:56] [INFO ] Flatten gal took : 29 ms
[2023-03-20 10:15:56] [INFO ] Flatten gal took : 3 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(6), Z(2), Z(2)] of place MovetoZ breaks symmetries in sort Z
[2023-03-20 10:15:56] [INFO ] Unfolded HLPN to a Petri net with 106 places and 162 transitions 510 arcs in 12 ms.
[2023-03-20 10:15:56] [INFO ] Unfolded 15 HLPN properties in 1 ms.
Ensure Unique test removed 24 transitions
Reduce redundant transitions removed 24 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 578 ms. (steps per millisecond=17 ) properties (out of 15) seen :1
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 89 ms. (steps per millisecond=112 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 126 ms. (steps per millisecond=79 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 134 ms. (steps per millisecond=74 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 74 ms. (steps per millisecond=135 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 38 ms. (steps per millisecond=263 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=344 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 14) seen :0
Interrupted probabilistic random walk after 199507 steps, run timeout after 3001 ms. (steps per millisecond=66 ) properties seen :{}
Probabilistic random walk after 199507 steps, saw 127702 distinct states, run finished after 3004 ms. (steps per millisecond=66 ) properties seen :0
Running SMT prover for 14 properties.
// Phase 1: matrix 138 rows 106 cols
[2023-03-20 10:16:00] [INFO ] Computed 15 place invariants in 12 ms
[2023-03-20 10:16:01] [INFO ] [Real]Absence check using 15 positive place invariants in 8 ms returned sat
[2023-03-20 10:16:01] [INFO ] After 254ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0 real:7
[2023-03-20 10:16:01] [INFO ] [Nat]Absence check using 15 positive place invariants in 4 ms returned sat
[2023-03-20 10:16:01] [INFO ] After 107ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :0
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 6187 ms.
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running UtilityControlRoom (COL), instance Z2T4N06
Examination ReachabilityCardinality
Parser /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//parser/Cardinality.jar
Model checker /home/mcc/BenchKit/bin//../reducer/bin//../../smart/bin//rem_exec//smart

GOT IT HERE. BS
Petri model created: 13 places, 12 transitions, 37 arcs.
Final Score: 44.057
Took : 0 seconds
Reachability Cardinality file is: ReachabilityCardinality.xml
READY TO PARSE. BS
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-00 (reachable &!potential( ( ( ( ( (tk(P1)) <= (tk(P3)) ) & ( (! ( ( (tk(P11)) <= ( 97 ) ) & ( ( ( 46 ) <= (tk(P4)) ) | ( ( (tk(P4)) <= ( 45 ) ) | ( (tk(P13)) <= ( 52 ) ) ) ) )) | ( (! ( ( 71 ) <= (tk(P8)) )) & ( ( (tk(P13)) <= ( 22 ) ) | ( ( (tk(P2)) <= ( 44 ) ) | (! ( ( (tk(P13)) <= ( 67 ) ) | ( (tk(P11)) <= ( 41 ) ) )) ) ) ) ) ) | ( ( (tk(P2)) <= (tk(P8)) ) & (! ( (tk(P12)) <= (tk(P8)) )) ) ) | (! ( ( ( (! ( (tk(P10)) <= (tk(P8)) )) & ( ( (tk(P7)) <= ( 75 ) ) | ( ( (tk(P10)) <= ( 26 ) ) & ( ( 75 ) <= (tk(P5)) ) ) ) ) | ( ( ( (tk(P4)) <= ( 74 ) ) & ( ( (tk(P5)) <= (tk(P6)) ) | ( ( (tk(P9)) <= (tk(P6)) ) | ( (tk(P4)) <= (tk(P10)) ) ) ) ) & ( (! ( (tk(P4)) <= (tk(P7)) )) & ( (! ( (tk(P9)) <= (tk(P8)) )) & ( ( (tk(P2)) <= ( 34 ) ) | ( ( 89 ) <= (tk(P13)) ) ) ) ) ) ) & ( ( ( ( ( ( (tk(P4)) <= ( 64 ) ) | ( (tk(P1)) <= ( 79 ) ) ) | ( (tk(P12)) <= (tk(P6)) ) ) | ( ( ( (tk(P9)) <= ( 38 ) ) & ( (tk(P13)) <= ( 45 ) ) ) & ( ( (tk(P7)) <= ( 74 ) ) & ( ( 35 ) <= (tk(P1)) ) ) ) ) & ( (! ( ( 41 ) <= (tk(P9)) )) | ( (tk(P12)) <= (tk(P12)) ) ) ) & ( (tk(P6)) <= ( 85 ) ) ) )) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-01 (reachable & potential(( ( ( 63 ) <= (tk(P7)) ) & (! ( (! ( (tk(P6)) <= ( 3 ) )) | ( ( (! ( (! ( ( 87 ) <= (tk(P4)) )) & ( ( ( 73 ) <= (tk(P2)) ) | ( ( 15 ) <= (tk(P7)) ) ) )) | ( ( ( 76 ) <= (tk(P3)) ) & ( ( (! ( ( 85 ) <= (tk(P3)) )) & ( ( ( 62 ) <= (tk(P4)) ) | ( ( 11 ) <= (tk(P7)) ) ) ) | ( ( ( (tk(P11)) <= (tk(P5)) ) & ( (tk(P12)) <= ( 34 ) ) ) & ( ( (tk(P13)) <= (tk(P1)) ) | ( ( 99 ) <= (tk(P3)) ) ) ) ) ) ) | ( ( ( (! ( ( 26 ) <= (tk(P10)) )) | (! ( ( 100 ) <= (tk(P3)) )) ) & (! ( (tk(P8)) <= (tk(P8)) )) ) & ( (! ( (tk(P3)) <= ( 64 ) )) & ( ( 73 ) <= (tk(P3)) ) ) ) ) )) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-02 (reachable & potential((! ( (! ( ( ( (! ( (! ( ( 87 ) <= (tk(P1)) )) | (! ( ( 85 ) <= (tk(P1)) )) )) & (! ( ( 54 ) <= (tk(P13)) )) ) | ( ( ( ( ( 13 ) <= (tk(P2)) ) & ( ( (tk(P1)) <= ( 24 ) ) & ( (tk(P6)) <= ( 1 ) ) ) ) & (! ( ( ( 63 ) <= (tk(P10)) ) | ( (tk(P3)) <= (tk(P4)) ) )) ) & ( (tk(P10)) <= ( 66 ) ) ) ) | (! ( ( (! ( ( (tk(P9)) <= (tk(P9)) ) & ( ( 90 ) <= (tk(P13)) ) )) & ( ( ( (tk(P5)) <= ( 90 ) ) & ( ( 53 ) <= (tk(P10)) ) ) | (! ( ( 77 ) <= (tk(P4)) )) ) ) & (! ( (tk(P11)) <= ( 75 ) )) )) )) | ( (tk(P7)) <= ( 68 ) ) ))))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-03 (reachable &!potential( ( (! ( ( (! ( (tk(P11)) <= (tk(P9)) )) & (! ( (! ( (tk(P2)) <= (tk(P7)) )) & ( (tk(P6)) <= (tk(P2)) ) )) ) & ( (tk(P8)) <= ( 58 ) ) )) | ( (tk(P5)) <= ( 17 ) ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-04 (reachable & potential(( ( (! ( ( (tk(P9)) <= (tk(P12)) ) | ( ( 62 ) <= (tk(P5)) ) )) & ( ( (tk(P4)) <= (tk(P10)) ) | (! ( ( 98 ) <= (tk(P4)) )) ) ) & ( (! ( (tk(P4)) <= ( 44 ) )) | ( ( 50 ) <= (tk(P13)) ) ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-05 (reachable &!potential( ( (! ( ( ( ( (! ( (tk(P1)) <= ( 25 ) )) | (! ( ( ( ( 64 ) <= (tk(P6)) ) | ( ( 67 ) <= (tk(P5)) ) ) | ( ( (tk(P11)) <= ( 3 ) ) | ( (tk(P9)) <= ( 69 ) ) ) )) ) & ( ( (tk(P8)) <= (tk(P11)) ) & ( ( 9 ) <= (tk(P13)) ) ) ) | ( ( ( ( ( ( (tk(P7)) <= (tk(P4)) ) | ( (tk(P6)) <= ( 15 ) ) ) & (! ( (tk(P3)) <= ( 1 ) )) ) & ( ( (tk(P6)) <= ( 39 ) ) | ( (tk(P2)) <= (tk(P2)) ) ) ) & ( (tk(P10)) <= (tk(P2)) ) ) | (! ( ( 41 ) <= (tk(P8)) )) ) ) & ( ( ( ( (tk(P13)) <= (tk(P11)) ) | ( ( (tk(P13)) <= ( 15 ) ) & (! ( ( ( 15 ) <= (tk(P2)) ) & ( (tk(P4)) <= (tk(P7)) ) )) ) ) | ( ( (! ( ( ( 8 ) <= (tk(P2)) ) | ( (tk(P11)) <= ( 70 ) ) )) | (! ( ( ( 83 ) <= (tk(P10)) ) & ( ( 89 ) <= (tk(P3)) ) )) ) & (! ( ( (tk(P10)) <= ( 22 ) ) & ( ( 25 ) <= (tk(P2)) ) )) ) ) & ( ( 38 ) <= (tk(P4)) ) ) )) | (! ( (! ( (! ( (! ( (tk(P10)) <= (tk(P5)) )) | (! ( (tk(P10)) <= ( 50 ) )) )) & (! ( ( ( 51 ) <= (tk(P5)) ) & ( (tk(P4)) <= ( 94 ) ) )) )) & (! ( ( (tk(P7)) <= (tk(P7)) ) | ( (tk(P8)) <= ( 66 ) ) )) )) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-06 (reachable & potential(( (! ( ( ( ( 95 ) <= (tk(P12)) ) & (! ( ( ( (tk(P6)) <= (tk(P1)) ) | ( ( ( (tk(P13)) <= (tk(P10)) ) | ( ( 15 ) <= (tk(P3)) ) ) & ( ( (tk(P4)) <= (tk(P1)) ) | ( (tk(P8)) <= (tk(P5)) ) ) ) ) | ( ( (! ( (tk(P4)) <= (tk(P6)) )) | (! ( ( 39 ) <= (tk(P13)) )) ) | (! ( (tk(P2)) <= ( 57 ) )) ) )) ) & ( ( ( ( ( ( ( ( 61 ) <= (tk(P9)) ) & ( ( 3 ) <= (tk(P13)) ) ) & ( ( ( 100 ) <= (tk(P3)) ) & ( (tk(P1)) <= ( 29 ) ) ) ) | ( ( 69 ) <= (tk(P11)) ) ) & ( (tk(P6)) <= ( 88 ) ) ) | (! ( ( ( (tk(P10)) <= (tk(P5)) ) & ( (tk(P2)) <= ( 52 ) ) ) | (! ( (tk(P3)) <= ( 44 ) )) )) ) | ( ( ( 96 ) <= (tk(P1)) ) | ( (tk(P2)) <= (tk(P11)) ) ) ) )) & ( (! ( ( ( ( ( ( 54 ) <= (tk(P12)) ) & ( (tk(P10)) <= (tk(P4)) ) ) | ( ( ( 14 ) <= (tk(P8)) ) | ( (tk(P5)) <= ( 57 ) ) ) ) | ( (tk(P10)) <= (tk(P1)) ) ) & ( ( (! ( (tk(P13)) <= ( 47 ) )) & ( ( 63 ) <= (tk(P3)) ) ) | ( (! ( ( 64 ) <= (tk(P1)) )) | ( ( ( 2 ) <= (tk(P4)) ) & ( (tk(P12)) <= (tk(P2)) ) ) ) ) )) & ( ( 73 ) <= (tk(P4)) ) ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-07 (reachable &!potential( (! ( ( ( (! ( (tk(P5)) <= ( 43 ) )) | ( ( ( ( ( ( (tk(P6)) <= ( 16 ) ) & ( (tk(P10)) <= ( 45 ) ) ) | ( ( ( 37 ) <= (tk(P11)) ) & ( (tk(P2)) <= (tk(P12)) ) ) ) & ( (! ( ( 53 ) <= (tk(P6)) )) | ( ( (tk(P8)) <= (tk(P12)) ) | ( ( 46 ) <= (tk(P7)) ) ) ) ) | (! ( ( (tk(P5)) <= (tk(P13)) ) & ( ( 9 ) <= (tk(P7)) ) )) ) & ( (! ( (tk(P7)) <= (tk(P9)) )) & (! ( ( ( ( 54 ) <= (tk(P6)) ) & ( (tk(P10)) <= ( 98 ) ) ) | ( ( (tk(P8)) <= ( 32 ) ) & ( (tk(P6)) <= (tk(P4)) ) ) )) ) ) ) | ( ( 65 ) <= (tk(P7)) ) ) & (! ( (tk(P10)) <= (tk(P3)) )) ))))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-08 (reachable & potential((! ( (! ( (tk(P3)) <= (tk(P7)) )) | ( (! ( ( (! ( ( 18 ) <= (tk(P8)) )) & ( ( ( 21 ) <= (tk(P6)) ) | (! ( (tk(P2)) <= ( 55 ) )) ) ) & ( (! ( (tk(P10)) <= ( 37 ) )) | ( (! ( (tk(P6)) <= (tk(P12)) )) | ( ( (tk(P11)) <= (tk(P8)) ) | ( (tk(P10)) <= (tk(P11)) ) ) ) ) )) | ( ( ( ( ( ( (tk(P9)) <= ( 38 ) ) | ( ( 6 ) <= (tk(P4)) ) ) & ( (tk(P13)) <= ( 28 ) ) ) | ( ( (tk(P10)) <= (tk(P7)) ) & (! ( (tk(P12)) <= ( 10 ) )) ) ) | ( ( (! ( (tk(P3)) <= (tk(P12)) )) | ( ( (tk(P1)) <= ( 29 ) ) | ( (tk(P5)) <= (tk(P3)) ) ) ) & ( ( ( (tk(P10)) <= (tk(P7)) ) | ( (tk(P5)) <= (tk(P9)) ) ) & ( ( (tk(P7)) <= (tk(P11)) ) & ( (tk(P7)) <= ( 18 ) ) ) ) ) ) & ( (tk(P1)) <= (tk(P13)) ) ) ) ))))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-09 (reachable &!potential( (! ( ( ( ( ( ( ( ( (tk(P4)) <= ( 93 ) ) | ( ( 21 ) <= (tk(P11)) ) ) & (! ( ( 45 ) <= (tk(P2)) )) ) | (! ( (tk(P13)) <= (tk(P9)) )) ) | ( (! ( ( (tk(P8)) <= (tk(P10)) ) & ( (tk(P8)) <= ( 75 ) ) )) | (! ( ( (tk(P5)) <= (tk(P2)) ) | ( (tk(P8)) <= ( 7 ) ) )) ) ) | ( (tk(P5)) <= ( 79 ) ) ) | ( ( 43 ) <= (tk(P6)) ) ) & (! ( (! ( (tk(P1)) <= ( 59 ) )) | ( (! ( (tk(P11)) <= ( 8 ) )) | (! ( ( 18 ) <= (tk(P5)) )) ) )) ))))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-10 (reachable & potential((! ( ( ( ( 71 ) <= (tk(P2)) ) | ( ( ( ( ( ( 46 ) <= (tk(P6)) ) & ( ( (tk(P5)) <= (tk(P5)) ) & ( (tk(P5)) <= ( 16 ) ) ) ) | ( ( ( ( 86 ) <= (tk(P11)) ) | ( (tk(P2)) <= ( 90 ) ) ) & ( ( ( 53 ) <= (tk(P2)) ) & ( (tk(P3)) <= ( 29 ) ) ) ) ) | (! ( ( (tk(P13)) <= ( 34 ) ) | ( (tk(P3)) <= ( 27 ) ) )) ) | (! ( ( ( (tk(P6)) <= ( 92 ) ) | ( ( (tk(P5)) <= ( 21 ) ) & ( (tk(P7)) <= (tk(P7)) ) ) ) & (! ( (tk(P11)) <= ( 74 ) )) )) ) ) | ( (tk(P3)) <= (tk(P11)) ) ))))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-11 (reachable &!potential( ( (tk(P6)) <= ( 27 ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-12 (reachable &!potential( ( (! ( ( (tk(P8)) <= (tk(P12)) ) & (! ( (! ( (! ( (tk(P8)) <= ( 35 ) )) | (! ( (tk(P5)) <= (tk(P13)) )) )) | (! ( ( ( (tk(P4)) <= (tk(P7)) ) & ( (tk(P12)) <= ( 66 ) ) ) & ( ( (tk(P3)) <= ( 47 ) ) & ( ( 15 ) <= (tk(P5)) ) ) )) )) )) | (! ( (tk(P13)) <= ( 17 ) )) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-13 (reachable & potential(( ( (! ( (tk(P11)) <= ( 31 ) )) & ( ( ( 76 ) <= (tk(P3)) ) | ( (tk(P12)) <= (tk(P4)) ) ) ) & ( (tk(P5)) <= ( 29 ) ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-14 (reachable &!potential( ( (tk(P11)) <= ( 100 ) )))
PROPERTY: UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-15 (reachable &!potential( ( (tk(P10)) <= ( 59 ) )))
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-13 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA UtilityControlRoom-COL-Z2T4N06-ReachabilityCardinality-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1679307363389

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
WARNING:
No initial marking given, assuming zero
within model automodel built in file model.sm near line 92

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T4N06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="smartxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool smartxred"
echo " Input is UtilityControlRoom-COL-Z2T4N06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r491-tall-167912711201006"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T4N06.tgz
mv UtilityControlRoom-COL-Z2T4N06 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;