Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r490-tall-167912709100770.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marciexred
Input is TwoPhaseLocking-PT-nC00004vD, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r490-tall-167912709100770
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 404K
-rw-r--r-- 1 mcc users 8.5K Feb 25 17:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 17:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 17:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 25 17:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Feb 25 17:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32K Feb 25 17:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-00
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-01
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-02
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-03
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-04
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-05
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-06
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-07
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-08
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-09
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-10
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-11
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-12
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-13
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-14
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679338781022

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marciexred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC00004vD
Applying reductions before tool marcie
Invoking reducer
Running Version 202303021504
[2023-03-20 18:59:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 18:59:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 18:59:42] [INFO ] Load time of PNML (sax parser for PT used): 17 ms
[2023-03-20 18:59:42] [INFO ] Transformed 8 places.
[2023-03-20 18:59:42] [INFO ] Transformed 6 transitions.
[2023-03-20 18:59:42] [INFO ] Parsed PT model containing 8 places and 6 transitions and 18 arcs in 71 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Initial state reduction rules removed 4 formulas.
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 8 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 7 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
// Phase 1: matrix 6 rows 8 cols
[2023-03-20 18:59:42] [INFO ] Computed 3 place invariants in 5 ms
[2023-03-20 18:59:42] [INFO ] Implicit Places using invariants in 122 ms returned []
[2023-03-20 18:59:42] [INFO ] Invariant cache hit.
[2023-03-20 18:59:42] [INFO ] Implicit Places using invariants and state equation in 27 ms returned []
Implicit Place search using SMT with State Equation took 172 ms to find 0 implicit places.
[2023-03-20 18:59:42] [INFO ] Invariant cache hit.
[2023-03-20 18:59:42] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 206 ms. Remains : 8/8 places, 6/6 transitions.
Support contains 8 out of 8 places after structural reductions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 11 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 3 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Finished random walk after 13 steps, including 0 resets, run visited all 13 properties in 14 ms. (steps per millisecond=0 )
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 2 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 2 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 0 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 0 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 0 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 0 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 0 ms
[2023-03-20 18:59:43] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 2 ms
[2023-03-20 18:59:43] [INFO ] Flatten gal took : 1 ms
[2023-03-20 18:59:43] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 1 ms.
[2023-03-20 18:59:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8 places, 6 transitions and 18 arcs took 0 ms.
Total runtime 820 ms.
There are residual formulas that ITS could not solve within timeout
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../reducer/bin//../../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Petri
(NrP: 8 NrTr: 6 NrArc: 18)

parse formulas
formulas created successfully
place and transition orderings generation:0m 0.000sec

net check time: 0m 0.000sec

init dd package: 0m 2.701sec


RS generation: 0m 0.000sec


-> reachability set: #nodes 54 (5.4e+01) #states 32



starting MCC model checker
--------------------------

checking: AG [AX [EF [p2<=0]]]
normalized: ~ [E [true U EX [~ [E [true U p2<=0]]]]]

abstracting: (p2<=0)
states: 20
.-> the formula is TRUE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AX [AG [EF [[1<=p0 & 1<=p1]]]]
normalized: ~ [EX [E [true U ~ [E [true U [1<=p0 & 1<=p1]]]]]]

abstracting: (1<=p1)
states: 13
abstracting: (1<=p0)
states: 18
.-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: EG [EX [[p0<=0 | p1<=0]]]
normalized: EG [EX [[p0<=0 | p1<=0]]]

abstracting: (p1<=0)
states: 19
abstracting: (p0<=0)
states: 14
.....
EG iterations: 4
-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AF [AX [AG [[[1<=p3 & 1<=p4] & p7<=0]]]]
normalized: ~ [EG [EX [E [true U ~ [[[1<=p3 & 1<=p4] & p7<=0]]]]]]

abstracting: (p7<=0)
states: 24
abstracting: (1<=p4)
states: 17
abstracting: (1<=p3)
states: 13
..
EG iterations: 1
-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AX [EG [AG [EF [[1<=p6 | [1<=p0 & 1<=p1]]]]]]
normalized: ~ [EX [~ [EG [~ [E [true U ~ [E [true U [[1<=p0 & 1<=p1] | 1<=p6]]]]]]]]]

abstracting: (1<=p6)
states: 8
abstracting: (1<=p1)
states: 13
abstracting: (1<=p0)
states: 18
.
EG iterations: 1
.-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AG [EX [[[p6<=0 & 1<=p0] & [1<=p1 & AG [p7<=0]]]]]
normalized: ~ [E [true U ~ [EX [[[~ [E [true U ~ [p7<=0]]] & 1<=p1] & [p6<=0 & 1<=p0]]]]]]

abstracting: (1<=p0)
states: 18
abstracting: (p6<=0)
states: 24
abstracting: (1<=p1)
states: 13
abstracting: (p7<=0)
states: 24
.-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: EX [AF [[[EG [p7<=0] | p6<=0] | [[1<=p0 & 1<=p1] | [[p0<=0 | p1<=0] & [p3<=0 | p5<=0]]]]]]
normalized: EX [~ [EG [~ [[[[[p3<=0 | p5<=0] & [p0<=0 | p1<=0]] | [1<=p0 & 1<=p1]] | [EG [p7<=0] | p6<=0]]]]]]

abstracting: (p6<=0)
states: 24
abstracting: (p7<=0)
states: 24
.
EG iterations: 1
abstracting: (1<=p1)
states: 13
abstracting: (1<=p0)
states: 18
abstracting: (p1<=0)
states: 19
abstracting: (p0<=0)
states: 14
abstracting: (p5<=0)
states: 2
abstracting: (p3<=0)
states: 19
.
EG iterations: 1
.-> the formula is TRUE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AG [AF [E [[~ [AX [[1<=p3 & 1<=p4]]] & ~ [A [[1<=p0 & 1<=p1] U 1<=p6]]] U ~ [E [[1<=p3 & 1<=p5] U [1<=p3 & 1<=p5]]]]]]
normalized: ~ [E [true U EG [~ [E [[~ [[~ [EG [~ [1<=p6]]] & ~ [E [~ [1<=p6] U [~ [[1<=p0 & 1<=p1]] & ~ [1<=p6]]]]]] & EX [~ [[1<=p3 & 1<=p4]]]] U ~ [E [[1<=p3 & 1<=p5] U [1<=p3 & 1<=p5]]]]]]]]

abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p4)
states: 17
abstracting: (1<=p3)
states: 13
.abstracting: (1<=p6)
states: 8
abstracting: (1<=p1)
states: 13
abstracting: (1<=p0)
states: 18
abstracting: (1<=p6)
states: 8
abstracting: (1<=p6)
states: 8
..........
EG iterations: 10
....
EG iterations: 4
-> the formula is TRUE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: E [[EF [[[1<=p2 & 1<=p7] | [1<=p7 | 1<=p7]]] & AX [[AG [[1<=p0 & 1<=p1]] & [p2<=0 | AX [[1<=p3 & 1<=p5]]]]]] U ~ [EX [AG [[E [1<=p6 U 1<=p7] & p2<=0]]]]]
normalized: E [[~ [EX [~ [[[~ [EX [~ [[1<=p3 & 1<=p5]]]] | p2<=0] & ~ [E [true U ~ [[1<=p0 & 1<=p1]]]]]]]] & E [true U [[1<=p7 | 1<=p7] | [1<=p2 & 1<=p7]]]] U ~ [EX [~ [E [true U ~ [[E [1<=p6 U 1<=p7] & p2<=0]]]]]]]

abstracting: (p2<=0)
states: 20
abstracting: (1<=p7)
states: 8
abstracting: (1<=p6)
states: 8
.abstracting: (1<=p7)
states: 8
abstracting: (1<=p2)
states: 12
abstracting: (1<=p7)
states: 8
abstracting: (1<=p7)
states: 8
abstracting: (1<=p1)
states: 13
abstracting: (1<=p0)
states: 18
abstracting: (p2<=0)
states: 20
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
..-> the formula is TRUE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: AX [[[~ [E [1<=p2 U EG [1<=p6]]] & EX [~ [E [[1<=p3 & 1<=p5] U 1<=p7]]]] & [AG [~ [A [[1<=p2 | 1<=p6] U [1<=p3 & [1<=p5 & 1<=p6]]]]] & [E [1<=p6 U [1<=p3 & 1<=p5]] | AF [[p3<=0 | p4<=0]]]]]]
normalized: ~ [EX [~ [[[[~ [EG [~ [[p3<=0 | p4<=0]]]] | E [1<=p6 U [1<=p3 & 1<=p5]]] & ~ [E [true U [~ [EG [~ [[[1<=p5 & 1<=p6] & 1<=p3]]]] & ~ [E [~ [[[1<=p5 & 1<=p6] & 1<=p3]] U [~ [[1<=p2 | 1<=p6]] & ~ [[[1<=p5 & 1<=p6] & 1<=p3]]]]]]]]] & [EX [~ [E [[1<=p3 & 1<=p5] U 1<=p7]]] & ~ [E [1<=p2 U EG [1<=p6]]]]]]]]

abstracting: (1<=p6)
states: 8
..
EG iterations: 2
abstracting: (1<=p2)
states: 12
abstracting: (1<=p7)
states: 8
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
.abstracting: (1<=p3)
states: 13
abstracting: (1<=p6)
states: 8
abstracting: (1<=p5)
states: 30
abstracting: (1<=p6)
states: 8
abstracting: (1<=p2)
states: 12
abstracting: (1<=p3)
states: 13
abstracting: (1<=p6)
states: 8
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p6)
states: 8
abstracting: (1<=p5)
states: 30
..
EG iterations: 2
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p6)
states: 8
abstracting: (p4<=0)
states: 15
abstracting: (p3<=0)
states: 19
..
EG iterations: 2
.-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

checking: [EX [[[p0<=0 | p1<=0] & [EX [1<=p2] | [EX [[p3<=0 | p4<=0]] | [[AF [[p3<=0 | p4<=0]] | ~ [A [1<=p6 U [1<=p3 & 1<=p5]]]] & [EF [p6<=0] | p6<=0]]]]]] | [E [EG [1<=p6] U 1<=p2] & [AF [AX [[1<=p3 & 1<=p4]]] & AG [EF [[1<=p3 & 1<=p4]]]]]]
normalized: [EX [[[p0<=0 | p1<=0] & [[[[E [true U p6<=0] | p6<=0] & [~ [[~ [EG [~ [[1<=p3 & 1<=p5]]]] & ~ [E [~ [[1<=p3 & 1<=p5]] U [~ [1<=p6] & ~ [[1<=p3 & 1<=p5]]]]]]] | ~ [EG [~ [[p3<=0 | p4<=0]]]]]] | EX [[p3<=0 | p4<=0]]] | EX [1<=p2]]]] | [[~ [E [true U ~ [E [true U [1<=p3 & 1<=p4]]]]] & ~ [EG [EX [~ [[1<=p3 & 1<=p4]]]]]] & E [EG [1<=p6] U 1<=p2]]]

abstracting: (1<=p2)
states: 12
abstracting: (1<=p6)
states: 8
..
EG iterations: 2
abstracting: (1<=p4)
states: 17
abstracting: (1<=p3)
states: 13
...
EG iterations: 2
abstracting: (1<=p4)
states: 17
abstracting: (1<=p3)
states: 13
abstracting: (1<=p2)
states: 12
.abstracting: (p4<=0)
states: 15
abstracting: (p3<=0)
states: 19
.abstracting: (p4<=0)
states: 15
abstracting: (p3<=0)
states: 19
..
EG iterations: 2
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p6)
states: 8
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
abstracting: (1<=p5)
states: 30
abstracting: (1<=p3)
states: 13
....
EG iterations: 4
abstracting: (p6<=0)
states: 24
abstracting: (p6<=0)
states: 24
abstracting: (p1<=0)
states: 19
abstracting: (p0<=0)
states: 14
.-> the formula is FALSE

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLFireability-10 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS UNFOLDING_TO_PT

MC time: 0m 0.000sec

totally nodes used: 1099 (1.1e+03)
number of garbage collections: 0
fire ops cache: hits/miss/sum: 2766 3184 5950
used/not used/entry size/cache size: 4067 67104797 16 1024MB
basic ops cache: hits/miss/sum: 1250 1738 2988
used/not used/entry size/cache size: 3184 16774032 12 192MB
unary ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 16777216 8 128MB
abstract ops cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 16777216 12 192MB
state nr cache: hits/miss/sum: 215 192 407
used/not used/entry size/cache size: 192 8388416 32 256MB
max state cache: hits/miss/sum: 0 0 0
used/not used/entry size/cache size: 0 8388608 32 256MB
uniqueHash elements/entry size/size: 67108864 4 256MB
0 67107857
1 947
2 40
3 14
4 4
5 0
6 1
7 0
8 1
9 0
>= 10 0

Total processing time: 0m 4.412sec


BK_STOP 1679338788496

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
check for maximal unmarked siphon
ok
check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.000sec


iterations count:52 (8), effective:15 (2)

initing FirstDep: 0m 0.000sec


iterations count:10 (1), effective:2 (0)

iterations count:26 (4), effective:6 (1)

iterations count:40 (6), effective:13 (2)

iterations count:10 (1), effective:2 (0)

iterations count:21 (3), effective:5 (0)

iterations count:40 (6), effective:13 (2)

iterations count:23 (3), effective:6 (1)

iterations count:6 (1), effective:0 (0)

iterations count:6 (1), effective:0 (0)

iterations count:6 (1), effective:0 (0)

iterations count:13 (2), effective:2 (0)

iterations count:23 (3), effective:6 (1)

iterations count:17 (2), effective:3 (0)

iterations count:23 (3), effective:6 (1)

iterations count:8 (1), effective:2 (0)

iterations count:6 (1), effective:0 (0)

iterations count:20 (3), effective:5 (0)

iterations count:21 (3), effective:5 (0)

iterations count:15 (2), effective:3 (0)

iterations count:35 (5), effective:11 (1)

iterations count:17 (2), effective:3 (0)

iterations count:23 (3), effective:5 (0)

iterations count:26 (4), effective:7 (1)

iterations count:40 (6), effective:13 (2)

iterations count:6 (1), effective:0 (0)

iterations count:16 (2), effective:2 (0)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC00004vD"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marciexred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marciexred"
echo " Input is TwoPhaseLocking-PT-nC00004vD, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r490-tall-167912709100770"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC00004vD.tgz
mv TwoPhaseLocking-PT-nC00004vD execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;