About the Execution of LTSMin+red for Sudoku-COL-AN10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
14357.636 | 3600000.00 | 14198425.00 | 385.70 | ???F?F??T???TF?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r489-tall-167912706300074.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is Sudoku-COL-AN10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r489-tall-167912706300074
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 8.8K Feb 26 09:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K Feb 26 09:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 26 09:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 09:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:16 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 10:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Feb 26 10:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 09:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 112K Feb 26 09:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.5K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-00
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-01
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-02
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-03
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-04
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-05
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-06
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-07
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-08
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-09
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-10
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-11
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-12
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-13
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-14
FORMULA_NAME Sudoku-COL-AN10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679180748989
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-COL-AN10
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-18 23:05:50] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-18 23:05:50] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 23:05:50] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-18 23:05:50] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-18 23:05:51] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 637 ms
[2023-03-18 23:05:51] [INFO ] Imported 4 HL places and 1 HL transitions for a total of 1300 PT places and 1000.0 transition bindings in 11 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
[2023-03-18 23:05:51] [INFO ] Built PT skeleton of HLPN with 4 places and 1 transitions 4 arcs in 3 ms.
[2023-03-18 23:05:51] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 4 stabilizing places and 1 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 1
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 12 formulas.
FORMULA Sudoku-COL-AN10-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN10-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN10-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN10-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN10-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN10-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
All 16 properties of the HLPN use transition enablings in a way that makes the skeleton too coarse.
Domain [N(10), N(10)] of place Rows breaks symmetries in sort N
[2023-03-18 23:05:51] [INFO ] Unfolded HLPN to a Petri net with 1300 places and 1000 transitions 4000 arcs in 35 ms.
[2023-03-18 23:05:51] [INFO ] Unfolded 10 HLPN properties in 9 ms.
Support contains 300 out of 1300 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1300/1300 places, 1000/1000 transitions.
Reduce places removed 1000 places and 0 transitions.
Iterating post reduction 0 with 1000 rules applied. Total rules applied 1000 place count 300 transition count 1000
Applied a total of 1000 rules in 27 ms. Remains 300 /1300 variables (removed 1000) and now considering 1000/1000 (removed 0) transitions.
// Phase 1: matrix 1000 rows 300 cols
[2023-03-18 23:05:53] [INFO ] Computed 29 place invariants in 68 ms
[2023-03-18 23:05:53] [INFO ] Implicit Places using invariants in 284 ms returned []
[2023-03-18 23:05:53] [INFO ] Invariant cache hit.
[2023-03-18 23:05:54] [INFO ] Implicit Places using invariants and state equation in 312 ms returned []
Implicit Place search using SMT with State Equation took 621 ms to find 0 implicit places.
[2023-03-18 23:05:54] [INFO ] Invariant cache hit.
[2023-03-18 23:05:54] [INFO ] Dead Transitions using invariants and state equation in 389 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 300/1300 places, 1000/1000 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1038 ms. Remains : 300/1300 places, 1000/1000 transitions.
Support contains 300 out of 300 places after structural reductions.
[2023-03-18 23:05:56] [INFO ] Flatten gal took : 671 ms
[2023-03-18 23:06:00] [INFO ] Flatten gal took : 706 ms
[2023-03-18 23:06:05] [INFO ] Input system was already deterministic with 1000 transitions.
Incomplete random walk after 10000 steps, including 114 resets, run finished after 1082 ms. (steps per millisecond=9 ) properties (out of 10) seen :6
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 4681 ms. (steps per millisecond=2 ) properties (out of 4) seen :0
Interrupted Best-First random walk after 5811 steps, including 1 resets, run timeout after 5277 ms. (steps per millisecond=1 ) properties seen 0
Interrupted Best-First random walk after 5811 steps, including 1 resets, run timeout after 5474 ms. (steps per millisecond=1 ) properties seen 0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 4166 ms. (steps per millisecond=2 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-18 23:06:26] [INFO ] Invariant cache hit.
[2023-03-18 23:06:45] [INFO ] After 864ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 4 atomic propositions for a total of 10 simplifications.
[2023-03-18 23:06:46] [INFO ] Flatten gal took : 472 ms
[2023-03-18 23:06:51] [INFO ] Flatten gal took : 708 ms
[2023-03-18 23:06:54] [INFO ] Input system was already deterministic with 1000 transitions.
Computed a total of 300 stabilizing places and 1000 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 300 transition count 1000
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 3 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:55] [INFO ] Flatten gal took : 64 ms
[2023-03-18 23:06:55] [INFO ] Flatten gal took : 86 ms
[2023-03-18 23:06:55] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in LTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 2 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:55] [INFO ] Flatten gal took : 39 ms
[2023-03-18 23:06:55] [INFO ] Flatten gal took : 45 ms
[2023-03-18 23:06:55] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 13 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:56] [INFO ] Flatten gal took : 91 ms
[2023-03-18 23:06:56] [INFO ] Flatten gal took : 128 ms
[2023-03-18 23:06:56] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 8 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:57] [INFO ] Flatten gal took : 129 ms
[2023-03-18 23:06:57] [INFO ] Flatten gal took : 194 ms
[2023-03-18 23:06:57] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in LTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 3 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:58] [INFO ] Flatten gal took : 105 ms
[2023-03-18 23:06:58] [INFO ] Flatten gal took : 154 ms
[2023-03-18 23:06:58] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 20 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 35 ms
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 42 ms
[2023-03-18 23:06:59] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in LTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 2 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 34 ms
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 41 ms
[2023-03-18 23:06:59] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 7 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 36 ms
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 43 ms
[2023-03-18 23:06:59] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 7 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 76 ms
[2023-03-18 23:06:59] [INFO ] Flatten gal took : 106 ms
[2023-03-18 23:07:00] [INFO ] Input system was already deterministic with 1000 transitions.
Starting structural reductions in LTL mode, iteration 0 : 300/300 places, 1000/1000 transitions.
Applied a total of 0 rules in 2 ms. Remains 300 /300 variables (removed 0) and now considering 1000/1000 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 300/300 places, 1000/1000 transitions.
[2023-03-18 23:07:00] [INFO ] Flatten gal took : 40 ms
[2023-03-18 23:07:00] [INFO ] Flatten gal took : 53 ms
[2023-03-18 23:07:00] [INFO ] Input system was already deterministic with 1000 transitions.
[2023-03-18 23:07:01] [INFO ] Flatten gal took : 600 ms
[2023-03-18 23:07:05] [INFO ] Flatten gal took : 551 ms
[2023-03-18 23:07:08] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 174 ms.
[2023-03-18 23:07:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 300 places, 1000 transitions and 3000 arcs took 4 ms.
Total runtime 78490 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/482/ctl_0_ --ctl=/tmp/482/ctl_1_ --ctl=/tmp/482/ctl_2_ --ctl=/tmp/482/ctl_3_ --ctl=/tmp/482/ctl_4_ --ctl=/tmp/482/ctl_5_ --ctl=/tmp/482/ctl_6_ --ctl=/tmp/482/ctl_7_ --ctl=/tmp/482/ctl_8_ --ctl=/tmp/482/ctl_9_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 13020292 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16047632 kB
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-COL-AN10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is Sudoku-COL-AN10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r489-tall-167912706300074"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-COL-AN10.tgz
mv Sudoku-COL-AN10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;