Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704101210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z4T4N08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704101210
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 39K Feb 26 14:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 204K Feb 26 14:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 99K Feb 26 14:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 405K Feb 26 14:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 22K Feb 25 17:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 17:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Feb 25 17:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 25 17:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 57K Feb 26 14:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 296K Feb 26 14:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 123K Feb 26 14:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 474K Feb 26 14:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:26 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K Feb 25 17:26 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 255K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679240902947

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N08
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 15:48:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 15:48:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 15:48:24] [INFO ] Load time of PNML (sax parser for PT used): 66 ms
[2023-03-19 15:48:24] [INFO ] Transformed 302 places.
[2023-03-19 15:48:24] [INFO ] Transformed 600 transitions.
[2023-03-19 15:48:24] [INFO ] Parsed PT model containing 302 places and 600 transitions and 1928 arcs in 128 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
[2023-03-19 15:48:24] [INFO ] Reduced 24 identical enabling conditions.
Ensure Unique test removed 128 transitions
Reduce redundant transitions removed 128 transitions.
Support contains 302 out of 302 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 12 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
// Phase 1: matrix 472 rows 302 cols
[2023-03-19 15:48:24] [INFO ] Computed 19 place invariants in 30 ms
[2023-03-19 15:48:25] [INFO ] Implicit Places using invariants in 443 ms returned []
[2023-03-19 15:48:25] [INFO ] Invariant cache hit.
[2023-03-19 15:48:25] [INFO ] Implicit Places using invariants and state equation in 164 ms returned []
Implicit Place search using SMT with State Equation took 629 ms to find 0 implicit places.
[2023-03-19 15:48:25] [INFO ] Invariant cache hit.
[2023-03-19 15:48:25] [INFO ] Dead Transitions using invariants and state equation in 228 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 874 ms. Remains : 302/302 places, 472/472 transitions.
Support contains 302 out of 302 places after structural reductions.
[2023-03-19 15:48:26] [INFO ] Flatten gal took : 108 ms
[2023-03-19 15:48:26] [INFO ] Flatten gal took : 69 ms
[2023-03-19 15:48:26] [INFO ] Input system was already deterministic with 472 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 342 ms. (steps per millisecond=29 ) properties (out of 88) seen :83
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=769 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=833 ) properties (out of 3) seen :2
Running SMT prover for 1 properties.
[2023-03-19 15:48:27] [INFO ] Invariant cache hit.
[2023-03-19 15:48:27] [INFO ] [Real]Absence check using 19 positive place invariants in 16 ms returned sat
[2023-03-19 15:48:27] [INFO ] After 276ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-19 15:48:27] [INFO ] [Nat]Absence check using 19 positive place invariants in 139 ms returned sat
[2023-03-19 15:48:28] [INFO ] After 265ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-19 15:48:28] [INFO ] After 350ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 50 ms.
[2023-03-19 15:48:28] [INFO ] After 697ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Finished Parikh walk after 65 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=65 )
Parikh walk visited 1 properties in 3 ms.
[2023-03-19 15:48:28] [INFO ] Flatten gal took : 40 ms
[2023-03-19 15:48:28] [INFO ] Flatten gal took : 57 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 472 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 14 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 206/302 places, 376/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 17 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 18 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 54 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 54 ms. Remains : 206/302 places, 376/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 33 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 50 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 29 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 206/302 places, 376/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 28 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 29 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 33 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 206/302 places, 376/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 22 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 37 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 2 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 302/302 places, 472/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 32 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 40 ms
[2023-03-19 15:48:29] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 2 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 302/302 places, 472/472 transitions.
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 15 ms
[2023-03-19 15:48:29] [INFO ] Flatten gal took : 17 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 206 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 206 transition count 376
Applied a total of 192 rules in 13 ms. Remains 206 /302 variables (removed 96) and now considering 376/472 (removed 96) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 206/302 places, 376/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 11 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 11 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 376 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 2 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 302/302 places, 472/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 32 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 35 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 472 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 94 places :
Symmetric choice reduction at 0 with 94 rule applications. Total rules 94 place count 208 transition count 378
Iterating global reduction 0 with 94 rules applied. Total rules applied 188 place count 208 transition count 378
Applied a total of 188 rules in 6 ms. Remains 208 /302 variables (removed 94) and now considering 378/472 (removed 94) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 208/302 places, 378/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 12 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 378 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Performed 125 Post agglomeration using F-continuation condition.Transition count delta: 125
Iterating post reduction 0 with 125 rules applied. Total rules applied 125 place count 302 transition count 347
Reduce places removed 125 places and 0 transitions.
Ensure Unique test removed 30 transitions
Reduce isomorphic transitions removed 30 transitions.
Iterating post reduction 1 with 155 rules applied. Total rules applied 280 place count 177 transition count 317
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 280 place count 177 transition count 285
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 344 place count 145 transition count 285
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 2 with 16 rules applied. Total rules applied 360 place count 137 transition count 277
Applied a total of 360 rules in 76 ms. Remains 137 /302 variables (removed 165) and now considering 277/472 (removed 195) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 78 ms. Remains : 137/302 places, 277/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 8 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 25 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 277 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 95 places :
Symmetric choice reduction at 0 with 95 rule applications. Total rules 95 place count 207 transition count 377
Iterating global reduction 0 with 95 rules applied. Total rules applied 190 place count 207 transition count 377
Applied a total of 190 rules in 7 ms. Remains 207 /302 variables (removed 95) and now considering 377/472 (removed 95) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 207/302 places, 377/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 28 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 377 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 94 places :
Symmetric choice reduction at 0 with 94 rule applications. Total rules 94 place count 208 transition count 378
Iterating global reduction 0 with 94 rules applied. Total rules applied 188 place count 208 transition count 378
Applied a total of 188 rules in 6 ms. Remains 208 /302 variables (removed 94) and now considering 378/472 (removed 94) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 208/302 places, 378/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 11 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 378 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 89 places :
Symmetric choice reduction at 0 with 89 rule applications. Total rules 89 place count 213 transition count 383
Iterating global reduction 0 with 89 rules applied. Total rules applied 178 place count 213 transition count 383
Applied a total of 178 rules in 5 ms. Remains 213 /302 variables (removed 89) and now considering 383/472 (removed 89) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 213/302 places, 383/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 26 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 27 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 383 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 95 places :
Symmetric choice reduction at 0 with 95 rule applications. Total rules 95 place count 207 transition count 377
Iterating global reduction 0 with 95 rules applied. Total rules applied 190 place count 207 transition count 377
Applied a total of 190 rules in 5 ms. Remains 207 /302 variables (removed 95) and now considering 377/472 (removed 95) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 207/302 places, 377/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 27 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 377 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Performed 125 Post agglomeration using F-continuation condition.Transition count delta: 125
Iterating post reduction 0 with 125 rules applied. Total rules applied 125 place count 302 transition count 347
Reduce places removed 125 places and 0 transitions.
Ensure Unique test removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 1 with 156 rules applied. Total rules applied 281 place count 177 transition count 316
Performed 30 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 30 Pre rules applied. Total rules applied 281 place count 177 transition count 286
Deduced a syphon composed of 30 places in 1 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 341 place count 147 transition count 286
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 342 place count 146 transition count 254
Iterating global reduction 2 with 1 rules applied. Total rules applied 343 place count 146 transition count 254
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 351 place count 138 transition count 246
Iterating global reduction 2 with 8 rules applied. Total rules applied 359 place count 138 transition count 246
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 366 place count 131 transition count 232
Iterating global reduction 2 with 7 rules applied. Total rules applied 373 place count 131 transition count 232
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 377 place count 127 transition count 220
Iterating global reduction 2 with 4 rules applied. Total rules applied 381 place count 127 transition count 220
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 385 place count 127 transition count 216
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 401 place count 119 transition count 208
Applied a total of 401 rules in 59 ms. Remains 119 /302 variables (removed 183) and now considering 208/472 (removed 264) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 60 ms. Remains : 119/302 places, 208/472 transitions.
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 5 ms
[2023-03-19 15:48:30] [INFO ] Flatten gal took : 12 ms
[2023-03-19 15:48:30] [INFO ] Input system was already deterministic with 208 transitions.
Starting structural reductions in LTL mode, iteration 0 : 302/302 places, 472/472 transitions.
Discarding 94 places :
Symmetric choice reduction at 0 with 94 rule applications. Total rules 94 place count 208 transition count 378
Iterating global reduction 0 with 94 rules applied. Total rules applied 188 place count 208 transition count 378
Applied a total of 188 rules in 6 ms. Remains 208 /302 variables (removed 94) and now considering 378/472 (removed 94) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 208/302 places, 378/472 transitions.
[2023-03-19 15:48:31] [INFO ] Flatten gal took : 19 ms
[2023-03-19 15:48:31] [INFO ] Flatten gal took : 11 ms
[2023-03-19 15:48:31] [INFO ] Input system was already deterministic with 378 transitions.
[2023-03-19 15:48:31] [INFO ] Flatten gal took : 53 ms
[2023-03-19 15:48:31] [INFO ] Flatten gal took : 44 ms
[2023-03-19 15:48:31] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 23 ms.
[2023-03-19 15:48:31] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 302 places, 472 transitions and 1416 arcs took 2 ms.
Total runtime 7367 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T4N08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA UtilityControlRoom-PT-Z4T4N08-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N08-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N08-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N08-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N08-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679241417873

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/224 6/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 1075296 m, 215059 m/sec, 2136814 t fired, .

Time elapsed: 15 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/224 11/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 2144021 m, 213745 m/sec, 4267643 t fired, .

Time elapsed: 20 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/224 16/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 3176525 m, 206500 m/sec, 6365553 t fired, .

Time elapsed: 25 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/224 21/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 4186218 m, 201938 m/sec, 8498704 t fired, .

Time elapsed: 30 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/224 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 4997397 m, 162235 m/sec, 10727824 t fired, .

Time elapsed: 35 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/224 29/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 5918756 m, 184271 m/sec, 12849690 t fired, .

Time elapsed: 40 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 45 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15
lola: time limit : 237 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 5/237 7/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 1224556 m, 244911 m/sec, 1626417 t fired, .

Time elapsed: 50 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 10/237 13/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 2314198 m, 217928 m/sec, 3167713 t fired, .

Time elapsed: 55 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 15/237 18/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 3317882 m, 200736 m/sec, 4648045 t fired, .

Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 20/237 23/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 4287981 m, 194019 m/sec, 6089098 t fired, .

Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 25/237 28/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 5223183 m, 187040 m/sec, 7496761 t fired, .

Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 46 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 75 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 40 (type EXCL) for 39 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13
lola: time limit : 251 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 5/251 5/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 676691 m, 135338 m/sec, 1951493 t fired, .

Time elapsed: 80 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 10/251 8/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 1276361 m, 119934 m/sec, 3715656 t fired, .

Time elapsed: 85 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 15/251 12/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 1845061 m, 113740 m/sec, 5397624 t fired, .

Time elapsed: 90 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 20/251 15/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 2406300 m, 112247 m/sec, 7061235 t fired, .

Time elapsed: 95 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 25/251 19/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 2941559 m, 107051 m/sec, 8651652 t fired, .

Time elapsed: 100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 30/251 22/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 3458195 m, 103327 m/sec, 10193052 t fired, .

Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 35/251 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 3974509 m, 103262 m/sec, 11732367 t fired, .

Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 40/251 28/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 4479504 m, 100999 m/sec, 13239689 t fired, .

Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 45/251 31/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 4976778 m, 99454 m/sec, 14729658 t fired, .

Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 40 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 UtilityControlRoom-PT-Z4T4N08-CTLFireability-12
lola: time limit : 267 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-12
lola: result : true
lola: markings : 164
lola: fired transitions : 199
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 UtilityControlRoom-PT-Z4T4N08-CTLFireability-11
lola: time limit : 289 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-11
lola: result : false
lola: markings : 8384
lola: fired transitions : 11236
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-PT-Z4T4N08-CTLFireability-10
lola: time limit : 315 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-10
lola: result : false
lola: markings : 93
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-PT-Z4T4N08-CTLFireability-08
lola: time limit : 347 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-08
lola: result : false
lola: markings : 9
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07
lola: time limit : 386 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/386 6/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 1143466 m, 228693 m/sec, 2257235 t fired, .

Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/386 11/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 2242255 m, 219757 m/sec, 4468513 t fired, .

Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/386 16/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 3312023 m, 213953 m/sec, 6634412 t fired, .

Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 20/386 21/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 4290340 m, 195663 m/sec, 8793430 t fired, .

Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 25/386 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 5141189 m, 170169 m/sec, 11049876 t fired, .

Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 30/386 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 6055770 m, 182916 m/sec, 13202041 t fired, .

Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 22 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05
lola: time limit : 430 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/430 7/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 1102734 m, 220546 m/sec, 1863007 t fired, .

Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/430 14/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 2116846 m, 202822 m/sec, 3604289 t fired, .

Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/430 19/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 3065016 m, 189634 m/sec, 5263034 t fired, .

Time elapsed: 175 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/430 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 3998198 m, 186636 m/sec, 6892954 t fired, .

Time elapsed: 180 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/430 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 4898774 m, 180115 m/sec, 8507619 t fired, .

Time elapsed: 185 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 190 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04
lola: time limit : 487 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/487 6/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 902728 m, 180545 m/sec, 1668785 t fired, .

Time elapsed: 195 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/487 11/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 1685635 m, 156581 m/sec, 3156131 t fired, .

Time elapsed: 200 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/487 15/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 2424884 m, 147849 m/sec, 4565375 t fired, .

Time elapsed: 205 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/487 20/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 3135066 m, 142036 m/sec, 5926510 t fired, .

Time elapsed: 210 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/487 24/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 3816122 m, 136211 m/sec, 7239860 t fired, .

Time elapsed: 215 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/487 28/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 4489260 m, 134627 m/sec, 8538816 t fired, .

Time elapsed: 220 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/487 32/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 5145605 m, 131269 m/sec, 9806534 t fired, .

Time elapsed: 225 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 230 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03
lola: time limit : 561 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/561 7/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 1025976 m, 205195 m/sec, 1532037 t fired, .

Time elapsed: 235 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/561 13/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 1974388 m, 189682 m/sec, 2973564 t fired, .

Time elapsed: 240 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/561 19/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 2899200 m, 184962 m/sec, 4377434 t fired, .

Time elapsed: 245 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/561 24/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 3799797 m, 180119 m/sec, 5760842 t fired, .

Time elapsed: 250 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/561 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 4684385 m, 176917 m/sec, 7119198 t fired, .

Time elapsed: 255 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 260 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02
lola: time limit : 668 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/668 3/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 368984 m, 73796 m/sec, 2067392 t fired, .

Time elapsed: 265 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/668 5/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 712034 m, 68610 m/sec, 4040759 t fired, .

Time elapsed: 270 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/668 7/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 1040771 m, 65747 m/sec, 5970480 t fired, .

Time elapsed: 275 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/668 9/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 1380468 m, 67939 m/sec, 7907009 t fired, .

Time elapsed: 280 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/668 11/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 1700048 m, 63916 m/sec, 9774360 t fired, .

Time elapsed: 285 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/668 12/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 2010284 m, 62047 m/sec, 11614497 t fired, .

Time elapsed: 290 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/668 14/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 2319007 m, 61744 m/sec, 13434574 t fired, .

Time elapsed: 295 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/668 16/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 2618673 m, 59933 m/sec, 15224438 t fired, .

Time elapsed: 300 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/668 18/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 2919228 m, 60111 m/sec, 17005740 t fired, .

Time elapsed: 305 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/668 19/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 3216828 m, 59520 m/sec, 18779255 t fired, .

Time elapsed: 310 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 55/668 21/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 3520641 m, 60762 m/sec, 20558250 t fired, .

Time elapsed: 315 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 60/668 23/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 3813019 m, 58475 m/sec, 22309893 t fired, .

Time elapsed: 320 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/668 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 4111699 m, 59736 m/sec, 24076616 t fired, .

Time elapsed: 325 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 70/668 26/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 4405347 m, 58729 m/sec, 25829038 t fired, .

Time elapsed: 330 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 75/668 28/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 4694338 m, 57798 m/sec, 27555786 t fired, .

Time elapsed: 335 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 80/668 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 4977725 m, 56677 m/sec, 29261342 t fired, .

Time elapsed: 340 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 85/668 31/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 5261958 m, 56846 m/sec, 30967435 t fired, .

Time elapsed: 345 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 350 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00
lola: time limit : 812 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/812 5/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 780748 m, 156149 m/sec, 2005723 t fired, .

Time elapsed: 355 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/812 9/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 1452246 m, 134299 m/sec, 3984209 t fired, .

Time elapsed: 360 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/812 13/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 2140498 m, 137650 m/sec, 5942382 t fired, .

Time elapsed: 365 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/812 16/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 2814241 m, 134748 m/sec, 7875259 t fired, .

Time elapsed: 370 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/812 20/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 3431275 m, 123406 m/sec, 9775542 t fired, .

Time elapsed: 375 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/812 23/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 4092737 m, 132292 m/sec, 11624520 t fired, .

Time elapsed: 380 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/812 27/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 4725815 m, 126615 m/sec, 13535274 t fired, .

Time elapsed: 385 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/812 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 5366449 m, 128126 m/sec, 15384350 t fired, .

Time elapsed: 390 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 395 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 43 (type EXCL) for 42 UtilityControlRoom-PT-Z4T4N08-CTLFireability-14
lola: time limit : 1068 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-14
lola: result : true
lola: markings : 49
lola: fired transitions : 98
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06
lola: time limit : 1602 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/1602 5/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 840559 m, 168111 m/sec, 1905831 t fired, .

Time elapsed: 400 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/1602 9/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 1643835 m, 160655 m/sec, 3752085 t fired, .

Time elapsed: 405 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/1602 13/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 2422840 m, 155801 m/sec, 5586063 t fired, .

Time elapsed: 410 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/1602 17/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 3141116 m, 143655 m/sec, 7447592 t fired, .

Time elapsed: 415 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/1602 21/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 3874705 m, 146717 m/sec, 9354387 t fired, .

Time elapsed: 420 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/1602 24/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 4604934 m, 146045 m/sec, 11214764 t fired, .

Time elapsed: 425 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 35/1602 28/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 5321723 m, 143357 m/sec, 13060246 t fired, .

Time elapsed: 430 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 40/1602 32/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 6023775 m, 140410 m/sec, 14902597 t fired, .

Time elapsed: 435 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 440 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09
lola: time limit : 3160 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/3160 4/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 784408 m, 156881 m/sec, 2865861 t fired, .

Time elapsed: 445 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/3160 7/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 1464120 m, 135942 m/sec, 5638958 t fired, .

Time elapsed: 450 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 15/3160 10/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 2109842 m, 129144 m/sec, 8358391 t fired, .

Time elapsed: 455 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 20/3160 12/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 2730993 m, 124230 m/sec, 11046924 t fired, .

Time elapsed: 460 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 25/3160 15/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 3339296 m, 121660 m/sec, 13701930 t fired, .

Time elapsed: 465 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 30/3160 18/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 3932267 m, 118594 m/sec, 16332494 t fired, .

Time elapsed: 470 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 35/3160 20/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 4514963 m, 116539 m/sec, 18949761 t fired, .

Time elapsed: 475 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 40/3160 23/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 5088145 m, 114636 m/sec, 21544036 t fired, .

Time elapsed: 480 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 45/3160 25/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 5657230 m, 113817 m/sec, 24116614 t fired, .

Time elapsed: 485 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 50/3160 27/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 6216739 m, 111901 m/sec, 26691537 t fired, .

Time elapsed: 490 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 55/3160 30/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 6774944 m, 111641 m/sec, 29263907 t fired, .

Time elapsed: 495 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 60/3160 32/32 UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 7326272 m, 110265 m/sec, 31836168 t fired, .

Time elapsed: 500 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 28 (type EXCL) for UtilityControlRoom-PT-Z4T4N08-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 505 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N08-CTLFireability-00: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-01: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-02: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-03: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-04: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-05: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-06: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-07: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-09: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-13: CTL unknown AGGR
UtilityControlRoom-PT-Z4T4N08-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N08-CTLFireability-15: CTL unknown AGGR


Time elapsed: 505 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z4T4N08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704101210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N08.tgz
mv UtilityControlRoom-PT-Z4T4N08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;