Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704101193.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z4T4N04, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704101193
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 20K Feb 26 14:33 CTLCardinality.txt
-rw-r--r-- 1 mcc users 111K Feb 26 14:33 CTLCardinality.xml
-rw-r--r-- 1 mcc users 51K Feb 26 14:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 184K Feb 26 14:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 14:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 26 14:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 94K Feb 26 14:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 357K Feb 26 14:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.4K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 128K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679238873954

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 15:14:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 15:14:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 15:14:35] [INFO ] Load time of PNML (sax parser for PT used): 48 ms
[2023-03-19 15:14:35] [INFO ] Transformed 154 places.
[2023-03-19 15:14:35] [INFO ] Transformed 300 transitions.
[2023-03-19 15:14:35] [INFO ] Parsed PT model containing 154 places and 300 transitions and 964 arcs in 109 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 14 ms.
Ensure Unique test removed 64 transitions
Reduce redundant transitions removed 64 transitions.
Support contains 154 out of 154 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Applied a total of 0 rules in 8 ms. Remains 154 /154 variables (removed 0) and now considering 236/236 (removed 0) transitions.
// Phase 1: matrix 236 rows 154 cols
[2023-03-19 15:14:35] [INFO ] Computed 11 place invariants in 22 ms
[2023-03-19 15:14:35] [INFO ] Implicit Places using invariants in 378 ms returned []
[2023-03-19 15:14:35] [INFO ] Invariant cache hit.
[2023-03-19 15:14:36] [INFO ] Implicit Places using invariants and state equation in 104 ms returned []
Implicit Place search using SMT with State Equation took 509 ms to find 0 implicit places.
[2023-03-19 15:14:36] [INFO ] Invariant cache hit.
[2023-03-19 15:14:36] [INFO ] Dead Transitions using invariants and state equation in 144 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 663 ms. Remains : 154/154 places, 236/236 transitions.
Support contains 154 out of 154 places after structural reductions.
[2023-03-19 15:14:36] [INFO ] Flatten gal took : 41 ms
[2023-03-19 15:14:36] [INFO ] Flatten gal took : 17 ms
[2023-03-19 15:14:36] [INFO ] Input system was already deterministic with 236 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 500 ms. (steps per millisecond=20 ) properties (out of 53) seen :19
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 3 ms. (steps per millisecond=333 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Running SMT prover for 34 properties.
[2023-03-19 15:14:37] [INFO ] Invariant cache hit.
[2023-03-19 15:14:37] [INFO ] After 170ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:33
[2023-03-19 15:14:37] [INFO ] [Nat]Absence check using 11 positive place invariants in 8 ms returned sat
[2023-03-19 15:14:37] [INFO ] After 165ms SMT Verify possible using all constraints in natural domain returned unsat :34 sat :0
Fused 34 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 34 atomic propositions for a total of 16 simplifications.
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 15:14:37] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 29 ms
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 13 ms
[2023-03-19 15:14:37] [INFO ] Input system was already deterministic with 236 transitions.
Support contains 66 out of 154 places (down from 154) after GAL structural reductions.
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 14 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 106/154 places, 188/236 transitions.
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 13 ms
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 12 ms
[2023-03-19 15:14:37] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 21 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 106/154 places, 188/236 transitions.
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 14 ms
[2023-03-19 15:14:37] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 8 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 106/154 places, 188/236 transitions.
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 9 ms
[2023-03-19 15:14:37] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 179 place count 71 transition count 92
Iterating global reduction 2 with 3 rules applied. Total rules applied 182 place count 71 transition count 92
Applied a total of 182 rules in 18 ms. Remains 71 /154 variables (removed 83) and now considering 92/236 (removed 144) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 71/154 places, 92/236 transitions.
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 4 ms
[2023-03-19 15:14:37] [INFO ] Flatten gal took : 4 ms
[2023-03-19 15:14:37] [INFO ] Input system was already deterministic with 92 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Drop transitions removed 59 transitions
Trivial Post-agglo rules discarded 59 transitions
Performed 59 trivial Post agglomeration. Transition count delta: 59
Iterating post reduction 0 with 59 rules applied. Total rules applied 59 place count 154 transition count 177
Reduce places removed 59 places and 0 transitions.
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 1 with 73 rules applied. Total rules applied 132 place count 95 transition count 163
Performed 15 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 15 Pre rules applied. Total rules applied 132 place count 95 transition count 148
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 2 with 30 rules applied. Total rules applied 162 place count 80 transition count 148
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 165 place count 77 transition count 145
Iterating global reduction 2 with 3 rules applied. Total rules applied 168 place count 77 transition count 145
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 170 place count 75 transition count 113
Iterating global reduction 2 with 2 rules applied. Total rules applied 172 place count 75 transition count 113
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 179 place count 68 transition count 106
Iterating global reduction 2 with 7 rules applied. Total rules applied 186 place count 68 transition count 106
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 193 place count 61 transition count 92
Iterating global reduction 2 with 7 rules applied. Total rules applied 200 place count 61 transition count 92
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 207 place count 54 transition count 78
Iterating global reduction 2 with 7 rules applied. Total rules applied 214 place count 54 transition count 78
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 221 place count 54 transition count 71
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 229 place count 50 transition count 67
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 5 places and 0 transitions.
Iterating global reduction 3 with 9 rules applied. Total rules applied 238 place count 45 transition count 63
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 254 place count 37 transition count 55
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 255 place count 37 transition count 54
Applied a total of 255 rules in 47 ms. Remains 37 /154 variables (removed 117) and now considering 54/236 (removed 182) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 37/154 places, 54/236 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 3 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 5 ms
[2023-03-19 15:14:38] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 48 places :
Symmetric choice reduction at 0 with 48 rule applications. Total rules 48 place count 106 transition count 188
Iterating global reduction 0 with 48 rules applied. Total rules applied 96 place count 106 transition count 188
Applied a total of 96 rules in 13 ms. Remains 106 /154 variables (removed 48) and now considering 188/236 (removed 48) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 106/154 places, 188/236 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 26 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 9 ms
[2023-03-19 15:14:38] [INFO ] Input system was already deterministic with 188 transitions.
Starting structural reductions in LTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Discarding 44 places :
Symmetric choice reduction at 0 with 44 rule applications. Total rules 44 place count 110 transition count 192
Iterating global reduction 0 with 44 rules applied. Total rules applied 88 place count 110 transition count 192
Applied a total of 88 rules in 4 ms. Remains 110 /154 variables (removed 44) and now considering 192/236 (removed 44) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 110/154 places, 192/236 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 23 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 14 ms
[2023-03-19 15:14:38] [INFO ] Input system was already deterministic with 192 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Drop transitions removed 64 transitions
Trivial Post-agglo rules discarded 64 transitions
Performed 64 trivial Post agglomeration. Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 154 transition count 172
Reduce places removed 64 places and 0 transitions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Iterating post reduction 1 with 80 rules applied. Total rules applied 144 place count 90 transition count 156
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 144 place count 90 transition count 140
Deduced a syphon composed of 16 places in 0 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 176 place count 74 transition count 140
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 179 place count 71 transition count 92
Iterating global reduction 2 with 3 rules applied. Total rules applied 182 place count 71 transition count 92
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 193 place count 60 transition count 81
Iterating global reduction 2 with 11 rules applied. Total rules applied 204 place count 60 transition count 81
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 215 place count 49 transition count 59
Iterating global reduction 2 with 11 rules applied. Total rules applied 226 place count 49 transition count 59
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 237 place count 38 transition count 48
Iterating global reduction 2 with 11 rules applied. Total rules applied 248 place count 38 transition count 48
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 2 with 11 rules applied. Total rules applied 259 place count 38 transition count 37
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 259 place count 38 transition count 34
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 265 place count 35 transition count 34
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 271 place count 32 transition count 31
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 279 place count 28 transition count 27
Applied a total of 279 rules in 12 ms. Remains 28 /154 variables (removed 126) and now considering 27/236 (removed 209) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 28/154 places, 27/236 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 2 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 2 ms
[2023-03-19 15:14:38] [INFO ] Input system was already deterministic with 27 transitions.
Finished random walk after 11 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=11 )
FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 154/154 places, 236/236 transitions.
Drop transitions removed 60 transitions
Trivial Post-agglo rules discarded 60 transitions
Performed 60 trivial Post agglomeration. Transition count delta: 60
Iterating post reduction 0 with 60 rules applied. Total rules applied 60 place count 154 transition count 176
Reduce places removed 60 places and 0 transitions.
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 1 with 75 rules applied. Total rules applied 135 place count 94 transition count 161
Performed 14 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 135 place count 94 transition count 147
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 14 places and 0 transitions.
Iterating global reduction 2 with 28 rules applied. Total rules applied 163 place count 80 transition count 147
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 166 place count 77 transition count 144
Iterating global reduction 2 with 3 rules applied. Total rules applied 169 place count 77 transition count 144
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 171 place count 75 transition count 112
Iterating global reduction 2 with 2 rules applied. Total rules applied 173 place count 75 transition count 112
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 180 place count 68 transition count 105
Iterating global reduction 2 with 7 rules applied. Total rules applied 187 place count 68 transition count 105
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 193 place count 62 transition count 93
Iterating global reduction 2 with 6 rules applied. Total rules applied 199 place count 62 transition count 93
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 205 place count 56 transition count 81
Iterating global reduction 2 with 6 rules applied. Total rules applied 211 place count 56 transition count 81
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 217 place count 56 transition count 75
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 223 place count 53 transition count 72
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 229 place count 50 transition count 69
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 230 place count 50 transition count 68
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 231 place count 49 transition count 58
Iterating global reduction 3 with 1 rules applied. Total rules applied 232 place count 49 transition count 58
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 236 place count 45 transition count 54
Iterating global reduction 3 with 4 rules applied. Total rules applied 240 place count 45 transition count 54
Discarding 4 places :
Symmetric choice reduction at 3 with 4 rule applications. Total rules 244 place count 41 transition count 46
Iterating global reduction 3 with 4 rules applied. Total rules applied 248 place count 41 transition count 46
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 251 place count 38 transition count 43
Iterating global reduction 3 with 3 rules applied. Total rules applied 254 place count 38 transition count 43
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 257 place count 38 transition count 40
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2 Pre rules applied. Total rules applied 257 place count 38 transition count 38
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 4 with 4 rules applied. Total rules applied 261 place count 36 transition count 38
Applied a total of 261 rules in 18 ms. Remains 36 /154 variables (removed 118) and now considering 38/236 (removed 198) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 36/154 places, 38/236 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 1 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 2 ms
[2023-03-19 15:14:38] [INFO ] Input system was already deterministic with 38 transitions.
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 10 ms
[2023-03-19 15:14:38] [INFO ] Flatten gal took : 8 ms
[2023-03-19 15:14:38] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-19 15:14:38] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 154 places, 236 transitions and 708 arcs took 2 ms.
Total runtime 2908 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T4N04
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679238928215

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:236
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:287
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 16 (type CNST) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 1 (type CNST) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00
lola: result : true
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type CNST) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:730
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 5/720 4/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 990429 m, 198085 m/sec, 2703638 t fired, .

Time elapsed: 5 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 10/720 7/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 1774684 m, 156851 m/sec, 5343014 t fired, .

Time elapsed: 10 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 15/720 10/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 2439407 m, 132944 m/sec, 8076035 t fired, .

Time elapsed: 15 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 20/720 12/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3039404 m, 119999 m/sec, 10994043 t fired, .

Time elapsed: 20 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 25/720 14/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3560273 m, 104173 m/sec, 14158472 t fired, .

Time elapsed: 25 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 30/720 16/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3942463 m, 76438 m/sec, 18928531 t fired, .

Time elapsed: 30 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 35/720 16/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3971783 m, 5864 m/sec, 22873645 t fired, .

Time elapsed: 35 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 40/720 16/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3975386 m, 720 m/sec, 26734418 t fired, .

Time elapsed: 40 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 8
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 AGEF EXCL 45/720 16/32 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06 3977963 m, 515 m/sec, 30761331 t fired, .

Time elapsed: 45 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 8
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06
lola: result : true
lola: markings : 3981312
lola: fired transitions : 34276608
lola: time used : 49.000000
lola: memory pages used : 16
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12
lola: time limit : 887 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12
lola: result : true
lola: markings : 25
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15
lola: time limit : 1183 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15
lola: result : true
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04
lola: time limit : 1775 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04
lola: result : false
lola: markings : 30
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09
lola: time limit : 3551 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09
lola: result : false
lola: markings : 39
lola: fired transitions : 120
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-00: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-05: INITIAL false preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-06: AGEF true tscc_search
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-09: CTL false CTL model checker
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-10: INITIAL true preprocessing
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T4N04-CTLCardinality-15: EFEG true state space /EFEG


Time elapsed: 49 secs. Pages in use: 16

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N04"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z4T4N04, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704101193"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N04.tgz
mv UtilityControlRoom-PT-Z4T4N04 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;