fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912704001150
Last Updated
May 14, 2023

About the Execution of LoLa+red for UtilityControlRoom-PT-Z2T4N08

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
663.268 153389.00 592067.00 258.90 TFTFFFTFTTTTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704001150.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z2T4N08, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704001150
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 28K Feb 26 14:36 CTLCardinality.txt
-rw-r--r-- 1 mcc users 150K Feb 26 14:36 CTLCardinality.xml
-rw-r--r-- 1 mcc users 37K Feb 26 14:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 159K Feb 26 14:34 CTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 17K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 46K Feb 26 14:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 243K Feb 26 14:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 66K Feb 26 14:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 280K Feb 26 14:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.4K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 93K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679233877002

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T4N08
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:51:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 13:51:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:51:18] [INFO ] Load time of PNML (sax parser for PT used): 42 ms
[2023-03-19 13:51:18] [INFO ] Transformed 140 places.
[2023-03-19 13:51:18] [INFO ] Transformed 216 transitions.
[2023-03-19 13:51:18] [INFO ] Parsed PT model containing 140 places and 216 transitions and 680 arcs in 104 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 20 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 32 transitions
Reduce redundant transitions removed 32 transitions.
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 421 ms. (steps per millisecond=23 ) properties (out of 15) seen :1
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 103 ms. (steps per millisecond=97 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 139 ms. (steps per millisecond=71 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 53 ms. (steps per millisecond=188 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 14) seen :0
Interrupted probabilistic random walk after 153574 steps, run timeout after 3001 ms. (steps per millisecond=51 ) properties seen :{}
Probabilistic random walk after 153574 steps, saw 112233 distinct states, run finished after 3002 ms. (steps per millisecond=51 ) properties seen :0
Running SMT prover for 14 properties.
// Phase 1: matrix 184 rows 140 cols
[2023-03-19 13:51:22] [INFO ] Computed 19 place invariants in 11 ms
[2023-03-19 13:51:23] [INFO ] After 242ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:14
[2023-03-19 13:51:23] [INFO ] [Nat]Absence check using 19 positive place invariants in 5 ms returned sat
[2023-03-19 13:51:23] [INFO ] After 118ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :0
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 5154 ms.
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T4N08
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679234030391

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: result : false
lola: markings : 371
lola: fired transitions : 668
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type SKEL/FNDP) for 6 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 6 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: result : false
lola: markings : 867
lola: fired transitions : 1768
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 58 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 59 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 61 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type SKEL/FNDP) for 9 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 9 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: result : false
lola: markings : 746
lola: fired transitions : 1801
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 65 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 66 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 69 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
lola: planning for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02 stopped (result already fixed).
lola: LAUNCH task # 72 (type SKEL/FNDP) for 15 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic
lola:
planning for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03 stopped (result already fixed).
lola: LAUNCH task # 73 (type SKEL/EQUN) for 15 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.

lola: FINISHED task # 75 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: result : false
lola: markings : 566
lola: fired transitions : 905
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 73 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 76 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 (obsolete)
lola: FINISHED task # 73 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 66 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03
lola: result : false
lola: FINISHED task # 72 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 1114
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
lola: FINISHED task # 51 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 82 (type SKEL/FNDP) for 18 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/EQUN) for 18 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-83.sara.
lola: Created skeleton in 0.000000 secs.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 85 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: result : false
lola: markings : 3750
lola: fired transitions : 12716
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 82 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 83 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 86 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 133 (type EXCL) for 39 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 103 (type FNDP) for 33 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type EQUN) for 33 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: planning for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05 stopped (result already fixed).
lola: FINISHED task # 83 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 82 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 20586
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 4 (type CNST) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01
lola: result : false
lola: LAUNCH task # 153 (type FNDP) for 24 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 105 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11
lola: result : false
lola: CANCELED task # 103 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 104 (type FNDP) for 21 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type EQUN) for 21 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 103 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 50475
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 116 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 104 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 123 (type SKEL/FNDP) for 27 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/EQUN) for 27 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 104 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 8751
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 124 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 123 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 184 (type FNDP) for 45 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 186 (type EQUN) for 45 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 123 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 10763
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711

lola: FINISHED task # 59 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 133 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13
lola: result : false
lola: markings : 85887
lola: fired transitions : 243966
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 140 (type EXCL) for 42 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 140 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14
lola: result : true
lola: markings : 13
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 164 (type EXCL) for 36 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12
lola: time limit : 719 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-186.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 5/449 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 3457072 t fired, 4 attempts, .
164 EF EXCL 4/719 1/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 149443 m, 29888 m/sec, 230086 t fired, .
184 EF FNDP 4/449 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 552242 t fired, 1 attempts, .
186 EF STEQ 4/399 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 10/445 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 5664189 t fired, 6 attempts, .
164 EF EXCL 9/719 2/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 362139 m, 42539 m/sec, 597897 t fired, .
184 EF FNDP 9/445 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 1080114 t fired, 2 attempts, .
186 EF STEQ 9/395 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

Time elapsed: 10 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 15/440 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 8380543 t fired, 9 attempts, .
164 EF EXCL 14/719 3/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 582521 m, 44076 m/sec, 1008924 t fired, .
184 EF FNDP 14/440 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 1547781 t fired, 2 attempts, .
186 EF STEQ 14/390 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

Time elapsed: 15 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 20/435 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 10663239 t fired, 11 attempts, .
164 EF EXCL 19/719 4/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 809427 m, 45381 m/sec, 1445667 t fired, .
184 EF FNDP 19/435 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 2058867 t fired, 3 attempts, .
186 EF STEQ 19/385 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
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153 EF FNDP 25/430 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 12712131 t fired, 13 attempts, .
164 EF EXCL 24/719 5/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 1031298 m, 44374 m/sec, 1877122 t fired, .
184 EF FNDP 24/430 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 2492260 t fired, 3 attempts, .
186 EF STEQ 24/380 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 30/425 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 14587398 t fired, 15 attempts, .
164 EF EXCL 29/719 5/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 1265041 m, 46748 m/sec, 2338194 t fired, .
184 EF FNDP 29/425 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 2905499 t fired, 3 attempts, .
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153 EF FNDP 35/420 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 17004996 t fired, 18 attempts, .
164 EF EXCL 34/719 6/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 1502344 m, 47460 m/sec, 2817910 t fired, .
184 EF FNDP 34/420 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 3304825 t fired, 4 attempts, .
186 EF STEQ 34/370 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 40/415 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 20593733 t fired, 21 attempts, .
164 EF EXCL 39/719 7/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 1736028 m, 46736 m/sec, 3309235 t fired, .
184 EF FNDP 39/415 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 3689618 t fired, 4 attempts, .
186 EF STEQ 39/365 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 45/410 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 24085620 t fired, 25 attempts, .
164 EF EXCL 44/719 8/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 1975763 m, 47947 m/sec, 3839732 t fired, .
184 EF FNDP 44/410 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 4087036 t fired, 5 attempts, .
186 EF STEQ 44/360 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 50/405 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 27445910 t fired, 28 attempts, .
164 EF EXCL 49/719 9/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 2172115 m, 39270 m/sec, 4330585 t fired, .
184 EF FNDP 49/405 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 4470857 t fired, 5 attempts, .
186 EF STEQ 49/355 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 55/400 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 30468304 t fired, 31 attempts, .
164 EF EXCL 54/719 10/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 2375967 m, 40770 m/sec, 5089842 t fired, .
184 EF FNDP 54/400 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 4836224 t fired, 5 attempts, .
186 EF STEQ 54/350 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 60/395 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 33222176 t fired, 34 attempts, .
164 EF EXCL 59/719 11/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 2570099 m, 38826 m/sec, 6001535 t fired, .
184 EF FNDP 59/395 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 5230409 t fired, 6 attempts, .
186 EF STEQ 59/345 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 65/390 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 35428164 t fired, 36 attempts, .
164 EF EXCL 64/719 11/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 2754208 m, 36821 m/sec, 6970181 t fired, .
184 EF FNDP 64/390 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 5574810 t fired, 6 attempts, .
186 EF STEQ 64/340 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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153 EF FNDP 70/385 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 37498892 t fired, 38 attempts, .
164 EF EXCL 69/719 12/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12 2924787 m, 34115 m/sec, 8015472 t fired, .
184 EF FNDP 69/385 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 5934379 t fired, 6 attempts, .
186 EF STEQ 69/335 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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lola: FINISHED task # 164 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12
lola: result : false
lola: markings : 3009347
lola: fired transitions : 8661939
lola: time used : 72.000000
lola: memory pages used : 12
lola: LAUNCH task # 175 (type EXCL) for 12 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04
lola: time limit : 881 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 5 0 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 75/441 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 39336712 t fired, 40 attempts, .
175 EF EXCL 2/881 1/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04 178656 m, 35731 m/sec, 418809 t fired, .
184 EF FNDP 74/442 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 6299874 t fired, 7 attempts, .
186 EF STEQ 74/442 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.

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lola: FINISHED task # 175 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04
lola: result : false
lola: markings : 192383
lola: fired transitions : 581886
lola: time used : 3.000000
lola: memory pages used : 1
lola: LAUNCH task # 194 (type EXCL) for 30 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
lola: time limit : 1174 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 80/644 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 41216199 t fired, 42 attempts, .
184 EF FNDP 79/524 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 6662180 t fired, 7 attempts, .
186 EF STEQ 79/524 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 4/1174 1/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 236497 m, 47299 m/sec, 416193 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 85/640 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 42943420 t fired, 43 attempts, .
184 EF FNDP 84/520 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 6967336 t fired, 7 attempts, .
186 EF STEQ 84/520 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 9/1174 2/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 474440 m, 47588 m/sec, 883155 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 90/635 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 44545290 t fired, 45 attempts, .
184 EF FNDP 89/515 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 7269375 t fired, 8 attempts, .
186 EF STEQ 89/515 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 14/1174 3/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 721708 m, 49453 m/sec, 1385523 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 95/630 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 46300887 t fired, 47 attempts, .
184 EF FNDP 94/510 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 7580856 t fired, 8 attempts, .
186 EF STEQ 94/510 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 19/1174 4/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 961560 m, 47970 m/sec, 1876800 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 100/625 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 48877722 t fired, 49 attempts, .
184 EF FNDP 99/505 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 7874559 t fired, 8 attempts, .
186 EF STEQ 99/505 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 24/1174 5/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 1172787 m, 42245 m/sec, 2312359 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 105/620 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 50732291 t fired, 51 attempts, .
184 EF FNDP 104/500 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 8176183 t fired, 9 attempts, .
186 EF STEQ 104/500 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 29/1174 6/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 1409570 m, 47356 m/sec, 2804602 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 110/615 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 53328569 t fired, 54 attempts, .
184 EF FNDP 109/495 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 8533675 t fired, 9 attempts, .
186 EF STEQ 109/495 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 34/1174 7/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 1636064 m, 45298 m/sec, 3282900 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 115/610 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 56462712 t fired, 57 attempts, .
184 EF FNDP 114/490 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 8877233 t fired, 9 attempts, .
186 EF STEQ 114/490 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 39/1174 8/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 1862468 m, 45280 m/sec, 3768823 t fired, .

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UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 120/605 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 59767852 t fired, 60 attempts, .
184 EF FNDP 119/485 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 9266722 t fired, 10 attempts, .
186 EF STEQ 119/485 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 44/1174 9/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 2068413 m, 41189 m/sec, 4222677 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 125/600 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 61487442 t fired, 62 attempts, .
184 EF FNDP 124/480 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 9552076 t fired, 10 attempts, .
186 EF STEQ 124/480 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 49/1174 9/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 2256684 m, 37654 m/sec, 4848573 t fired, .

Time elapsed: 125 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 130/595 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 63430096 t fired, 64 attempts, .
184 EF FNDP 129/475 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 9847316 t fired, 10 attempts, .
186 EF STEQ 129/475 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 54/1174 10/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 2442263 m, 37115 m/sec, 5541932 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 4 1 0 1 0 0 0
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF 0 3 2 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
153 EF FNDP 135/590 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 65630653 t fired, 66 attempts, .
184 EF FNDP 134/470 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 10092859 t fired, 11 attempts, .
186 EF STEQ 134/470 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 sara is running.
194 EF EXCL 59/1174 11/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 2640799 m, 39707 m/sec, 6274264 t fired, .

Time elapsed: 135 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 186 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 184 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 154 (type EQUN) for 24 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 156 (type SRCH) for 24 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 156 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 153 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 154 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 188 (type FNDP) for 30 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 189 (type EQUN) for 30 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 193 (type SRCH) for 30 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 153 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 66994937
lola: tried executions : 68
lola: time used : 138.000000
lola: memory pages used : 0
lola: FINISHED task # 184 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 10234295
lola: tried executions : 12
lola: time used : 137.000000
lola: memory pages used : 0
lola: FINISHED task # 154 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-189.sara.
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG true tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
188 EF FNDP 2/1731 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 278567 t fired, 1 attempts, .
189 EF STEQ 2/3462 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 sara is running.
193 EF SRCH 2/3462 2/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 333083 m, 66616 m/sec, 476114 t fired, .
194 EF EXCL 64/3524 12/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 2868106 m, 45461 m/sec, 6915685 t fired, .

Time elapsed: 140 secs. Pages in use: 14
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG true tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG 0 1 4 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
188 EF FNDP 7/1729 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 950457 t fired, 1 attempts, .
189 EF STEQ 7/3460 0/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 sara is running.
193 EF SRCH 7/3460 4/5 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 1069545 m, 147292 m/sec, 1689040 t fired, .
194 EF EXCL 69/3524 13/32 UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 3107225 m, 47823 m/sec, 7404364 t fired, .

Time elapsed: 145 secs. Pages in use: 17
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 189 (type EQUN) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 188 (type FNDP) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 193 (type SRCH) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 194 (type EXCL) for UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-00: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-01: INITIAL false preprocessing
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-05: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-06: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-07: EF false state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-08: AG true tandem / insertion
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-09: AG true skeleton: state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-10: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-11: AG true state equation
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-12: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-13: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-14: AG false tandem / relaxed
UtilityControlRoom-PT-Z2T4N08-ReachabilityCardinality-15: EF false state equation


Time elapsed: 146 secs. Pages in use: 18

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N08"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z2T4N08, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704001150"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N08.tgz
mv UtilityControlRoom-PT-Z2T4N08 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;