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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912704001142
Last Updated
May 14, 2023

About the Execution of LoLa+red for UtilityControlRoom-PT-Z2T4N06

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
394.271 61720.00 232391.00 286.90 FFFTFTFTFFTTTTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704001142.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z2T4N06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704001142
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 968K
-rw-r--r-- 1 mcc users 18K Feb 26 14:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 115K Feb 26 14:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Feb 26 14:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 146K Feb 26 14:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 40K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 43K Feb 26 14:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 218K Feb 26 14:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 33K Feb 26 14:47 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 146K Feb 26 14:47 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 70K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679233495863

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T4N06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:44:57] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 13:44:57] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:44:57] [INFO ] Load time of PNML (sax parser for PT used): 41 ms
[2023-03-19 13:44:57] [INFO ] Transformed 106 places.
[2023-03-19 13:44:57] [INFO ] Transformed 162 transitions.
[2023-03-19 13:44:57] [INFO ] Parsed PT model containing 106 places and 162 transitions and 510 arcs in 99 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 19 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 24 transitions
Reduce redundant transitions removed 24 transitions.
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 661 ms. (steps per millisecond=15 ) properties (out of 15) seen :2
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 142 ms. (steps per millisecond=70 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 117 ms. (steps per millisecond=85 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 13) seen :0
Running SMT prover for 13 properties.
// Phase 1: matrix 138 rows 106 cols
[2023-03-19 13:44:58] [INFO ] Computed 15 place invariants in 7 ms
[2023-03-19 13:44:59] [INFO ] [Real]Absence check using 15 positive place invariants in 6 ms returned sat
[2023-03-19 13:44:59] [INFO ] After 336ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:12
[2023-03-19 13:44:59] [INFO ] [Nat]Absence check using 15 positive place invariants in 18 ms returned sat
[2023-03-19 13:44:59] [INFO ] After 197ms SMT Verify possible using all constraints in natural domain returned unsat :13 sat :0
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 13 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 2347 ms.
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T4N06
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679233557583

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 3 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 3 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: result : false
lola: markings : 400
lola: fired transitions : 855
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 50 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 52 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 3966
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 9 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 9 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type SKEL/SRCH) for 9 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: result : false
lola: markings : 970
lola: fired transitions : 3010
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 58 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 61 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 (obsolete)
lola: FINISHED task # 50 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01 stopped (result already fixed).
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: planning for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 16 (type CNST) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 64 (type SKEL/FNDP) for 18 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 18 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: result : false
lola: markings : 261
lola: fired transitions : 501
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 68 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: result : false
lola: markings : 212
lola: fired transitions : 397
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 65 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 73 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 75 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 17729
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 65 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06
lola: result : unknown
lola: FINISHED task # 75 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: result : true
lola: markings : 49
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 73 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 76 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 27 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/EQUN) for 27 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 27 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 27 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 72 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 54
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 82 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: result : false
lola: markings : 2733
lola: fired transitions : 5557
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 83 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: result : false
lola: markings : 180
lola: fired transitions : 254
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 79 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 80 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 90 (type EXCL) for 36 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 86 (type FNDP) for 36 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 36 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 36 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: result : unknown
lola: fired transitions : 13844
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 80 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
lola: planning for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09 stopped (result already fixed).
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 87 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 86 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 89 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 90 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 104 (type EXCL) for 42 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 93 (type FNDP) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SRCH) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 86 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 7822
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 0.000000 secs.
lola: planning for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 73 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 104 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14
lola: result : false
lola: markings : 22512
lola: fired transitions : 50607
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 185 (type EXCL) for 30 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 185 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10
lola: result : false
lola: markings : 12319
lola: fired transitions : 34238
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 199 (type EXCL) for 45 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 199 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15
lola: result : false
lola: markings : 7667
lola: fired transitions : 17454
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 147 (type EXCL) for 39 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 147 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13
lola: result : false
lola: markings : 110927
lola: fired transitions : 315848
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 155 (type EXCL) for 24 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 155 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08
lola: result : false
lola: markings : 6
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 140 (type EXCL) for 33 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 140 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 166 (type EXCL) for 12 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04
lola: time limit : 899 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF 0 10 0 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 7 3 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 5/323 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 873471 t fired, 1 attempts, .
94 EF STEQ 5/356 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
96 EF SRCH 5/356 2/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 374691 m, 74938 m/sec, 940758 t fired, .
166 EF EXCL 1/899 1/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04 54362 m, 10872 m/sec, 92233 t fired, .

Time elapsed: 5 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 166 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04
lola: result : false
lola: markings : 303145
lola: fired transitions : 769508
lola: time used : 5.000000
lola: memory pages used : 2
lola: LAUNCH task # 171 (type EXCL) for 6 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02
lola: time limit : 1197 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 7 3 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 10/441 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 2011802 t fired, 3 attempts, .
94 EF STEQ 10/505 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
96 EF SRCH 10/505 4/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 865428 m, 98147 m/sec, 2287152 t fired, .
171 EF EXCL 1/1197 1/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 109503 m, 21900 m/sec, 228523 t fired, .

Time elapsed: 10 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 96 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF 0 9 1 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 7 2 0 0 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 15/440 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 2957964 t fired, 3 attempts, .
94 EF STEQ 15/504 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
171 EF EXCL 6/1197 3/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 545841 m, 87267 m/sec, 1337384 t fired, .

Time elapsed: 15 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 107 (type FNDP) for 0 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 107 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 375
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 135 (type FNDP) for 6 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF 0 8 2 0 0 0 0 0
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 7 2 0 0 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 20/705 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 3820240 t fired, 4 attempts, .
94 EF STEQ 20/585 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
135 EF FNDP 5/597 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 1028681 t fired, 2 attempts, .
171 EF EXCL 11/1795 4/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 845154 m, 59862 m/sec, 2162457 t fired, .

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# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 171 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02
lola: result : false
lola: markings : 915456
lola: fired transitions : 3348480
lola: time used : 13.000000
lola: memory pages used : 4
lola: CANCELED task # 135 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 97 (type EXCL) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 3578 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 98 (type SRCH) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 135 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 1299939
lola: tried executions : 3
lola: time used : 7.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 5 4 0 0 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 25/1778 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 4720535 t fired, 5 attempts, .
94 EF STEQ 25/1178 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 3/3578 1/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 230379 m, 46075 m/sec, 532186 t fired, .
98 EF SRCH 3/1192 2/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 457657 m, 91531 m/sec, 1428478 t fired, .

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lola: FINISHED task # 98 (type SRCH) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: result : unknown
lola: markings : 516096
lola: fired transitions : 2202112
lola: time used : 5.000000
lola: memory pages used : 2
lola: LAUNCH task # 150 (type SKEL/FNDP) for 21 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 30/1773 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 5411944 t fired, 6 attempts, .
94 EF STEQ 30/1773 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 8/3578 3/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 542068 m, 62337 m/sec, 1389713 t fired, .
150 EF FNDP 3/1191 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 2593370 t fired, 3 attempts, .

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# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 35/1770 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 6061610 t fired, 7 attempts, .
94 EF STEQ 35/1770 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 13/3578 4/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 827662 m, 57118 m/sec, 2192461 t fired, .
150 EF FNDP 8/1188 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 7482158 t fired, 8 attempts, .

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# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 40/1765 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 6798058 t fired, 7 attempts, .
94 EF STEQ 40/1765 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 18/3578 5/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 1137364 m, 61940 m/sec, 3084483 t fired, .
150 EF FNDP 13/1183 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 11611298 t fired, 12 attempts, .

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# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 45/1760 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 7455284 t fired, 8 attempts, .
94 EF STEQ 45/1760 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 23/3578 6/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 1370953 m, 46717 m/sec, 3761692 t fired, .
150 EF FNDP 18/1178 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 15573007 t fired, 16 attempts, .

Time elapsed: 45 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 50/1755 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 8166382 t fired, 9 attempts, .
94 EF STEQ 50/1755 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 28/3578 7/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 1696491 m, 65107 m/sec, 4720587 t fired, .
150 EF FNDP 23/1173 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 19580533 t fired, 20 attempts, .

Time elapsed: 50 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG 0 4 4 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 55/1750 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 8744810 t fired, 9 attempts, .
94 EF STEQ 55/1750 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 sara is running.
97 EF EXCL 33/3578 8/32 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 1797126 m, 20127 m/sec, 6474376 t fired, .
150 EF FNDP 28/1168 0/5 UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 23833066 t fired, 24 attempts, .

Time elapsed: 55 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 97 (type EXCL) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07
lola: result : false
lola: markings : 1807056
lola: fired transitions : 7440360
lola: time used : 35.000000
lola: memory pages used : 8
lola: CANCELED task # 93 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 94 (type EQUN) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 150 (type FNDP) for UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-00: AG false findpath
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-01: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-02: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-03: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-04: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-05: INITIAL true preprocessing
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-07: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-08: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-09: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-10: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-11: EF true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-12: AG true state equation
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T4N06-ReachabilityCardinality-15: EF false tandem / relaxed


Time elapsed: 57 secs. Pages in use: 8

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T4N06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z2T4N06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704001142"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T4N06.tgz
mv UtilityControlRoom-PT-Z2T4N06 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;