About the Execution of LoLa+red for UtilityControlRoom-PT-Z2T3N04
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
278.399 | 8091.00 | 18827.00 | 247.80 | TTFFFFFTTTFTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r487-tall-167912704001094.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-PT-Z2T3N04, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912704001094
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 752K
-rw-r--r-- 1 mcc users 16K Feb 26 14:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 108K Feb 26 14:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Feb 26 14:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 116K Feb 26 14:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Feb 26 14:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 129K Feb 26 14:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 30K Feb 26 14:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 151K Feb 26 14:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 47K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14
FORMULA_NAME UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1679232283050
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z2T3N04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 13:24:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 13:24:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 13:24:44] [INFO ] Load time of PNML (sax parser for PT used): 33 ms
[2023-03-19 13:24:44] [INFO ] Transformed 72 places.
[2023-03-19 13:24:44] [INFO ] Transformed 108 transitions.
[2023-03-19 13:24:44] [INFO ] Parsed PT model containing 72 places and 108 transitions and 340 arcs in 101 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 15 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 16 transitions
Reduce redundant transitions removed 16 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 350 ms. (steps per millisecond=28 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 16) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 16) seen :0
Interrupted probabilistic random walk after 356844 steps, run timeout after 3001 ms. (steps per millisecond=118 ) properties seen :{}
Probabilistic random walk after 356844 steps, saw 126720 distinct states, run finished after 3002 ms. (steps per millisecond=118 ) properties seen :0
Running SMT prover for 16 properties.
// Phase 1: matrix 92 rows 72 cols
[2023-03-19 13:24:48] [INFO ] Computed 11 place invariants in 9 ms
[2023-03-19 13:24:48] [INFO ] [Real]Absence check using 11 positive place invariants in 3 ms returned sat
[2023-03-19 13:24:48] [INFO ] After 202ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:11
[2023-03-19 13:24:48] [INFO ] [Nat]Absence check using 11 positive place invariants in 3 ms returned sat
[2023-03-19 13:24:48] [INFO ] After 64ms SMT Verify possible using all constraints in natural domain returned unsat :16 sat :0
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 16 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 4033 ms.
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z2T3N04
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679232291141
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: result : false
lola: markings : 546
lola: fired transitions : 1625
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 50 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 51 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 53 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 (obsolete)
lola: FINISHED task # 53 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: result : false
lola: markings : 560
lola: fired transitions : 1719
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 57 (type SKEL/FNDP) for 15 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 15 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/SRCH) for 15 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: FINISHED task # 61 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: result : false
lola: markings : 70
lola: fired transitions : 94
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 58 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 60 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 18 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SKEL/EQUN) for 18 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 18 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 58 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: result : unknown
lola: FINISHED task # 76 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: result : false
lola: markings : 120
lola: fired transitions : 225
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 73 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 75 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 12 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type SKEL/EQUN) for 12 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 12 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 83 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: result : false
lola: markings : 505
lola: fired transitions : 1230
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 80 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 82 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 65 (type SKEL/FNDP) for 3 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 3 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 5860
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-73.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Rule S: 0 transitions removed,0 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-80.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 57 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 6170
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 68 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: result : false
lola: markings : 228
lola: fired transitions : 416
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 69 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: result : false
lola: markings : 44
lola: fired transitions : 56
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 73 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06
lola: result : false
lola: CANCELED task # 65 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 66 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 65 (type SKEL/FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 119821
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 80 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 86 (type SKEL/FNDP) for 6 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/EQUN) for 6 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/SRCH) for 6 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 66 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 89 (type SKEL/SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: result : false
lola: markings : 259
lola: fired transitions : 550
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 86 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 87 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 90 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 104 (type EXCL) for 9 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 107 (type FNDP) for 21 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type EQUN) for 21 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 21 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
lola: FINISHED task # 87 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02
lola: result : false
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 51 (type SKEL/EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 104 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03
lola: result : false
lola: markings : 3083
lola: fired transitions : 8562
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 144 (type EXCL) for 45 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 144 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15
lola: result : false
lola: markings : 2248
lola: fired transitions : 6575
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 30 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 108 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 107 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 110 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 114 (type FNDP) for 24 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type EQUN) for 24 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 24 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 107 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 66775
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 124 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10
lola: result : false
lola: markings : 3112
lola: fired transitions : 10319
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 157 (type EXCL) for 36 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-115.sara.
lola: FINISHED task # 157 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12
lola: result : false
lola: markings : 4531
lola: fired transitions : 13635
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 151 (type EXCL) for 42 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 151 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14
lola: result : false
lola: markings : 5
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 138 (type EXCL) for 39 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 138 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13
lola: result : false
lola: markings : 5125
lola: fired transitions : 14684
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 131 (type EXCL) for 27 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 131 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09
lola: result : false
lola: markings : 11369
lola: fired transitions : 27441
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 185 (type EXCL) for 33 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 185 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11
lola: result : false
lola: markings : 14467
lola: fired transitions : 38716
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 118 (type EXCL) for 24 UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 115 (type EQUN) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 114 (type FNDP) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 117 (type SRCH) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 118 (type EXCL) for UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-00: AG true skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-03: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-04: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-05: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-07: AG true state equation
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-08: AG true state equation
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-09: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-10: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-11: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-12: EF false tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-13: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-14: AG true tandem / relaxed
UtilityControlRoom-PT-Z2T3N04-ReachabilityCardinality-15: EF false tandem / relaxed
Time elapsed: 2 secs. Pages in use: 2
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z2T3N04"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-PT-Z2T3N04, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912704001094"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z2T3N04.tgz
mv UtilityControlRoom-PT-Z2T3N04 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;