Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703800986.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is UtilityControlRoom-COL-Z2T4N02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703800986
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 6.7K Feb 26 14:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Feb 26 14:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 14:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 26 14:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 14:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 140K Feb 26 14:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 14:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 26 14:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679228416936

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T4N02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 12:20:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 12:20:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 12:20:18] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 12:20:18] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 12:20:19] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 683 ms
[2023-03-19 12:20:19] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 38 PT places and 54.0 transition bindings in 15 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
[2023-03-19 12:20:19] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 4 ms.
[2023-03-19 12:20:19] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Initial state reduction rules removed 2 formulas.
FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 10 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Finished random walk after 84 steps, including 0 resets, run visited all 15 properties in 16 ms. (steps per millisecond=5 )
[2023-03-19 12:20:19] [INFO ] Flatten gal took : 14 ms
[2023-03-19 12:20:19] [INFO ] Flatten gal took : 3 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(2), Z(2), Z(2)] of place MovetoZ breaks symmetries in sort Z
[2023-03-19 12:20:19] [INFO ] Unfolded HLPN to a Petri net with 38 places and 54 transitions 170 arcs in 8 ms.
[2023-03-19 12:20:19] [INFO ] Unfolded 14 HLPN properties in 0 ms.
Initial state reduction rules removed 1 formulas.
[2023-03-19 12:20:19] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 12:20:19] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 12:20:19] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 12:20:19] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 12:20:19] [INFO ] Reduced 2 identical enabling conditions.
Ensure Unique test removed 8 transitions
Reduce redundant transitions removed 8 transitions.
FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 38 out of 38 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Applied a total of 0 rules in 5 ms. Remains 38 /38 variables (removed 0) and now considering 46/46 (removed 0) transitions.
// Phase 1: matrix 46 rows 38 cols
[2023-03-19 12:20:19] [INFO ] Computed 7 place invariants in 3 ms
[2023-03-19 12:20:19] [INFO ] Implicit Places using invariants in 151 ms returned []
[2023-03-19 12:20:19] [INFO ] Invariant cache hit.
[2023-03-19 12:20:19] [INFO ] Implicit Places using invariants and state equation in 55 ms returned []
Implicit Place search using SMT with State Equation took 234 ms to find 0 implicit places.
[2023-03-19 12:20:19] [INFO ] Invariant cache hit.
[2023-03-19 12:20:19] [INFO ] Dead Transitions using invariants and state equation in 50 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 297 ms. Remains : 38/38 places, 46/46 transitions.
Support contains 38 out of 38 places after structural reductions.
[2023-03-19 12:20:19] [INFO ] Flatten gal took : 8 ms
[2023-03-19 12:20:19] [INFO ] Flatten gal took : 27 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 46 transitions.
Finished random walk after 30 steps, including 0 resets, run visited all 23 properties in 4 ms. (steps per millisecond=7 )
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 5 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 8 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 46 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Applied a total of 8 rules in 3 ms. Remains 34 /38 variables (removed 4) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 34/38 places, 42/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 4 Pre rules applied. Total rules applied 0 place count 38 transition count 42
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 8 place count 34 transition count 42
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 12 place count 32 transition count 40
Applied a total of 12 rules in 9 ms. Remains 32 /38 variables (removed 6) and now considering 40/46 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 32/38 places, 40/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Applied a total of 8 rules in 2 ms. Remains 34 /38 variables (removed 4) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 34/38 places, 42/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 46/46 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 46/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Applied a total of 0 rules in 0 ms. Remains 38 /38 variables (removed 0) and now considering 46/46 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 38/38 places, 46/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 38 transition count 38
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 20 place count 30 transition count 34
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 20 place count 30 transition count 30
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 28 place count 26 transition count 30
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 32 place count 24 transition count 28
Applied a total of 32 rules in 3 ms. Remains 24 /38 variables (removed 14) and now considering 28/46 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 24/38 places, 28/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 28 transitions.
Finished random walk after 3 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=3 )
FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 36 transition count 44
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 9 place count 33 transition count 42
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 17 place count 29 transition count 38
Applied a total of 17 rules in 9 ms. Remains 29 /38 variables (removed 9) and now considering 38/46 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 29/38 places, 38/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 38 transitions.
Finished random walk after 4 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=4 )
FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 12 place count 32 transition count 40
Applied a total of 12 rules in 4 ms. Remains 32 /38 variables (removed 6) and now considering 40/46 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 32/38 places, 40/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Applied a total of 8 rules in 1 ms. Remains 34 /38 variables (removed 4) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 34/38 places, 42/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Applied a total of 0 rules in 1 ms. Remains 38 /38 variables (removed 0) and now considering 46/46 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 38/38 places, 46/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 4 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 46 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Applied a total of 8 rules in 1 ms. Remains 34 /38 variables (removed 4) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 34/38 places, 42/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 42 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 38 transition count 38
Reduce places removed 8 places and 0 transitions.
Ensure Unique test removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 20 place count 30 transition count 34
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 21 place count 29 transition count 30
Iterating global reduction 2 with 1 rules applied. Total rules applied 22 place count 29 transition count 30
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 24 place count 27 transition count 28
Iterating global reduction 2 with 2 rules applied. Total rules applied 26 place count 27 transition count 28
Applied a total of 26 rules in 4 ms. Remains 27 /38 variables (removed 11) and now considering 28/46 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 27/38 places, 28/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 2 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in LTL mode, iteration 0 : 38/38 places, 46/46 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 34 transition count 42
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 34 transition count 42
Applied a total of 8 rules in 1 ms. Remains 34 /38 variables (removed 4) and now considering 42/46 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 34/38 places, 42/46 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 3 ms
[2023-03-19 12:20:20] [INFO ] Input system was already deterministic with 42 transitions.
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 5 ms
[2023-03-19 12:20:20] [INFO ] Flatten gal took : 6 ms
[2023-03-19 12:20:20] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-19 12:20:20] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 38 places, 46 transitions and 138 arcs took 1 ms.
Total runtime 1985 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z2T4N02
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679228421665

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 7 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
lola: result : true
lola: markings : 11
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
lola: result : true
lola: markings : 689
lola: fired transitions : 1590
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
lola: result : false
lola: markings : 38
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
lola: result : true
lola: markings : 147
lola: fired transitions : 239
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-COL-Z2T4N02-CTLFireability-15
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 31 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-15
lola: result : true
lola: markings : 11
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
lola: result : true
lola: markings : 105
lola: fired transitions : 285
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
lola: result : true
lola: markings : 104
lola: fired transitions : 147
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 27 UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
lola: result : true
lola: markings : 15
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
lola: result : true
lola: markings : 975
lola: fired transitions : 6021
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N02-CTLFireability-00: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-08: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-10: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-14: AGAF false state space /EFEG
UtilityControlRoom-COL-Z2T4N02-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T4N02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is UtilityControlRoom-COL-Z2T4N02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703800986"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T4N02.tgz
mv UtilityControlRoom-COL-Z2T4N02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;