Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703600826.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TwoPhaseLocking-PT-nC00050vN, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703600826
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 7.3K Feb 25 17:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 72K Feb 25 17:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K Feb 25 17:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 17:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:23 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.5K Feb 25 17:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 25 17:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 115K Feb 25 17:38 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:23 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:23 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-00
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-01
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-02
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-03
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-04
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-05
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-06
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-07
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-08
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-09
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-10
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-11
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-12
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-13
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-14
FORMULA_NAME TwoPhaseLocking-PT-nC00050vN-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679223906177

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC00050vN
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 11:05:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 11:05:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 11:05:07] [INFO ] Load time of PNML (sax parser for PT used): 243 ms
[2023-03-19 11:05:08] [INFO ] Transformed 8 places.
[2023-03-19 11:05:08] [INFO ] Transformed 6 transitions.
[2023-03-19 11:05:08] [INFO ] Parsed PT model containing 8 places and 6 transitions and 18 arcs in 303 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 8 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 9 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
// Phase 1: matrix 6 rows 8 cols
[2023-03-19 11:05:08] [INFO ] Computed 3 place invariants in 8 ms
[2023-03-19 11:05:08] [INFO ] Implicit Places using invariants in 139 ms returned []
[2023-03-19 11:05:08] [INFO ] Invariant cache hit.
[2023-03-19 11:05:08] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 202 ms to find 0 implicit places.
[2023-03-19 11:05:08] [INFO ] Invariant cache hit.
[2023-03-19 11:05:08] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 256 ms. Remains : 8/8 places, 6/6 transitions.
Support contains 8 out of 8 places after structural reductions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 12 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 4 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Incomplete random walk after 10003 steps, including 2 resets, run finished after 49 ms. (steps per millisecond=204 ) properties (out of 27) seen :26
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-19 11:05:08] [INFO ] Invariant cache hit.
[2023-03-19 11:05:08] [INFO ] After 24ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 2 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 2 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Applied a total of 2 rules in 4 ms. Remains 7 /8 variables (removed 1) and now considering 5/6 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 7/8 places, 5/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 7 transition count 4
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 6 transition count 4
Applied a total of 4 rules in 3 ms. Remains 6 /8 variables (removed 2) and now considering 4/6 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 6/8 places, 4/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 4 transitions.
Finished random walk after 26 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=26 )
FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 7 transition count 4
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 6 transition count 4
Applied a total of 4 rules in 2 ms. Remains 6 /8 variables (removed 2) and now considering 4/6 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 6/8 places, 4/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 5
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 5
Applied a total of 2 rules in 1 ms. Remains 7 /8 variables (removed 1) and now considering 5/6 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 7/8 places, 5/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 0 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Flatten gal took : 1 ms
[2023-03-19 11:05:08] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 11:05:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8 places, 6 transitions and 18 arcs took 0 ms.
Total runtime 1287 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC00050vN
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
CTLFireability

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00050vN-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679223916903

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 20 (type EXCL) for 19 TwoPhaseLocking-PT-nC00050vN-CTLFireability-06
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 20 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-06
lola: result : true
lola: markings : 105847
lola: fired transitions : 291505
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 TwoPhaseLocking-PT-nC00050vN-CTLFireability-15
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-15
lola: result : true
lola: markings : 26
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 TwoPhaseLocking-PT-nC00050vN-CTLFireability-14
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-14
lola: result : false
lola: markings : 2051
lola: fired transitions : 2681
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 TwoPhaseLocking-PT-nC00050vN-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-13
lola: result : false
lola: markings : 566
lola: fired transitions : 2285
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 TwoPhaseLocking-PT-nC00050vN-CTLFireability-11
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-11
lola: result : false
lola: markings : 403741
lola: fired transitions : 2506882
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 32 (type EXCL) for 31 TwoPhaseLocking-PT-nC00050vN-CTLFireability-10
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-10
lola: result : true
lola: markings : 75
lola: fired transitions : 274
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 TwoPhaseLocking-PT-nC00050vN-CTLFireability-09
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-09
lola: result : true
lola: markings : 104
lola: fired transitions : 206
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 TwoPhaseLocking-PT-nC00050vN-CTLFireability-02
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-02
lola: result : true
lola: markings : 12473
lola: fired transitions : 23930
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 TwoPhaseLocking-PT-nC00050vN-CTLFireability-01
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC00050vN-CTLFireability-00
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-00
lola: result : true
lola: markings : 403741
lola: fired transitions : 2795173
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 50 (type EXCL) for 25 TwoPhaseLocking-PT-nC00050vN-CTLFireability-08
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-08
lola: result : true
lola: markings : 7852
lola: fired transitions : 27520
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 TwoPhaseLocking-PT-nC00050vN-CTLFireability-03
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-03
lola: result : false
lola: markings : 1051
lola: fired transitions : 1674
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 3 TwoPhaseLocking-PT-nC00050vN-CTLFireability-01
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-01
lola: result : false
lola: markings : 77
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 37 TwoPhaseLocking-PT-nC00050vN-CTLFireability-12
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-12
lola: result : true
lola: markings : 12376
lola: fired transitions : 28901
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 TwoPhaseLocking-PT-nC00050vN-CTLFireability-07
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-07
lola: result : true
lola: markings : 149
lola: fired transitions : 182
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 16 TwoPhaseLocking-PT-nC00050vN-CTLFireability-04
lola: time limit : 3596 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00050vN-CTLFireability-00: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-01: CONJ true CONJ
TwoPhaseLocking-PT-nC00050vN-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-03: EG false state space / EG
TwoPhaseLocking-PT-nC00050vN-CTLFireability-06: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-07: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-08: SP ECTL false LTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-12: EFAG false tscc_search
TwoPhaseLocking-PT-nC00050vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-14: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00050vN-CTLFireability-04: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
17 CTL EXCL 1/3596 1/32 TwoPhaseLocking-PT-nC00050vN-CTLFireability-04 219518 m, 43903 m/sec, 1392064 t fired, .

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 17 (type EXCL) for TwoPhaseLocking-PT-nC00050vN-CTLFireability-04
lola: result : true
lola: markings : 403741
lola: fired transitions : 3999689
lola: time used : 2.000000
lola: memory pages used : 2
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00050vN-CTLFireability-00: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-01: CONJ true CONJ
TwoPhaseLocking-PT-nC00050vN-CTLFireability-02: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-03: EG false state space / EG
TwoPhaseLocking-PT-nC00050vN-CTLFireability-04: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-06: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-07: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-08: SP ECTL false LTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-12: EFAG false tscc_search
TwoPhaseLocking-PT-nC00050vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-14: CTL false CTL model checker
TwoPhaseLocking-PT-nC00050vN-CTLFireability-15: CTL true CTL model checker


Time elapsed: 6 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC00050vN"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TwoPhaseLocking-PT-nC00050vN, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703600826"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC00050vN.tgz
mv TwoPhaseLocking-PT-nC00050vN execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;