fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r487-tall-167912703500769
Last Updated
May 14, 2023

About the Execution of LoLa+red for TwoPhaseLocking-PT-nC00004vD

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
215.995 4035.00 7436.00 379.90 TFTFTFFFTTTFTTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703500769.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TwoPhaseLocking-PT-nC00004vD, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703500769
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 404K
-rw-r--r-- 1 mcc users 8.5K Feb 25 17:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K Feb 25 17:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 17:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 25 17:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 25 17:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Feb 25 17:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.9K Feb 25 17:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32K Feb 25 17:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-00
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-01
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-02
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-04
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-05
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-06
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-07
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-08
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-09
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-10
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-11
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-12
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-13
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-14
FORMULA_NAME TwoPhaseLocking-PT-nC00004vD-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1679223522898

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC00004vD
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 10:58:44] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 10:58:44] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 10:58:44] [INFO ] Load time of PNML (sax parser for PT used): 17 ms
[2023-03-19 10:58:44] [INFO ] Transformed 8 places.
[2023-03-19 10:58:44] [INFO ] Transformed 6 transitions.
[2023-03-19 10:58:44] [INFO ] Parsed PT model containing 8 places and 6 transitions and 18 arcs in 71 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 13 ms.
Initial state reduction rules removed 5 formulas.
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 8 out of 8 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 7 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
// Phase 1: matrix 6 rows 8 cols
[2023-03-19 10:58:44] [INFO ] Computed 3 place invariants in 3 ms
[2023-03-19 10:58:44] [INFO ] Implicit Places using invariants in 127 ms returned []
[2023-03-19 10:58:44] [INFO ] Invariant cache hit.
[2023-03-19 10:58:44] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 179 ms to find 0 implicit places.
[2023-03-19 10:58:44] [INFO ] Invariant cache hit.
[2023-03-19 10:58:44] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 212 ms. Remains : 8/8 places, 6/6 transitions.
Support contains 8 out of 8 places after structural reductions.
[2023-03-19 10:58:44] [INFO ] Flatten gal took : 11 ms
[2023-03-19 10:58:44] [INFO ] Flatten gal took : 3 ms
[2023-03-19 10:58:44] [INFO ] Input system was already deterministic with 6 transitions.
Incomplete random walk after 10000 steps, including 307 resets, run finished after 326 ms. (steps per millisecond=30 ) properties (out of 45) seen :27
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 52 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 49 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 14 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 14 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 55 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 15 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 13 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 55 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 19 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1000 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 55 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 10 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Running SMT prover for 18 properties.
[2023-03-19 10:58:45] [INFO ] Invariant cache hit.
[2023-03-19 10:58:45] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-19 10:58:45] [INFO ] After 70ms SMT Verify possible using all constraints in real domain returned unsat :13 sat :0 real:5
[2023-03-19 10:58:45] [INFO ] [Nat]Absence check using 3 positive place invariants in 0 ms returned sat
[2023-03-19 10:58:45] [INFO ] After 31ms SMT Verify possible using all constraints in natural domain returned unsat :18 sat :0
Fused 18 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 18 atomic propositions for a total of 10 simplifications.
[2023-03-19 10:58:45] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 2 ms
FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 2 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 2 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 0 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 0 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 0 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 0 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 1 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 4 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 8/8 places, 6/6 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 6/6 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 8/8 places, 6/6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Input system was already deterministic with 6 transitions.
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Flatten gal took : 1 ms
[2023-03-19 10:58:45] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 1 ms.
[2023-03-19 10:58:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 8 places, 6 transitions and 18 arcs took 0 ms.
Total runtime 1508 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC00004vD
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TwoPhaseLocking-PT-nC00004vD-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679223526933

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 35 (type CNST) for 32 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 35 (type CNST) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-15
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH INITIAL
lola: LAUNCH task # 21 (type CNST) for 20 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 21 (type CNST) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-07
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 9 (type CNST) for 6 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 9 (type CNST) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 18 (type EXCL) for 17 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-05
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 18 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-05
lola: result : false
lola: markings : 26
lola: fired transitions : 108
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 30 (type EXCL) for 29 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 30 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-12
lola: result : true
lola: markings : 14
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-08
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-08
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-01
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 6 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-11
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-11
lola: result : false
lola: markings : 32
lola: fired transitions : 158
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC00004vD-CTLCardinality-00
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for TwoPhaseLocking-PT-nC00004vD-CTLCardinality-00
lola: result : true
lola: markings : 19
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-00: CTL true CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-01: CTL false CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-03: DISJ false DISJ
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-05: CTL false CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-07: INITIAL false preprocessing
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-08: CTL true CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-12: CTL true CTL model checker
TwoPhaseLocking-PT-nC00004vD-CTLCardinality-15: DISJ true preprocessing


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC00004vD"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TwoPhaseLocking-PT-nC00004vD, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703500769"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC00004vD.tgz
mv TwoPhaseLocking-PT-nC00004vD execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;