About the Execution of LoLa+red for TriangularGrid-PT-5046
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1138.771 | 122200.00 | 123097.00 | 544.80 | T?FTTTTFFTF?TTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703500762.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TriangularGrid-PT-5046, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703500762
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 632K
-rw-r--r-- 1 mcc users 6.0K Feb 26 01:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 26 01:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 01:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 42K Feb 26 01:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 17:22 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:22 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 02:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 123K Feb 26 02:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 02:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 73K Feb 26 02:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 185K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-00
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-01
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-02
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-03
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-04
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-05
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-06
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-07
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-08
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-09
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-10
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-11
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-12
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-13
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-14
FORMULA_NAME TriangularGrid-PT-5046-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679223224581
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TriangularGrid-PT-5046
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 10:53:46] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 10:53:46] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 10:53:46] [INFO ] Load time of PNML (sax parser for PT used): 57 ms
[2023-03-19 10:53:46] [INFO ] Transformed 280 places.
[2023-03-19 10:53:46] [INFO ] Transformed 240 transitions.
[2023-03-19 10:53:46] [INFO ] Parsed PT model containing 280 places and 240 transitions and 960 arcs in 117 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 133 out of 280 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 18 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
// Phase 1: matrix 240 rows 280 cols
[2023-03-19 10:53:46] [INFO ] Computed 116 place invariants in 32 ms
[2023-03-19 10:53:46] [INFO ] Implicit Places using invariants in 321 ms returned []
[2023-03-19 10:53:46] [INFO ] Invariant cache hit.
[2023-03-19 10:53:46] [INFO ] Implicit Places using invariants and state equation in 215 ms returned []
Implicit Place search using SMT with State Equation took 561 ms to find 0 implicit places.
[2023-03-19 10:53:46] [INFO ] Invariant cache hit.
[2023-03-19 10:53:47] [INFO ] Dead Transitions using invariants and state equation in 140 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 721 ms. Remains : 280/280 places, 240/240 transitions.
Support contains 133 out of 280 places after structural reductions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 44 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 18 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Finished random walk after 799 steps, including 0 resets, run visited all 63 properties in 100 ms. (steps per millisecond=7 )
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 15 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 17 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 17 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 13 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 14 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 6 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 12 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 13 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 14 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 11 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 12 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 4 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 10 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 11 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 11 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 10 ms
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 11 ms
[2023-03-19 10:53:47] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 5 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:47] [INFO ] Flatten gal took : 10 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 11 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 4 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 10 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 5 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 10 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 2 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 8 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 9 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 7 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 7 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 1 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
Starting structural reductions in LTL mode, iteration 0 : 280/280 places, 240/240 transitions.
Applied a total of 0 rules in 2 ms. Remains 280 /280 variables (removed 0) and now considering 240/240 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 280/280 places, 240/240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 9 ms
[2023-03-19 10:53:48] [INFO ] Input system was already deterministic with 240 transitions.
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 10:53:48] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-19 10:53:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 280 places, 240 transitions and 960 arcs took 2 ms.
Total runtime 2320 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TriangularGrid-PT-5046
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA TriangularGrid-PT-5046-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TriangularGrid-PT-5046-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679223346781
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: time used : 1.000000
lola: memory pages used : 6
lola: LAUNCH task # 48 (type EXCL) for 47 TriangularGrid-PT-5046-CTLFireability-13
lola: time limit : 580 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-13
lola: result : true
lola: markings : 1734
lola: fired transitions : 1735
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 32 TriangularGrid-PT-5046-CTLFireability-08
lola: time limit : 696 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-08
lola: result : true
lola: markings : 845
lola: fired transitions : 845
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 TriangularGrid-PT-5046-CTLFireability-12
lola: time limit : 870 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-12
lola: result : true
lola: markings : 395
lola: fired transitions : 396
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 TriangularGrid-PT-5046-CTLFireability-02
lola: time limit : 1161 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-02
lola: result : false
lola: markings : 483
lola: fired transitions : 981
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 39 (type EXCL) for 38 TriangularGrid-PT-5046-CTLFireability-10
lola: time limit : 1741 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-10
lola: result : false
lola: markings : 579
lola: fired transitions : 593
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 TriangularGrid-PT-5046-CTLFireability-04
lola: time limit : 3483 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for TriangularGrid-PT-5046-CTLFireability-04
lola: result : true
lola: markings : 388
lola: fired transitions : 401
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TriangularGrid-PT-5046-CTLFireability-00: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-01: CTL unknown AGGR
TriangularGrid-PT-5046-CTLFireability-02: CTL false CTL model checker
TriangularGrid-PT-5046-CTLFireability-03: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-04: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-05: DISJ true CTL model checker
TriangularGrid-PT-5046-CTLFireability-06: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-07: CONJ false state space /EXEF
TriangularGrid-PT-5046-CTLFireability-08: AGAF false state space /EFEG
TriangularGrid-PT-5046-CTLFireability-09: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-10: CTL false CTL model checker
TriangularGrid-PT-5046-CTLFireability-11: CTL unknown AGGR
TriangularGrid-PT-5046-CTLFireability-12: CTL true CTL model checker
TriangularGrid-PT-5046-CTLFireability-13: EG true state space / EG
TriangularGrid-PT-5046-CTLFireability-14: CTL false CTL model checker
TriangularGrid-PT-5046-CTLFireability-15: CTL true CTL model checker
Time elapsed: 117 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TriangularGrid-PT-5046"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TriangularGrid-PT-5046, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703500762"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TriangularGrid-PT-5046.tgz
mv TriangularGrid-PT-5046 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;