Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912703200498.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is TCPcondis-PT-05, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912703200498
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 7.2K Feb 26 16:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K Feb 26 16:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 26 16:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 16:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 17:19 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 17:19 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 25 17:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 17:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 16:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 26 16:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 26 16:07 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 26 16:07 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 17:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rwxr-xr-x 1 mcc users 24K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TCPcondis-PT-05-CTLFireability-00
FORMULA_NAME TCPcondis-PT-05-CTLFireability-01
FORMULA_NAME TCPcondis-PT-05-CTLFireability-02
FORMULA_NAME TCPcondis-PT-05-CTLFireability-03
FORMULA_NAME TCPcondis-PT-05-CTLFireability-04
FORMULA_NAME TCPcondis-PT-05-CTLFireability-05
FORMULA_NAME TCPcondis-PT-05-CTLFireability-06
FORMULA_NAME TCPcondis-PT-05-CTLFireability-07
FORMULA_NAME TCPcondis-PT-05-CTLFireability-08
FORMULA_NAME TCPcondis-PT-05-CTLFireability-09
FORMULA_NAME TCPcondis-PT-05-CTLFireability-10
FORMULA_NAME TCPcondis-PT-05-CTLFireability-11
FORMULA_NAME TCPcondis-PT-05-CTLFireability-12
FORMULA_NAME TCPcondis-PT-05-CTLFireability-13
FORMULA_NAME TCPcondis-PT-05-CTLFireability-14
FORMULA_NAME TCPcondis-PT-05-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679201325658

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TCPcondis-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 04:48:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-19 04:48:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 04:48:47] [WARNING] Skipping unknown tool specific annotation : Tina
[2023-03-19 04:48:47] [WARNING] Unknown XML tag in source file: size
[2023-03-19 04:48:47] [WARNING] Unknown XML tag in source file: color
[2023-03-19 04:48:47] [INFO ] Load time of PNML (sax parser for PT used): 31 ms
[2023-03-19 04:48:47] [INFO ] Transformed 30 places.
[2023-03-19 04:48:47] [INFO ] Transformed 32 transitions.
[2023-03-19 04:48:47] [INFO ] Parsed PT model containing 30 places and 32 transitions and 108 arcs in 105 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Support contains 30 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 12 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
// Phase 1: matrix 32 rows 30 cols
[2023-03-19 04:48:47] [INFO ] Computed 9 place invariants in 8 ms
[2023-03-19 04:48:47] [INFO ] Implicit Places using invariants in 127 ms returned []
[2023-03-19 04:48:47] [INFO ] Invariant cache hit.
[2023-03-19 04:48:47] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 205 ms to find 0 implicit places.
[2023-03-19 04:48:47] [INFO ] Invariant cache hit.
[2023-03-19 04:48:47] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 266 ms. Remains : 30/30 places, 32/32 transitions.
Support contains 30 out of 30 places after structural reductions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 18 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Incomplete random walk after 10002 steps, including 2 resets, run finished after 109 ms. (steps per millisecond=91 ) properties (out of 52) seen :51
Finished Best-First random walk after 209 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=104 )
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 15 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 8 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 2 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 7 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 10 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 10 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 4 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 16 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 28 transition count 30
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 27 transition count 29
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 27 transition count 29
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 7 place count 27 transition count 28
Applied a total of 7 rules in 9 ms. Remains 27 /30 variables (removed 3) and now considering 28/32 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 27/30 places, 28/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 28 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 29 transition count 31
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 29 transition count 29
Applied a total of 4 rules in 4 ms. Remains 29 /30 variables (removed 1) and now considering 29/32 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 29/30 places, 29/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 29 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 0 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 28 transition count 30
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 27 transition count 29
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 27 transition count 29
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 7 place count 27 transition count 28
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 1 Pre rules applied. Total rules applied 7 place count 27 transition count 27
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 9 place count 26 transition count 27
Applied a total of 9 rules in 4 ms. Remains 26 /30 variables (removed 4) and now considering 27/32 (removed 5) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 26/30 places, 27/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 27 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 29 transition count 31
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 3 place count 28 transition count 30
Iterating global reduction 0 with 1 rules applied. Total rules applied 4 place count 28 transition count 30
Applied a total of 4 rules in 2 ms. Remains 28 /30 variables (removed 2) and now considering 30/32 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 28/30 places, 30/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 2 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 30 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 32/32 transitions.
Applied a total of 0 rules in 1 ms. Remains 30 /30 variables (removed 0) and now considering 32/32 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 30/30 places, 32/32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 1 ms
[2023-03-19 04:48:48] [INFO ] Input system was already deterministic with 32 transitions.
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:48:48] [INFO ] Flatten gal took : 3 ms
[2023-03-19 04:48:48] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-19 04:48:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 32 transitions and 108 arcs took 0 ms.
Total runtime 1607 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT TCPcondis-PT-05
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA TCPcondis-PT-05-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TCPcondis-PT-05-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679201348714

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 7 (type EXCL) for 6 TCPcondis-PT-05-CTLFireability-02
lola: time limit : 109 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:661
lola: rewrite Frontend/Parser/formula_rewrite.k:666
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:662
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:668
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type FNDP) for 57 TCPcondis-PT-05-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 57 TCPcondis-PT-05-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SRCH) for 57 TCPcondis-PT-05-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 77 (type SRCH) for TCPcondis-PT-05-CTLFireability-15
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for TCPcondis-PT-05-CTLFireability-15 (obsolete)
lola: CANCELED task # 75 (type EQUN) for TCPcondis-PT-05-CTLFireability-15 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 74 (type FNDP) for TCPcondis-PT-05-CTLFireability-15
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
sara: try reading problem file /home/mcc/execution/374/CTLFireability-75.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 75 (type EQUN) for TCPcondis-PT-05-CTLFireability-15
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TCPcondis-PT-05-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/189 5/32 TCPcondis-PT-05-CTLFireability-02 1005745 m, 201149 m/sec, 6176733 t fired, .

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TCPcondis-PT-05-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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TCPcondis-PT-05-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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TCPcondis-PT-05-CTLFireability-15: CONJ 0 1 0 0 7 0 0 6

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/189 8/32 TCPcondis-PT-05-CTLFireability-02 1874748 m, 173800 m/sec, 11997176 t fired, .

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TCPcondis-PT-05-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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TCPcondis-PT-05-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TCPcondis-PT-05-CTLFireability-15: CONJ 0 1 0 0 7 0 0 6

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/189 10/32 TCPcondis-PT-05-CTLFireability-02 2219317 m, 68913 m/sec, 17139254 t fired, .

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lola: FINISHED task # 7 (type EXCL) for TCPcondis-PT-05-CTLFireability-02
lola: result : false
lola: markings : 2348953
lola: fired transitions : 19784655
lola: time used : 17.000000
lola: memory pages used : 10
lola: LAUNCH task # 52 (type EXCL) for 51 TCPcondis-PT-05-CTLFireability-13
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for TCPcondis-PT-05-CTLFireability-13
lola: result : true
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lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 TCPcondis-PT-05-CTLFireability-11
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for TCPcondis-PT-05-CTLFireability-11
lola: result : true
lola: markings : 160280
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lola: LAUNCH task # 43 (type EXCL) for 42 TCPcondis-PT-05-CTLFireability-10
lola: time limit : 223 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for TCPcondis-PT-05-CTLFireability-10
lola: result : true
lola: markings : 286
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lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 TCPcondis-PT-05-CTLFireability-09
lola: time limit : 238 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for TCPcondis-PT-05-CTLFireability-09
lola: result : true
lola: markings : 21756
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lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 TCPcondis-PT-05-CTLFireability-08
lola: time limit : 255 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for TCPcondis-PT-05-CTLFireability-08
lola: result : false
lola: markings : 57
lola: fired transitions : 114
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lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 25 TCPcondis-PT-05-CTLFireability-07
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for TCPcondis-PT-05-CTLFireability-07
lola: result : false
lola: markings : 1630
lola: fired transitions : 3573
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 25 TCPcondis-PT-05-CTLFireability-07
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for TCPcondis-PT-05-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 25 TCPcondis-PT-05-CTLFireability-07
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for TCPcondis-PT-05-CTLFireability-07
lola: result : true
lola: markings : 332
lola: fired transitions : 591
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 TCPcondis-PT-05-CTLFireability-04
lola: time limit : 358 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for TCPcondis-PT-05-CTLFireability-04
lola: result : false
lola: markings : 62
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lola: time used : 0.000000
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lola: LAUNCH task # 10 (type EXCL) for 9 TCPcondis-PT-05-CTLFireability-03
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for TCPcondis-PT-05-CTLFireability-03
lola: result : true
lola: markings : 77
lola: fired transitions : 182
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 TCPcondis-PT-05-CTLFireability-00
lola: time limit : 447 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for TCPcondis-PT-05-CTLFireability-00
lola: result : false
lola: markings : 57
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lola: LAUNCH task # 73 (type EXCL) for 15 TCPcondis-PT-05-CTLFireability-05
lola: time limit : 511 sec
lola: memory limit: 32 pages
lola: FINISHED task # 73 (type EXCL) for TCPcondis-PT-05-CTLFireability-05
lola: result : false
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lola: LAUNCH task # 23 (type EXCL) for 22 TCPcondis-PT-05-CTLFireability-06
lola: time limit : 716 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for TCPcondis-PT-05-CTLFireability-06
lola: result : true
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lola: LAUNCH task # 60 (type EXCL) for 57 TCPcondis-PT-05-CTLFireability-15
lola: time limit : 895 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for TCPcondis-PT-05-CTLFireability-15
lola: result : true
lola: markings : 995
lola: fired transitions : 2595
lola: time used : 0.000000
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lola: LAUNCH task # 49 (type EXCL) for 48 TCPcondis-PT-05-CTLFireability-12
lola: time limit : 1194 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for TCPcondis-PT-05-CTLFireability-12
lola: result : false
lola: markings : 15893
lola: fired transitions : 43544
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 TCPcondis-PT-05-CTLFireability-14
lola: time limit : 1791 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for TCPcondis-PT-05-CTLFireability-14
lola: result : false
lola: markings : 15886
lola: fired transitions : 33930
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 TCPcondis-PT-05-CTLFireability-01
lola: time limit : 3582 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for TCPcondis-PT-05-CTLFireability-01
lola: result : false
lola: markings : 49562
lola: fired transitions : 131794
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TCPcondis-PT-05-CTLFireability-00: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-01: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-02: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-03: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-04: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-05: DISJ true LTL model checker
TCPcondis-PT-05-CTLFireability-06: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-07: DISJ true CTL model checker
TCPcondis-PT-05-CTLFireability-08: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-09: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-10: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-11: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-12: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-13: CTL true CTL model checker
TCPcondis-PT-05-CTLFireability-14: CTL false CTL model checker
TCPcondis-PT-05-CTLFireability-15: CONJ true CONJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TCPcondis-PT-05"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is TCPcondis-PT-05, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912703200498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TCPcondis-PT-05.tgz
mv TCPcondis-PT-05 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;