Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r487-tall-167912702800250.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Sudoku-PT-AN12, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r487-tall-167912702800250
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 35M
-rw-r--r-- 1 mcc users 1.1M Feb 26 09:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 4.8M Feb 26 09:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9M Feb 26 08:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 8.9M Feb 26 08:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 453K Feb 25 17:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 1.6M Feb 25 17:16 LTLCardinality.xml
-rw-r--r-- 1 mcc users 754K Feb 25 17:16 LTLFireability.txt
-rw-r--r-- 1 mcc users 2.6M Feb 25 17:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 1.2M Feb 26 10:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 5.1M Feb 26 10:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 984K Feb 26 09:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 4.3M Feb 26 09:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 84K Feb 25 17:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 207K Feb 25 17:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 963K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-00
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-01
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-02
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-03
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-04
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-05
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-06
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-07
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-08
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-09
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-10
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-11
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-12
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-13
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-14
FORMULA_NAME Sudoku-PT-AN12-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679178764252

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-PT-AN12
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-18 22:32:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-18 22:32:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-18 22:32:45] [INFO ] Load time of PNML (sax parser for PT used): 172 ms
[2023-03-18 22:32:45] [INFO ] Transformed 2160 places.
[2023-03-18 22:32:46] [INFO ] Transformed 1728 transitions.
[2023-03-18 22:32:46] [INFO ] Parsed PT model containing 2160 places and 1728 transitions and 6912 arcs in 309 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 215 ms.
Support contains 432 out of 2160 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Reduce places removed 1728 places and 0 transitions.
Iterating post reduction 0 with 1728 rules applied. Total rules applied 1728 place count 432 transition count 1728
Applied a total of 1728 rules in 53 ms. Remains 432 /2160 variables (removed 1728) and now considering 1728/1728 (removed 0) transitions.
// Phase 1: matrix 1728 rows 432 cols
[2023-03-18 22:32:50] [INFO ] Computed 35 place invariants in 102 ms
[2023-03-18 22:32:50] [INFO ] Implicit Places using invariants in 329 ms returned []
[2023-03-18 22:32:50] [INFO ] Invariant cache hit.
[2023-03-18 22:32:51] [INFO ] Implicit Places using invariants and state equation in 493 ms returned []
Implicit Place search using SMT with State Equation took 845 ms to find 0 implicit places.
[2023-03-18 22:32:51] [INFO ] Invariant cache hit.
[2023-03-18 22:32:52] [INFO ] Dead Transitions using invariants and state equation in 552 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 432/2160 places, 1728/1728 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1455 ms. Remains : 432/2160 places, 1728/1728 transitions.
Support contains 432 out of 432 places after structural reductions.
[2023-03-18 22:32:54] [INFO ] Flatten gal took : 703 ms
[2023-03-18 22:33:02] [INFO ] Flatten gal took : 944 ms
[2023-03-18 22:33:10] [INFO ] Input system was already deterministic with 1728 transitions.
Incomplete random walk after 10000 steps, including 79 resets, run finished after 1098 ms. (steps per millisecond=9 ) properties (out of 42) seen :41
Interrupted Best-First random walk after 6849 steps, including 1 resets, run timeout after 5400 ms. (steps per millisecond=1 ) properties seen 0
Running SMT prover for 1 properties.
[2023-03-18 22:33:18] [INFO ] Invariant cache hit.
[2023-03-18 22:33:24] [INFO ] After 770ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-18 22:33:27] [INFO ] Flatten gal took : 628 ms
[2023-03-18 22:33:35] [INFO ] Flatten gal took : 904 ms
[2023-03-18 22:33:43] [INFO ] Input system was already deterministic with 1728 transitions.
Computed a total of 432 stabilizing places and 1728 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 432 transition count 1728
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:45] [INFO ] Flatten gal took : 186 ms
[2023-03-18 22:33:46] [INFO ] Flatten gal took : 285 ms
[2023-03-18 22:33:46] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 16 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 18 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:47] [INFO ] Flatten gal took : 65 ms
[2023-03-18 22:33:47] [INFO ] Flatten gal took : 83 ms
[2023-03-18 22:33:47] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:47] [INFO ] Flatten gal took : 111 ms
[2023-03-18 22:33:47] [INFO ] Flatten gal took : 163 ms
[2023-03-18 22:33:48] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:48] [INFO ] Flatten gal took : 116 ms
[2023-03-18 22:33:48] [INFO ] Flatten gal took : 174 ms
[2023-03-18 22:33:49] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:50] [INFO ] Flatten gal took : 167 ms
[2023-03-18 22:33:50] [INFO ] Flatten gal took : 265 ms
[2023-03-18 22:33:51] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:51] [INFO ] Flatten gal took : 58 ms
[2023-03-18 22:33:51] [INFO ] Flatten gal took : 77 ms
[2023-03-18 22:33:52] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:52] [INFO ] Flatten gal took : 69 ms
[2023-03-18 22:33:52] [INFO ] Flatten gal took : 95 ms
[2023-03-18 22:33:52] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 77 ms
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 111 ms
[2023-03-18 22:33:53] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 83 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 84 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 42 ms
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 46 ms
[2023-03-18 22:33:53] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 53 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 54 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 40 ms
[2023-03-18 22:33:53] [INFO ] Flatten gal took : 44 ms
[2023-03-18 22:33:53] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 24 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 41 ms
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 48 ms
[2023-03-18 22:33:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 26 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 40 ms
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 44 ms
[2023-03-18 22:33:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 25 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 42 ms
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 46 ms
[2023-03-18 22:33:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 25 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 41 ms
[2023-03-18 22:33:54] [INFO ] Flatten gal took : 46 ms
[2023-03-18 22:33:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 34 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:55] [INFO ] Flatten gal took : 41 ms
[2023-03-18 22:33:55] [INFO ] Flatten gal took : 45 ms
[2023-03-18 22:33:55] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 35 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 432/432 places, 1728/1728 transitions.
[2023-03-18 22:33:55] [INFO ] Flatten gal took : 41 ms
[2023-03-18 22:33:55] [INFO ] Flatten gal took : 46 ms
[2023-03-18 22:33:55] [INFO ] Input system was already deterministic with 1728 transitions.
[2023-03-18 22:33:56] [INFO ] Flatten gal took : 906 ms
[2023-03-18 22:34:05] [INFO ] Flatten gal took : 907 ms
[2023-03-18 22:34:13] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 251 ms.
[2023-03-18 22:34:13] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 432 places, 1728 transitions and 5184 arcs took 5 ms.
Total runtime 87716 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Sudoku-PT-AN12
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/377
CTLFireability

BK_STOP 1679178991204

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/377/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/377/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/377/CTLFireability.xml
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 488 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-PT-AN12"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Sudoku-PT-AN12, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r487-tall-167912702800250"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-PT-AN12.tgz
mv Sudoku-PT-AN12 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;