fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702301204
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-PT-Z4T4N06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1165.924 3600000.00 40445.00 8903.10 FFFTTTFFF?FFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702301204.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z4T4N06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702301204
=====================================================================


--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.0M
-rw-r--r-- 1 mcc users 21K Feb 26 14:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 26 14:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 64K Feb 26 14:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 255K Feb 26 14:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 20K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 51K Feb 26 14:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 245K Feb 26 14:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 158K Feb 26 14:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 585K Feb 26 14:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.3K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 12K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 191K Mar 5 18:23 model.pnml

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content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679287114055

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N06
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T4N06
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T4N06-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 15054868 kB
After kill :
MemTotal: 16393232 kB
MemFree: 16166144 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:409
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 64 (type SKEL/SRCH) for 3 UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: result : false
lola: markings : 30
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 65 (type SKEL/SRCH) for 10 UtilityControlRoom-PT-Z4T4N06-LTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-02
lola: result : false
lola: markings : 30
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH INITIAL
lola: LAUNCH task # 33 (type CNST) for 30 UtilityControlRoom-PT-Z4T4N06-LTLFireability-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 33 (type CNST) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-06
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-PT-Z4T4N06-LTLFireability-03
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-03
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 10 UtilityControlRoom-PT-Z4T4N06-LTLFireability-02
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-02
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 6 (type EXCL) for 3 UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 6 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-PT-Z4T4N06-LTLFireability-00
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-00
lola: result : false
lola: markings : 25
lola: fired transitions : 25
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 56 (type EXCL) for 55 UtilityControlRoom-PT-Z4T4N06-LTLFireability-13
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-13
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 UtilityControlRoom-PT-Z4T4N06-LTLFireability-11
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-11
lola: result : false
lola: markings : 53
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 41 (type EXCL) for 40 UtilityControlRoom-PT-Z4T4N06-LTLFireability-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-08
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 3 UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-01
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 53 (type EXCL) for 52 UtilityControlRoom-PT-Z4T4N06-LTLFireability-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-12
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 UtilityControlRoom-PT-Z4T4N06-LTLFireability-10
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 68 (type FNDP) for 58 UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type EQUN) for 58 UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 71 (type SRCH) for 58 UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 47 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-10
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-PT-Z4T4N06-LTLFireability-05
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 28 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-05
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-PT-Z4T4N06-LTLFireability-04
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-04
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EXCL) for 58 UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type SRCH) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 68 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14 (obsolete)
lola: CANCELED task # 69 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14 (obsolete)
lola: CANCELED task # 70 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14 (obsolete)
lola: LAUNCH task # 62 (type EXCL) for 61 UtilityControlRoom-PT-Z4T4N06-LTLFireability-15
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-15
lola: result : false
lola: markings : 26
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 38 (type EXCL) for 37 UtilityControlRoom-PT-Z4T4N06-LTLFireability-07
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: FINISHED task # 68 (type FNDP) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 38 (type EXCL) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-07
lola: result : false
lola: markings : 699
lola: fired transitions : 1109
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 UtilityControlRoom-PT-Z4T4N06-LTLFireability-09
lola: time limit : 3600 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/LTLFireability-69.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 69 (type EQUN) for UtilityControlRoom-PT-Z4T4N06-LTLFireability-14
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-LTLFireability-00: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-01: CONJ false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-02: CONJ false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-03: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-04: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-05: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-06: CONJ false preprocessing
UtilityControlRoom-PT-Z4T4N06-LTLFireability-07: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-08: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-10: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-11: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-12: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-13: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-14: AG false search / frozen tokens
UtilityControlRoom-PT-Z4T4N06-LTLFireability-15: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T4N06-LTLFireability-09: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 LTL EXCL 5/3600 11/32 UtilityControlRoom-PT-Z4T4N06-LTLFireability-09 1577856 m, 315571 m/sec, 2269196 t fired, .

Time elapsed: 5 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T4N06-LTLFireability-00: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-01: CONJ false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-02: CONJ false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-03: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-04: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-05: LTL true LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-06: CONJ false preprocessing
UtilityControlRoom-PT-Z4T4N06-LTLFireability-07: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-08: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-10: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-11: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-12: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-13: LTL false LTL model checker
UtilityControlRoom-PT-Z4T4N06-LTLFireability-14: AG false search / frozen tokens
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T4N06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702301204"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N06.tgz
mv UtilityControlRoom-PT-Z4T4N06 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;