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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702201164
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-PT-Z4T3N06

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
459.995 4839.00 5380.00 22.60 FFTFFFTFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702201164.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z4T3N06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702201164
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 45K Feb 26 14:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 241K Feb 26 14:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 26 14:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 213K Feb 26 14:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 22K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 102K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 75K Feb 26 14:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 376K Feb 26 14:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 97K Feb 26 14:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 376K Feb 26 14:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 191K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679282840926

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T3N06
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T3N06
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N06-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679282845765

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 3 (type CNST) for 0 UtilityControlRoom-PT-Z4T3N06-LTLFireability-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 3 (type CNST) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-00
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 66 (type EXCL) for 65 UtilityControlRoom-PT-Z4T3N06-LTLFireability-15
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-15
lola: result : false
lola: markings : 29
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 12 (type EXCL) for 11 UtilityControlRoom-PT-Z4T3N06-LTLFireability-01
lola: time limit : 124 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-01
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 14 UtilityControlRoom-PT-Z4T3N06-LTLFireability-02
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-02
lola: result : true
lola: markings : 13
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
lola: LAUNCH task # 23 (type EXCL) for 20 UtilityControlRoom-PT-Z4T3N06-LTLFireability-04
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-04
lola: result : true
lola: markings : 52
lola: fired transitions : 66
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-PT-Z4T3N06-LTLFireability-05
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-05
lola: result : false
lola: markings : 51
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 20 UtilityControlRoom-PT-Z4T3N06-LTLFireability-04
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-04
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-PT-Z4T3N06-LTLFireability-06
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 52 (type CNST) for 49 UtilityControlRoom-PT-Z4T3N06-LTLFireability-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 52 (type CNST) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-11
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 69 (type FNDP) for 33 UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 33 UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SRCH) for 33 UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 72 (type SRCH) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 69 (type FNDP) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-07 (obsolete)
lola: FINISHED task # 70 (type EQUN) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-07
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: FINISHED task # 31 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-06
lola: result : true
lola: markings : 24779
lola: fired transitions : 41940
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 57 (type EXCL) for 56 UtilityControlRoom-PT-Z4T3N06-LTLFireability-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-12
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 UtilityControlRoom-PT-Z4T3N06-LTLFireability-10
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-10
lola: result : false
lola: markings : 24
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 UtilityControlRoom-PT-Z4T3N06-LTLFireability-09
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-09
lola: result : false
lola: markings : 715090
lola: fired transitions : 1955823
lola: time used : 4.000000
lola: memory pages used : 5
lola: LAUNCH task # 18 (type EXCL) for 17 UtilityControlRoom-PT-Z4T3N06-LTLFireability-03
lola: time limit : 898 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-03
lola: result : false
lola: markings : 277
lola: fired transitions : 283
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 UtilityControlRoom-PT-Z4T3N06-LTLFireability-08
lola: time limit : 1198 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-08
lola: result : false
lola: markings : 253
lola: fired transitions : 290
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 59 UtilityControlRoom-PT-Z4T3N06-LTLFireability-13
lola: time limit : 1797 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-13
lola: result : false
lola: markings : 105
lola: fired transitions : 124
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 63 (type EXCL) for 62 UtilityControlRoom-PT-Z4T3N06-LTLFireability-14
lola: time limit : 3595 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-LTLFireability-14
lola: result : false
lola: markings : 267
lola: fired transitions : 321
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N06-LTLFireability-00: CONJ false preprocessing
UtilityControlRoom-PT-Z4T3N06-LTLFireability-01: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-02: LTL true LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-03: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-04: CONJ false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-05: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-06: LTL true LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-07: CONJ false findpath
UtilityControlRoom-PT-Z4T3N06-LTLFireability-08: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-09: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-10: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-11: CONJ false preprocessing
UtilityControlRoom-PT-Z4T3N06-LTLFireability-12: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-13: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-14: LTL false LTL model checker
UtilityControlRoom-PT-Z4T3N06-LTLFireability-15: LTL false LTL model checker


Time elapsed: 5 secs. Pages in use: 5

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T3N06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T3N06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702201164"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T3N06.tgz
mv UtilityControlRoom-PT-Z4T3N06 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;