About the Execution of LoLA for UtilityControlRoom-PT-Z4T3N06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3081.407 | 211429.00 | 201232.00 | 518.10 | T?T?FFTT?TFFT?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702201162.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-PT-Z4T3N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702201162
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 45K Feb 26 14:38 CTLCardinality.txt
-rw-r--r-- 1 mcc users 241K Feb 26 14:38 CTLCardinality.xml
-rw-r--r-- 1 mcc users 49K Feb 26 14:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 213K Feb 26 14:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 22K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 34K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 102K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 75K Feb 26 14:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 376K Feb 26 14:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 97K Feb 26 14:43 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 376K Feb 26 14:43 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.9K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 191K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T3N06-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679282550912
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T3N06
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T3N06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-PT-Z4T3N06-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679282762341
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-PT-Z4T3N06-CTLFireability-04
lola: time limit : 94 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-04
lola: result : false
lola: markings : 30
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 69 (type SKEL/FNDP) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 70 (type SKEL/EQUN) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 71 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 72 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : unknown
lola: markings : 9
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 27 UtilityControlRoom-PT-Z4T3N06-CTLFireability-09
lola: time limit : 105 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type SKEL/FNDP) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 70 (type EQUN) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07 (obsolete)
lola: CANCELED task # 71 (type SRCH) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07 (obsolete)
lola: FINISHED task # 71 (type SKEL/SRCH) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : true
lola: markings : 10
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 34 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-09
lola: result : true
lola: markings : 46
lola: fired transitions : 92
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 27 UtilityControlRoom-PT-Z4T3N06-CTLFireability-09
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-09
lola: result : false
lola: markings : 122
lola: fired transitions : 219
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: try reading problem file /home/mcc/execution/CTLFireability-70.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 50 (type EXCL) for 41 UtilityControlRoom-PT-Z4T3N06-CTLFireability-11
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 50 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-11
lola: result : false
lola: markings : 26
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-PT-Z4T3N06-CTLFireability-05
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 16 (type EXCL) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-05
lola: result : false
lola: markings : 25
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 70 (type SKEL/EQUN) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 73 (type FNDP) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type EQUN) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SRCH) for 21 UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 73 (type FNDP) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 74 (type EQUN) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07 (obsolete)
lola: CANCELED task # 76 (type SRCH) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
sara: try reading problem file /home/mcc/execution/CTLFireability-74.sara.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 74 (type EQUN) for UtilityControlRoom-PT-Z4T3N06-CTLFireability-07
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ 0 2 0 0 4 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/239 4/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 756357 m, 151271 m/sec, 2274219 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ 0 2 0 0 4 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/239 7/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 1430431 m, 134814 m/sec, 4555337 t fired, .
Time elapsed: 12 secs. Pages in use: 7
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ 0 2 0 0 4 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/239 10/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 2112223 m, 136358 m/sec, 6715036 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ 0 2 0 0 4 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 20/239 12/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 2738383 m, 125232 m/sec, 9142349 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ 0 2 0 0 4 0 0 0
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 25/239 16/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 3435590 m, 139441 m/sec, 11541727 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 30/239 19/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 4141244 m, 141130 m/sec, 13864734 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-04: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-05: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ 0 1 0 0 5 0 0 0
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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10 CTL EXCL 35/239 21/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-03 4778016 m, 127354 m/sec, 16242872 t fired, .
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lola: time limit : 3438 sec
lola: memory limit: 32 pages
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL true CTL model checker
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4 CTL EXCL 20/3438 15/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-01 3205927 m, 153744 m/sec, 9992211 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL true CTL model checker
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4 CTL EXCL 25/3438 19/32 UtilityControlRoom-PT-Z4T3N06-CTLFireability-01 3955067 m, 149828 m/sec, 12557294 t fired, .
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG 0 0 0 0 1 0 1 0
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lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N06-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-01: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N06-CTLFireability-02: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-03: CTL unknown AGGR
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UtilityControlRoom-PT-Z4T3N06-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-07: EF true findpath
UtilityControlRoom-PT-Z4T3N06-CTLFireability-08: EFAG unknown AGGR
UtilityControlRoom-PT-Z4T3N06-CTLFireability-09: DISJ true DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-10: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-11: DISJ false DISJ
UtilityControlRoom-PT-Z4T3N06-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N06-CTLFireability-13: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N06-CTLFireability-14: CONJ false state space /EFEG
UtilityControlRoom-PT-Z4T3N06-CTLFireability-15: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T3N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T3N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702201162"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T3N06.tgz
mv UtilityControlRoom-PT-Z4T3N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;