Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702001018.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-COL-Z2T4N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702001018
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 6.9K Feb 26 14:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 14:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 14:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 26 14:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 14:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 111K Feb 26 14:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 14:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 26 14:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z2T4N10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679267993059

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T4N10
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-19 23:19:54] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE]
[2023-03-19 23:19:54] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-19 23:19:54] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 23:19:54] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 23:19:55] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 412 ms
[2023-03-19 23:19:55] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 174 PT places and 270.0 transition bindings in 13 ms.
Parsed 16 properties from file ./CTLFireability.xml in 10 ms.
[2023-03-19 23:19:55] [INFO ] Unfolded HLPN to a Petri net with 174 places and 270 transitions 850 arcs in 16 ms.
[2023-03-19 23:19:55] [INFO ] Unfolded 16 HLPN properties in 0 ms.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 23:19:55] [INFO ] Reduced 10 identical enabling conditions.
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Drop transitions removed 20 transitions
Redundant transition composition rules discarded 20 transitions
[2023-03-19 23:19:55] [INFO ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 20 ms.
[2023-03-19 23:19:55] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 174 places, 210 transitions and 610 arcs took 9 ms.
Total runtime 820 ms.
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z2T4N10
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLFireability

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679268288173

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLFireability/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-COL-Z2T4N10-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 4 (type EXCL) for UtilityControlRoom-COL-Z2T4N10-CTLFireability-01
lola: result : false
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-COL-Z2T4N10-CTLFireability-08
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:746
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-COL-Z2T4N10-CTLFireability-08
lola: result : false
lola: markings : 413
lola: fired transitions : 806
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-COL-Z2T4N10-CTLFireability-05
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N10-CTLFireability-01: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T4N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-10: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/224 7/32 UtilityControlRoom-COL-Z2T4N10-CTLFireability-05 1289006 m, 257801 m/sec, 2408114 t fired, .

Time elapsed: 6 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N10-CTLFireability-01: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T4N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-10: EG 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-11: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-14: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/224 13/32 UtilityControlRoom-COL-Z2T4N10-CTLFireability-05 2476488 m, 237496 m/sec, 4764624 t fired, .

Time elapsed: 11 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N10-CTLFireability-01: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T4N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T4N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T4N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-COL-Z2T4N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702001018"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T4N10.tgz
mv UtilityControlRoom-COL-Z2T4N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;