fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r486-tall-167912702000996
Last Updated
May 14, 2023

About the Execution of LoLA for UtilityControlRoom-COL-Z2T4N04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
186.995 4177.00 5929.00 288.20 FFFFTFTFFFFFFFTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702000996.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-COL-Z2T4N04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702000996
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 8.6K Feb 26 14:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 82K Feb 26 14:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.2K Feb 26 14:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 14:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 17:25 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:25 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 14:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 111K Feb 26 14:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 26 14:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 104K Feb 26 14:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:25 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:25 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z2T4N04-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1679264690803

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T4N04
Not applying reductions.
Model is COL
LTLFireability PT
[2023-03-19 22:24:52] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, LTLFireability, --reduce-single, STATESPACE]
[2023-03-19 22:24:52] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-19 22:24:52] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 22:24:52] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 22:24:53] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 665 ms
[2023-03-19 22:24:53] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 72 PT places and 108.0 transition bindings in 21 ms.
Parsed 16 properties from file ./LTLFireability.xml in 10 ms.
[2023-03-19 22:24:53] [INFO ] Unfolded HLPN to a Petri net with 72 places and 108 transitions 340 arcs in 12 ms.
[2023-03-19 22:24:53] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Initial state reduction rules removed 4 formulas.
[2023-03-19 22:24:53] [INFO ] Reduced 4 identical enabling conditions.
[2023-03-19 22:24:53] [INFO ] Reduced 4 identical enabling conditions.
[2023-03-19 22:24:53] [INFO ] Reduced 4 identical enabling conditions.
[2023-03-19 22:24:53] [INFO ] Reduced 4 identical enabling conditions.
[2023-03-19 22:24:53] [INFO ] Reduced 4 identical enabling conditions.
Ensure Unique test removed 16 transitions
Reduce isomorphic transitions removed 16 transitions.
Drop transitions removed 8 transitions
Redundant transition composition rules discarded 8 transitions
[2023-03-19 22:24:53] [INFO ] Export to MCC of 16 properties in file ./LTLFireability.STATESPACE.xml took 12 ms.
[2023-03-19 22:24:53] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 72 places, 84 transitions and 244 arcs took 1 ms.
Total runtime 880 ms.
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z2T4N04
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfLTLFireability
LTLCardinality

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N04-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679264694980

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfLTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfLTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfLTLFireability/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-COL-Z2T4N04-LTLFireability-07
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 58 (type CNST) for 57 UtilityControlRoom-COL-Z2T4N04-LTLFireability-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type CNST) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-15
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type FNDP) for 33 UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 33 UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 33 UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SRCH) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 61 (type FNDP) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-11 (obsolete)
lola: CANCELED task # 62 (type EQUN) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-11 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:793
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 4 (type CNST) for 3 UtilityControlRoom-COL-Z2T4N04-LTLFireability-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 UtilityControlRoom-COL-Z2T4N04-LTLFireability-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 4 (type CNST) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-01
lola: result : false
lola: FINISHED task # 13 (type CNST) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-04
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 45 (type CNST) for 44 UtilityControlRoom-COL-Z2T4N04-LTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 61 (type FNDP) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 45 (type CNST) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-12
lola: result : false
sara: try reading problem file /home/mcc/execution/unfLTLFireability/LTLCardinality-62.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 62 (type EQUN) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-11
lola: result : true
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-07
lola: result : false
lola: markings : 143176
lola: fired transitions : 567562
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-COL-Z2T4N04-LTLFireability-10
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-10
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 UtilityControlRoom-COL-Z2T4N04-LTLFireability-09
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-09
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-COL-Z2T4N04-LTLFireability-08
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-08
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-COL-Z2T4N04-LTLFireability-06
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-06
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-COL-Z2T4N04-LTLFireability-05
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-05
lola: result : false
lola: markings : 2254
lola: fired transitions : 7268
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-COL-Z2T4N04-LTLFireability-03
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-03
lola: result : false
lola: markings : 32
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 65 (type EXCL) for 47 UtilityControlRoom-COL-Z2T4N04-LTLFireability-13
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 65 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-13
lola: result : false
lola: markings : 16
lola: fired transitions : 32
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 UtilityControlRoom-COL-Z2T4N04-LTLFireability-14
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-14
lola: result : true
lola: markings : 38134
lola: fired transitions : 149632
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 47 UtilityControlRoom-COL-Z2T4N04-LTLFireability-13
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 52 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-13
lola: result : false
lola: markings : 30
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-COL-Z2T4N04-LTLFireability-02
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-02
lola: result : false
lola: markings : 38
lola: fired transitions : 43
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-COL-Z2T4N04-LTLFireability-00
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-COL-Z2T4N04-LTLFireability-00
lola: result : false
lola: markings : 41
lola: fired transitions : 41
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N04-LTLFireability-00: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-01: INITIAL false preprocessing
UtilityControlRoom-COL-Z2T4N04-LTLFireability-02: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-03: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-04: INITIAL true preprocessing
UtilityControlRoom-COL-Z2T4N04-LTLFireability-05: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-06: LTL true LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-07: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-08: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-09: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-10: LTL false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-11: CONJ false search / frozen tokens
UtilityControlRoom-COL-Z2T4N04-LTLFireability-12: INITIAL false preprocessing
UtilityControlRoom-COL-Z2T4N04-LTLFireability-13: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-14: LTL true LTL model checker
UtilityControlRoom-COL-Z2T4N04-LTLFireability-15: INITIAL true preprocessing


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T4N04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-COL-Z2T4N04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702000996"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T4N04.tgz
mv UtilityControlRoom-COL-Z2T4N04 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;