Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702000986.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-COL-Z2T4N02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702000986
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 6.7K Feb 26 14:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 58K Feb 26 14:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 14:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 39K Feb 26 14:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 14:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 140K Feb 26 14:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 14:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 75K Feb 26 14:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z2T4N02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679264632851

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T4N02
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-19 22:23:54] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE]
[2023-03-19 22:23:54] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-19 22:23:54] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 22:23:54] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 22:23:54] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 640 ms
[2023-03-19 22:23:54] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 38 PT places and 54.0 transition bindings in 12 ms.
Parsed 16 properties from file ./CTLFireability.xml in 11 ms.
[2023-03-19 22:23:54] [INFO ] Unfolded HLPN to a Petri net with 38 places and 54 transitions 170 arcs in 9 ms.
[2023-03-19 22:23:54] [INFO ] Unfolded 16 HLPN properties in 1 ms.
Initial state reduction rules removed 3 formulas.
[2023-03-19 22:23:54] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 22:23:54] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 22:23:54] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 22:23:54] [INFO ] Reduced 2 identical enabling conditions.
[2023-03-19 22:23:54] [INFO ] Reduced 2 identical enabling conditions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Drop transitions removed 4 transitions
Redundant transition composition rules discarded 4 transitions
[2023-03-19 22:23:54] [INFO ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 7 ms.
[2023-03-19 22:23:54] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 38 places, 42 transitions and 122 arcs took 1 ms.
Total runtime 780 ms.
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z2T4N02
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLFireability

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-COL-Z2T4N02-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679264636144

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLFireability/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 UtilityControlRoom-COL-Z2T4N02-CTLFireability-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 40 (type CNST) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-13
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 13 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-04
lola: result : true
lola: markings : 147
lola: fired transitions : 204
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-00
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-COL-Z2T4N02-CTLFireability-06
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-06
lola: result : true
lola: markings : 20
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-02
lola: result : true
lola: markings : 287
lola: fired transitions : 585
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 16 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-05
lola: result : true
lola: markings : 106
lola: fired transitions : 160
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 UtilityControlRoom-COL-Z2T4N02-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 46 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-15
lola: result : true
lola: markings : 12
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 51 (type EXCL) for 21 UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 21 UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 21 UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SRCH) for 21 UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 UtilityControlRoom-COL-Z2T4N02-CTLFireability-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 51 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-07 (obsolete)
lola: CANCELED task # 50 (type EQUN) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-07 (obsolete)
lola: CANCELED task # 52 (type SRCH) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-07 (obsolete)
lola: LAUNCH task # 48 (type EXCL) for 42 UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 4 (type CNST) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 48 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-14
lola: result : true
lola: markings : 15
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 37 (type EXCL) for 36 UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 UtilityControlRoom-COL-Z2T4N02-CTLFireability-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 49 (type FNDP) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 28 (type CNST) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-09
lola: result : true
lola: FINISHED task # 37 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-12
lola: result : true
lola: markings : 128
lola: fired transitions : 368
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-11
lola: result : true
lola: markings : 12
lola: fired transitions : 33
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-10
lola: result : true
lola: markings : 653
lola: fired transitions : 1302
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-03
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
lola: time limit : 3599 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/unfCTLFireability/CTLCardinality-50.sara.
lola: FINISHED task # 25 (type EXCL) for UtilityControlRoom-COL-Z2T4N02-CTLFireability-08
lola: result : true
lola: markings : 975
lola: fired transitions : 5765
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T4N02-CTLFireability-00: CTL false CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-01: INITIAL false preprocessing
UtilityControlRoom-COL-Z2T4N02-CTLFireability-02: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-04: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-07: EF true state space
UtilityControlRoom-COL-Z2T4N02-CTLFireability-08: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-09: INITIAL true preprocessing
UtilityControlRoom-COL-Z2T4N02-CTLFireability-10: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-12: CTL true CTL model checker
UtilityControlRoom-COL-Z2T4N02-CTLFireability-13: INITIAL true preprocessing
UtilityControlRoom-COL-Z2T4N02-CTLFireability-14: AGAF false state space /EFEG
UtilityControlRoom-COL-Z2T4N02-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T4N02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-COL-Z2T4N02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702000986"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T4N02.tgz
mv UtilityControlRoom-COL-Z2T4N02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;