About the Execution of LoLA for UtilityControlRoom-COL-Z2T3N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
4783.439 | 311782.00 | 291615.00 | 1166.30 | T?F???TFF??TFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r486-tall-167912702000978.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is UtilityControlRoom-COL-Z2T3N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912702000978
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 7.9K Feb 26 14:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 14:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 14:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 14:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 17:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 17:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 17:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 14:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 102K Feb 26 14:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 26 14:44 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 95K Feb 26 14:44 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 17:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 8 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 29K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-00
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-01
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-02
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-03
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-04
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-05
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-06
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-07
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-08
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-09
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-11
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-12
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-13
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-14
FORMULA_NAME UtilityControlRoom-COL-Z2T3N10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679264273057
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T3N10
Not applying reductions.
Model is COL
CTLFireability PT
[2023-03-19 22:17:54] [INFO ] Running its-tools with arguments : [-pnfolder, ., -examination, CTLFireability, --reduce-single, STATESPACE]
[2023-03-19 22:17:54] [INFO ] Parsing pnml file : /home/mcc/execution/./model.pnml
[2023-03-19 22:17:54] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-19 22:17:54] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-19 22:17:55] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 603 ms
[2023-03-19 22:17:55] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 174 PT places and 270.0 transition bindings in 12 ms.
Parsed 16 properties from file ./CTLFireability.xml in 13 ms.
[2023-03-19 22:17:55] [INFO ] Unfolded HLPN to a Petri net with 174 places and 270 transitions 850 arcs in 18 ms.
[2023-03-19 22:17:55] [INFO ] Unfolded 16 HLPN properties in 2 ms.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
[2023-03-19 22:17:55] [INFO ] Reduced 10 identical enabling conditions.
Ensure Unique test removed 40 transitions
Reduce isomorphic transitions removed 40 transitions.
Drop transitions removed 20 transitions
Redundant transition composition rules discarded 20 transitions
[2023-03-19 22:17:55] [INFO ] Export to MCC of 16 properties in file ./CTLFireability.STATESPACE.xml took 61 ms.
[2023-03-19 22:17:55] [INFO ] Export to PNML in file ./model.STATESPACE.pnml of net with 174 places, 210 transitions and 610 arcs took 2 ms.
Total runtime 838 ms.
starting LoLA
BK_INPUT UtilityControlRoom-COL-Z2T3N10
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution/unfCTLFireability
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA UtilityControlRoom-COL-Z2T3N10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679264584839
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/unfCTLFireability/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/unfCTLFireability/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/unfCTLFireability/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 16 (type EXCL) for 15 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05
lola: time limit : 94 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 85 (type FNDP) for 42 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type EQUN) for 42 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SRCH) for 42 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type SRCH) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 85 (type FNDP) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 (obsolete)
lola: CANCELED task # 86 (type EQUN) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/unfCTLFireability/CTLCardinality-86.sara.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 85 (type FNDP) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 86 (type EQUN) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/189 4/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 731972 m, 146394 m/sec, 3416251 t fired, .
Time elapsed: 8 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/189 8/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 1414894 m, 136584 m/sec, 6937222 t fired, .
Time elapsed: 13 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/189 11/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 2074457 m, 131912 m/sec, 10440363 t fired, .
Time elapsed: 18 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/189 15/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 2702740 m, 125656 m/sec, 13932452 t fired, .
Time elapsed: 23 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/189 19/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 3411557 m, 141763 m/sec, 17489436 t fired, .
Time elapsed: 28 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/189 22/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 4071817 m, 132052 m/sec, 20918807 t fired, .
Time elapsed: 33 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 35/189 25/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 4675357 m, 120708 m/sec, 24275391 t fired, .
Time elapsed: 38 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 40/189 28/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 5247931 m, 114514 m/sec, 27698209 t fired, .
Time elapsed: 43 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 45/189 31/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 5879501 m, 126314 m/sec, 31135242 t fired, .
Time elapsed: 48 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 1 0 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 53 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 78 (type EXCL) for 77 UtilityControlRoom-COL-Z2T3N10-CTLFireability-15
lola: time limit : 197 sec
lola: memory limit: 32 pages
lola: FINISHED task # 78 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-15
lola: result : false
lola: markings : 228931
lola: fired transitions : 309926
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 75 (type EXCL) for 74 UtilityControlRoom-COL-Z2T3N10-CTLFireability-14
lola: time limit : 208 sec
lola: memory limit: 32 pages
lola: FINISHED task # 75 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-14
lola: result : true
lola: markings : 54819
lola: fired transitions : 122522
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 72 (type EXCL) for 71 UtilityControlRoom-COL-Z2T3N10-CTLFireability-13
lola: time limit : 221 sec
lola: memory limit: 32 pages
lola: FINISHED task # 72 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-13
lola: result : false
lola: markings : 9
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 66 (type EXCL) for 65 UtilityControlRoom-COL-Z2T3N10-CTLFireability-11
lola: time limit : 236 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-11
lola: result : true
lola: markings : 70
lola: fired transitions : 186
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 42 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10
lola: time limit : 253 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 1 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 4/253 9/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 1564849 m, 312969 m/sec, 2999990 t fired, .
Time elapsed: 58 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 1 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 9/253 15/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 2586252 m, 204280 m/sec, 6581775 t fired, .
Time elapsed: 63 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 1 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 14/253 20/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 3511293 m, 185008 m/sec, 10065075 t fired, .
Time elapsed: 68 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 1 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 19/253 25/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 4439461 m, 185633 m/sec, 13477565 t fired, .
Time elapsed: 73 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 1 0 7 0 0 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
45 CTL EXCL 24/253 30/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 5322252 m, 176558 m/sec, 16910051 t fired, .
Time elapsed: 78 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 45 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 2 0 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 83 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 40 (type EXCL) for 35 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09
lola: time limit : 270 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 5/270 4/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 754870 m, 150974 m/sec, 3108499 t fired, .
Time elapsed: 88 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 10/270 8/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 1463516 m, 141729 m/sec, 6077585 t fired, .
Time elapsed: 93 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 15/270 12/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 2151804 m, 137657 m/sec, 8980641 t fired, .
Time elapsed: 98 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 20/270 15/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 2826874 m, 135014 m/sec, 11837872 t fired, .
Time elapsed: 103 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 25/270 19/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 3497517 m, 134128 m/sec, 14669465 t fired, .
Time elapsed: 108 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 30/270 22/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 4154034 m, 131303 m/sec, 17460835 t fired, .
Time elapsed: 113 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 35/270 26/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 4795876 m, 128368 m/sec, 20204857 t fired, .
Time elapsed: 118 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 40/270 29/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 5434344 m, 127693 m/sec, 22929684 t fired, .
Time elapsed: 123 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 1 0 2 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 45/270 32/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 6073511 m, 127833 m/sec, 25667605 t fired, .
Time elapsed: 128 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 40 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 3 0 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 1 0 0 2 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 133 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 38 (type EXCL) for 35 UtilityControlRoom-COL-Z2T3N10-CTLFireability-09
lola: time limit : 288 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 24 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08
lola: time limit : 315 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/315 7/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 1309378 m, 261875 m/sec, 2424331 t fired, .
Time elapsed: 138 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/315 12/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 2345987 m, 207321 m/sec, 4613010 t fired, .
Time elapsed: 143 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/315 17/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 3322319 m, 195266 m/sec, 6745094 t fired, .
Time elapsed: 148 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/315 21/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 4255893 m, 186714 m/sec, 8848070 t fired, .
Time elapsed: 153 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/315 26/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 5159951 m, 180811 m/sec, 10917134 t fired, .
Time elapsed: 158 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 1 0 3 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/315 30/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 6050758 m, 178161 m/sec, 12997778 t fired, .
Time elapsed: 163 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 168 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 22 (type EXCL) for 21 UtilityControlRoom-COL-Z2T3N10-CTLFireability-07
lola: time limit : 343 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-07
lola: result : false
lola: markings : 1074
lola: fired transitions : 1160
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 UtilityControlRoom-COL-Z2T3N10-CTLFireability-06
lola: time limit : 381 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-06
lola: result : true
lola: markings : 1296
lola: fired transitions : 1902
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04
lola: time limit : 429 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/429 6/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 1119097 m, 223819 m/sec, 3658911 t fired, .
Time elapsed: 173 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/429 10/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 1843078 m, 144796 m/sec, 7346715 t fired, .
Time elapsed: 178 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/429 14/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 2616987 m, 154781 m/sec, 10965181 t fired, .
Time elapsed: 183 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/429 17/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 3386778 m, 153958 m/sec, 14680849 t fired, .
Time elapsed: 188 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/429 22/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 4253832 m, 173410 m/sec, 18293685 t fired, .
Time elapsed: 193 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/429 25/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 5036659 m, 156565 m/sec, 21827596 t fired, .
Time elapsed: 198 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/429 29/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 5775615 m, 147791 m/sec, 25289854 t fired, .
Time elapsed: 203 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/429 32/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 6462639 m, 137404 m/sec, 28694741 t fired, .
Time elapsed: 208 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 213 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 10 (type EXCL) for 9 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03
lola: time limit : 483 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/483 7/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 1358608 m, 271721 m/sec, 2151644 t fired, .
Time elapsed: 218 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/483 13/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 2554502 m, 239178 m/sec, 4229004 t fired, .
Time elapsed: 223 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/483 19/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 3727492 m, 234598 m/sec, 6290544 t fired, .
Time elapsed: 228 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/483 25/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 4881260 m, 230753 m/sec, 8331713 t fired, .
Time elapsed: 233 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/483 31/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 6014778 m, 226703 m/sec, 10356034 t fired, .
Time elapsed: 238 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ 0 2 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 243 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 UtilityControlRoom-COL-Z2T3N10-CTLFireability-02
lola: time limit : 559 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-02
lola: result : false
lola: markings : 2815
lola: fired transitions : 3156
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 UtilityControlRoom-COL-Z2T3N10-CTLFireability-00
lola: time limit : 671 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-00
lola: result : true
lola: markings : 567
lola: fired transitions : 2173
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 80 (type EXCL) for 24 UtilityControlRoom-COL-Z2T3N10-CTLFireability-08
lola: time limit : 839 sec
lola: memory limit: 32 pages
lola: FINISHED task # 80 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-08
lola: result : false
lola: markings : 57
lola: fired transitions : 57
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01
lola: time limit : 1678 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/1678 4/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 807928 m, 161585 m/sec, 4108590 t fired, .
Time elapsed: 248 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/1678 7/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 1504160 m, 139246 m/sec, 7906954 t fired, .
Time elapsed: 253 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/1678 10/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 2159261 m, 131020 m/sec, 11561161 t fired, .
Time elapsed: 258 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/1678 12/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 2790326 m, 126213 m/sec, 15152909 t fired, .
Time elapsed: 263 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/1678 15/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 3407163 m, 123367 m/sec, 18700413 t fired, .
Time elapsed: 268 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/1678 18/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 4014467 m, 121460 m/sec, 22240918 t fired, .
Time elapsed: 273 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/1678 20/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 4611414 m, 119389 m/sec, 25720750 t fired, .
Time elapsed: 278 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/1678 23/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 5202914 m, 118300 m/sec, 29168712 t fired, .
Time elapsed: 283 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/1678 25/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 5786202 m, 116657 m/sec, 32593554 t fired, .
Time elapsed: 288 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/1678 28/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 6369231 m, 116605 m/sec, 36041986 t fired, .
Time elapsed: 293 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/1678 30/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 6939832 m, 114120 m/sec, 39447646 t fired, .
Time elapsed: 298 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/1678 32/32 UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 7507139 m, 113461 m/sec, 42834318 t fired, .
Time elapsed: 303 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ 0 0 0 0 3 0 1 0
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ 0 0 0 0 7 0 1 25
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 308 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 69 (type EXCL) for 68 UtilityControlRoom-COL-Z2T3N10-CTLFireability-12
lola: time limit : 3292 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type EXCL) for UtilityControlRoom-COL-Z2T3N10-CTLFireability-12
lola: result : false
lola: markings : 73
lola: fired transitions : 173
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-COL-Z2T3N10-CTLFireability-00: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-01: CTL unknown AGGR
UtilityControlRoom-COL-Z2T3N10-CTLFireability-02: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-03: CTL unknown AGGR
UtilityControlRoom-COL-Z2T3N10-CTLFireability-04: CTL unknown AGGR
UtilityControlRoom-COL-Z2T3N10-CTLFireability-05: CTL unknown AGGR
UtilityControlRoom-COL-Z2T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-07: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-08: CONJ false LTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-09: DISJ unknown DISJ
UtilityControlRoom-COL-Z2T3N10-CTLFireability-10: CONJ unknown CONJ
UtilityControlRoom-COL-Z2T3N10-CTLFireability-11: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-13: CTL false CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-14: CTL true CTL model checker
UtilityControlRoom-COL-Z2T3N10-CTLFireability-15: CTL false CTL model checker
Time elapsed: 308 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T3N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-COL-Z2T3N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912702000978"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T3N10.tgz
mv UtilityControlRoom-COL-Z2T3N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;