About the Execution of LoLA for TwoPhaseLocking-PT-nC01000vN
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 4011.556 | 180311.00 | 152591.00 | 435.00 | ?FT??TF??F???FFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r486-tall-167912701800890.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is TwoPhaseLocking-PT-nC01000vN, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912701800890
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 396K
-rw-r--r-- 1 mcc users 6.8K Feb 25 17:41 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 17:41 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 17:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 25 17:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:23 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K Feb 25 17:42 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 25 17:42 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 25 17:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 25 17:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:23 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:23 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-00
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-02
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-03
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-04
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-05
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-06
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-07
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-08
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-09
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-10
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-11
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-12
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-13
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-14
FORMULA_NAME TwoPhaseLocking-PT-nC01000vN-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679256552984
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC01000vN
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC01000vN
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vN-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679256733295
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 6 (type EXCL) for 3 TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 58 (type FNDP) for 3 TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 3 TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 62 (type SRCH) for 3 TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SRCH) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 58 (type FNDP) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: result : true
lola: fired transitions : 499
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 6 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-01 (obsolete)
lola: CANCELED task # 59 (type EQUN) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-01 (obsolete)
lola: LAUNCH task # 54 (type EXCL) for 53 TwoPhaseLocking-PT-nC01000vN-CTLFireability-15
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EQUN) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-01
lola: result : unknown
lola: FINISHED task # 54 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-15
lola: result : true
lola: markings : 4009
lola: fired transitions : 6015
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 TwoPhaseLocking-PT-nC01000vN-CTLFireability-13
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-13
lola: result : false
lola: markings : 126258
lola: fired transitions : 127757
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 TwoPhaseLocking-PT-nC01000vN-CTLFireability-11
lola: time limit : 257 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
42 CTL EXCL 5/257 17/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-11 4094571 m, 818914 m/sec, 10411144 t fired, .
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lola: CANCELED task # 42 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 39 (type EXCL) for 38 TwoPhaseLocking-PT-nC01000vN-CTLFireability-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 5/276 16/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-10 3885608 m, 777121 m/sec, 9343868 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 CTL EXCL 10/276 31/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-10 7480658 m, 719010 m/sec, 18099717 t fired, .
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lola: CANCELED task # 39 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 23 (type EXCL) for 22 TwoPhaseLocking-PT-nC01000vN-CTLFireability-06
lola: time limit : 297 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-06
lola: result : false
lola: markings : 253007
lola: fired transitions : 879257
lola: time used : 0.000000
lola: memory pages used : 2
lola: LAUNCH task # 20 (type EXCL) for 19 TwoPhaseLocking-PT-nC01000vN-CTLFireability-05
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-05
lola: result : true
lola: markings : 2505
lola: fired transitions : 6014
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 13 TwoPhaseLocking-PT-nC01000vN-CTLFireability-03
lola: time limit : 357 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 5/357 17/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-03 3925288 m, 785057 m/sec, 7750836 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 10/357 32/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-03 7507539 m, 716450 m/sec, 14895964 t fired, .
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lola: CANCELED task # 14 (type EXCL) for TwoPhaseLocking-PT-nC01000vN-CTLFireability-03 (memory limit exceeded)
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC01000vN-CTLFireability-00
lola: time limit : 395 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/395 7/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-00 1485832 m, 297166 m/sec, 7653851 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/395 13/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-00 3021313 m, 307096 m/sec, 15015984 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
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1 CTL EXCL 15/395 17/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-00 4192928 m, 234323 m/sec, 22331381 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
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1 CTL EXCL 20/395 22/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-00 5295409 m, 220496 m/sec, 29914269 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 2 0 0 2 0 0 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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lola: result : false
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG false state space / EG
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG false state space / EG
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
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31 CTL EXCL 10/1165 23/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-08 5511209 m, 480085 m/sec, 14004651 t fired, .
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31 CTL EXCL 15/1165 31/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-08 7483133 m, 394384 m/sec, 20087825 t fired, .
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17 CTL EXCL 10/1737 10/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-04 2196498 m, 211440 m/sec, 14825880 t fired, .
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17 CTL EXCL 15/1737 14/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-04 3236652 m, 208030 m/sec, 21850047 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG false state space / EG
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17 CTL EXCL 20/1737 18/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-04 4265000 m, 205669 m/sec, 28795492 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
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17 CTL EXCL 30/1737 26/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-04 6298851 m, 202373 m/sec, 42532573 t fired, .
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17 CTL EXCL 35/1737 30/32 TwoPhaseLocking-PT-nC01000vN-CTLFireability-04 7307715 m, 201772 m/sec, 49347158 t fired, .
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TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG false state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ 0 0 0 0 2 0 2 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 180 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC01000vN-CTLFireability-00: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-01: CONJ false findpath
TwoPhaseLocking-PT-nC01000vN-CTLFireability-02: F true state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-03: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-04: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-05: CTL true CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-06: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-07: EFAG unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-08: DISJ unknown DISJ
TwoPhaseLocking-PT-nC01000vN-CTLFireability-09: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-10: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-11: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-12: CTL unknown AGGR
TwoPhaseLocking-PT-nC01000vN-CTLFireability-13: CTL false CTL model checker
TwoPhaseLocking-PT-nC01000vN-CTLFireability-14: EG false state space / EG
TwoPhaseLocking-PT-nC01000vN-CTLFireability-15: CTL true CTL model checker
Time elapsed: 180 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC01000vN"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC01000vN, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912701800890"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC01000vN.tgz
mv TwoPhaseLocking-PT-nC01000vN execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;