About the Execution of LoLA for TwoPhaseLocking-PT-nC00500vN
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2071.556 | 70188.00 | 57848.00 | 197.80 | ??TF?FFFFTTFT?FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r486-tall-167912701800874.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is TwoPhaseLocking-PT-nC00500vN, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r486-tall-167912701800874
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 5.7K Feb 25 17:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 17:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 17:43 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 25 17:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 17:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 17:23 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 25 17:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Feb 25 17:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 17:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 25 17:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 17:23 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 17:23 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.6K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-01
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-03
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-04
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-05
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-06
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-08
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-09
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-10
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-11
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-13
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-14
FORMULA_NAME TwoPhaseLocking-PT-nC00500vN-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679255936967
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=TwoPhaseLocking-PT-nC00500vN
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT TwoPhaseLocking-PT-nC00500vN
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00500vN-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679256007155
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:737
lola: rewrite Frontend/Parser/formula_rewrite.k:693
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 72 (type EXCL) for 22 TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 72 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: result : false
lola: markings : 251
lola: fired transitions : 250
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 43 (type EXCL) for 42 TwoPhaseLocking-PT-nC00500vN-CTLFireability-06
lola: time limit : 133 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-06
lola: result : false
lola: markings : 501
lola: fired transitions : 500
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 52 (type EXCL) for 51 TwoPhaseLocking-PT-nC00500vN-CTLFireability-09
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 52 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-09
lola: result : true
lola: markings : 1017
lola: fired transitions : 2040
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 54 TwoPhaseLocking-PT-nC00500vN-CTLFireability-10
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-10
lola: result : true
lola: markings : 1503
lola: fired transitions : 1507
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 75 (type EXCL) for 60 TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 73 (type FNDP) for 60 TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type EQUN) for 60 TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 76 (type SRCH) for 60 TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12 (obsolete)
lola: CANCELED task # 74 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12 (obsolete)
lola: CANCELED task # 76 (type SRCH) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 76 (type SRCH) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 9 (type EXCL) for 0 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: FINISHED task # 9 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 73 (type FNDP) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 85 (type EXCL) for 22 TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 81 (type FNDP) for 0 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 0 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 84 (type SRCH) for 0 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 85 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/CTLFireability-74.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:767
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:793
lola: FINISHED task # 81 (type FNDP) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 82 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 (obsolete)
lola: CANCELED task # 84 (type SRCH) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 (obsolete)
lola: LAUNCH task # 86 (type EXCL) for 22 TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 86 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-02
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 37 (type EXCL) for 36 TwoPhaseLocking-PT-nC00500vN-CTLFireability-04
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 74 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-12
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813sara:
try reading problem file /home/mcc/execution/CTLFireability-82.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 82 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 88 (type FNDP) for 45 TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 45 TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 91 (type SRCH) for 45 TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SRCH) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-07 (obsolete)
lola: CANCELED task # 89 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-07 (obsolete)
lola: FINISHED task # 88 (type FNDP) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/CTLFireability-89.sara.
lola: FINISHED task # 89 (type EQUN) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-07
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 1 0 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/360 16/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-04 3735264 m, 747052 m/sec, 9681808 t fired, .
Time elapsed: 5 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 1 0 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/360 30/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-04 7173310 m, 687609 m/sec, 18538981 t fired, .
Time elapsed: 10 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 1 0 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 15 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 TwoPhaseLocking-PT-nC00500vN-CTLFireability-11
lola: time limit : 398 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-11
lola: result : false
lola: markings : 3
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 TwoPhaseLocking-PT-nC00500vN-CTLFireability-08
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-08
lola: result : false
lola: markings : 3249
lola: fired transitions : 5247
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 TwoPhaseLocking-PT-nC00500vN-CTLFireability-03
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-03
lola: result : false
lola: markings : 2254
lola: fired transitions : 7253
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 TwoPhaseLocking-PT-nC00500vN-CTLFireability-01
lola: time limit : 597 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 1 0 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
20 CTL EXCL 5/597 31/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-01 7424808 m, 1484961 m/sec, 7829716 t fired, .
Time elapsed: 20 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 20 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 1 0 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 25 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 3 (type EXCL) for 0 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00
lola: time limit : 715 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 5/715 7/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 1629559 m, 325911 m/sec, 7795503 t fired, .
Time elapsed: 30 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 10/715 12/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 2936425 m, 261373 m/sec, 14449011 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 15/715 17/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 4155465 m, 243808 m/sec, 20720257 t fired, .
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TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 20/715 22/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 5328121 m, 234531 m/sec, 26790469 t fired, .
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TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 25/715 27/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 6484072 m, 231190 m/sec, 32769174 t fired, .
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TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 1 0 9 0 0 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
3 CTL EXCL 30/715 31/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 7605549 m, 224295 m/sec, 38597283 t fired, .
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lola: CANCELED task # 3 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 0 0 9 0 1 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 60 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 40 (type EXCL) for 39 TwoPhaseLocking-PT-nC00500vN-CTLFireability-05
lola: time limit : 885 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-05
lola: result : false
lola: markings : 501
lola: fired transitions : 500
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 63 TwoPhaseLocking-PT-nC00500vN-CTLFireability-13
lola: time limit : 1180 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 0 0 9 0 1 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 CTL EXCL 5/1180 19/32 TwoPhaseLocking-PT-nC00500vN-CTLFireability-13 4645543 m, 929108 m/sec, 9207844 t fired, .
Time elapsed: 65 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 64 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ 0 0 0 0 9 0 1 6
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 70 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 70 (type EXCL) for 69 TwoPhaseLocking-PT-nC00500vN-CTLFireability-15
lola: time limit : 1765 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-15
lola: result : true
lola: markings : 1
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 67 (type EXCL) for 66 TwoPhaseLocking-PT-nC00500vN-CTLFireability-14
lola: time limit : 3530 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type EXCL) for TwoPhaseLocking-PT-nC00500vN-CTLFireability-14
lola: result : false
lola: markings : 2501
lola: fired transitions : 5784
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TwoPhaseLocking-PT-nC00500vN-CTLFireability-00: CONJ unknown CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-01: CTL unknown AGGR
TwoPhaseLocking-PT-nC00500vN-CTLFireability-02: CONJ true CONJ
TwoPhaseLocking-PT-nC00500vN-CTLFireability-03: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-04: CTL unknown AGGR
TwoPhaseLocking-PT-nC00500vN-CTLFireability-05: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-06: EG false state space / EG
TwoPhaseLocking-PT-nC00500vN-CTLFireability-07: AG false search / frozen tokens
TwoPhaseLocking-PT-nC00500vN-CTLFireability-08: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-09: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-10: CTL true CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-11: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-12: EF true state space
TwoPhaseLocking-PT-nC00500vN-CTLFireability-13: CTL unknown AGGR
TwoPhaseLocking-PT-nC00500vN-CTLFireability-14: CTL false CTL model checker
TwoPhaseLocking-PT-nC00500vN-CTLFireability-15: CTL true CTL model checker
Time elapsed: 70 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC00500vN"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC00500vN, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r486-tall-167912701800874"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC00500vN.tgz
mv TwoPhaseLocking-PT-nC00500vN execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;