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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r471-smll-167912660100436
Last Updated
May 14, 2023

About the Execution of LTSMin+red for StigmergyElection-PT-11a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2157.376 21289.00 39672.00 1010.10 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r471-smll-167912660100436.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is StigmergyElection-PT-11a, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r471-smll-167912660100436
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 154M
-rw-r--r-- 1 mcc users 7.6K Feb 26 17:20 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 17:20 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 26 16:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 16:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:15 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 17:15 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:15 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 18:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 144K Feb 26 18:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 17:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 17:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 153M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1679399949301

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=ReachabilityDeadlock
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=StigmergyElection-PT-11a
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-21 11:59:12] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -timeout, 180, -rebuildPNML]
[2023-03-21 11:59:12] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-21 11:59:19] [INFO ] Load time of PNML (sax parser for PT used): 7155 ms
[2023-03-21 11:59:20] [INFO ] Transformed 156 places.
[2023-03-21 11:59:20] [INFO ] Transformed 136650 transitions.
[2023-03-21 11:59:20] [INFO ] Found NUPN structural information;
[2023-03-21 11:59:20] [INFO ] Parsed PT model containing 156 places and 136650 transitions and 3001363 arcs in 8200 ms.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 3 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 132345 transitions
Reduce redundant transitions removed 132345 transitions.
Built sparse matrix representations for Structural reductions in 11 ms.650088KB memory used
Starting structural reductions in DEADLOCK mode, iteration 0 : 156/156 places, 4305/4305 transitions.
Computed a total of 24 stabilizing places and 23 stable transitions
Computed a total of 24 stabilizing places and 23 stable transitions
Performed 22 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 22 Pre rules applied. Total rules applied 0 place count 156 transition count 4283
Deduced a syphon composed of 22 places in 18 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 0 with 44 rules applied. Total rules applied 44 place count 134 transition count 4283
Computed a total of 13 stabilizing places and 12 stable transitions
Discarding 21 places :
Symmetric choice reduction at 0 with 21 rule applications. Total rules 65 place count 113 transition count 4251
Iterating global reduction 0 with 21 rules applied. Total rules applied 86 place count 113 transition count 4251
Computed a total of 13 stabilizing places and 12 stable transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 97 place count 102 transition count 4229
Iterating global reduction 0 with 11 rules applied. Total rules applied 108 place count 102 transition count 4229
Computed a total of 13 stabilizing places and 12 stable transitions
Discarding 11 places :
Symmetric choice reduction at 0 with 11 rule applications. Total rules 119 place count 91 transition count 4218
Iterating global reduction 0 with 11 rules applied. Total rules applied 130 place count 91 transition count 4218
Ensure Unique test removed 2047 transitions
Reduce isomorphic transitions removed 2047 transitions.
Computed a total of 13 stabilizing places and 12 stable transitions
Iterating post reduction 0 with 2047 rules applied. Total rules applied 2177 place count 91 transition count 2171
Computed a total of 13 stabilizing places and 12 stable transitions
Performed 33 Post agglomeration using F-continuation condition.Transition count delta: 33
Deduced a syphon composed of 33 places in 1 ms
Reduce places removed 33 places and 0 transitions.
Iterating global reduction 1 with 66 rules applied. Total rules applied 2243 place count 58 transition count 2138
Computed a total of 13 stabilizing places and 12 stable transitions
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 2254 place count 47 transition count 2127
Iterating global reduction 1 with 11 rules applied. Total rules applied 2265 place count 47 transition count 2127
Computed a total of 2 stabilizing places and 1 stable transitions
Computed a total of 2 stabilizing places and 1 stable transitions
Drop transitions removed 11 transitions
Redundant transition composition rules discarded 11 transitions
Iterating global reduction 1 with 11 rules applied. Total rules applied 2276 place count 47 transition count 2116
Computed a total of 2 stabilizing places and 1 stable transitions
Computed a total of 2 stabilizing places and 1 stable transitions
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 2277 place count 46 transition count 2115
Reduce places removed 1 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Iterating post reduction 1 with 1 rules applied. Total rules applied 2278 place count 45 transition count 2115
Computed a total of 0 stabilizing places and 0 stable transitions
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 2300 place count 34 transition count 2104
Computed a total of 0 stabilizing places and 0 stable transitions
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 0 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 2322 place count 23 transition count 2093
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Iterating post reduction 2 with 11 rules applied. Total rules applied 2333 place count 23 transition count 2082
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Drop transitions removed 2047 transitions
Redundant transition composition rules discarded 2047 transitions
Iterating global reduction 3 with 2047 rules applied. Total rules applied 4380 place count 23 transition count 35
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Applied a total of 4380 rules in 4604 ms. Remains 23 /156 variables (removed 133) and now considering 35/4305 (removed 4270) transitions.
Finished structural reductions in DEADLOCK mode , in 1 iterations and 4605 ms. Remains : 23/156 places, 35/4305 transitions.
Random walk for 1250000 steps, including 404689 resets, run took 1552 ms (no deadlock found). (steps per millisecond=805 )
Random directed walk for 1250009 steps, including 112278 resets, run took 1673 ms (no deadlock found). (steps per millisecond=747 )
[2023-03-21 11:59:29] [INFO ] Flow matrix only has 24 transitions (discarded 11 similar events)
// Phase 1: matrix 24 rows 23 cols
[2023-03-21 11:59:29] [INFO ] Computed 1 place invariants in 4 ms
[2023-03-21 11:59:29] [INFO ] [Real]Absence check using 1 positive place invariants in 4 ms returned sat
[2023-03-21 11:59:29] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2023-03-21 11:59:29] [INFO ] [Real]Absence check using state equation in 29 ms returned unsat
FORMULA ReachabilityDeadlock FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION
Total runtime 17045 ms.
ITS solved all properties within timeout

BK_STOP 1679399970590

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -timeout 180 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-11a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is StigmergyElection-PT-11a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r471-smll-167912660100436"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-11a.tgz
mv StigmergyElection-PT-11a execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;