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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912647600606
Last Updated
May 14, 2023

About the Execution of LoLa+red for StigmergyElection-PT-05a

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
208.640 8878.00 17391.00 500.00 TTTTTTFTFFFTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647600606.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyElection-PT-05a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647600606
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 708K
-rw-r--r-- 1 mcc users 7.0K Feb 26 16:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 16:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 16:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 26 16:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 17:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 17:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 17:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 17:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 16:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Feb 26 16:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Feb 26 16:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K Feb 26 16:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 193K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-00
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-01
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-02
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-03
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-04
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-05
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-06
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-07
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-08
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-09
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-10
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-11
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-12
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-13
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-14
FORMULA_NAME StigmergyElection-PT-05a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679317213488

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 13:00:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-20 13:00:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 13:00:17] [INFO ] Load time of PNML (sax parser for PT used): 192 ms
[2023-03-20 13:00:17] [INFO ] Transformed 72 places.
[2023-03-20 13:00:17] [INFO ] Transformed 450 transitions.
[2023-03-20 13:00:17] [INFO ] Found NUPN structural information;
[2023-03-20 13:00:17] [INFO ] Parsed PT model containing 72 places and 450 transitions and 3637 arcs in 355 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 41 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 6 formulas.
Ensure Unique test removed 291 transitions
Reduce redundant transitions removed 291 transitions.
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 52 resets, run finished after 782 ms. (steps per millisecond=12 ) properties (out of 6) seen :3
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 3 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-20 13:00:18] [INFO ] Flow matrix only has 144 transitions (discarded 15 similar events)
// Phase 1: matrix 144 rows 72 cols
[2023-03-20 13:00:18] [INFO ] Computed 6 place invariants in 9 ms
[2023-03-20 13:00:19] [INFO ] After 343ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-20 13:00:19] [INFO ] [Nat]Absence check using 6 positive place invariants in 7 ms returned sat
[2023-03-20 13:00:19] [INFO ] After 224ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-20 13:00:19] [INFO ] State equation strengthened by 86 read => feed constraints.
[2023-03-20 13:00:19] [INFO ] After 156ms SMT Verify possible using 86 Read/Feed constraints in natural domain returned unsat :0 sat :3
[2023-03-20 13:00:19] [INFO ] Deduced a trap composed of 13 places in 142 ms of which 12 ms to minimize.
[2023-03-20 13:00:19] [INFO ] Deduced a trap composed of 13 places in 98 ms of which 1 ms to minimize.
[2023-03-20 13:00:19] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 2 trap constraints in 274 ms
[2023-03-20 13:00:20] [INFO ] Deduced a trap composed of 12 places in 101 ms of which 2 ms to minimize.
[2023-03-20 13:00:20] [INFO ] Deduced a trap composed of 12 places in 104 ms of which 3 ms to minimize.
[2023-03-20 13:00:20] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 2 trap constraints in 235 ms
[2023-03-20 13:00:20] [INFO ] After 761ms SMT Verify possible using trap constraints in natural domain returned unsat :3 sat :0
[2023-03-20 13:00:20] [INFO ] After 1142ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 3204 ms.
starting LoLA
BK_INPUT StigmergyElection-PT-05a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679317222366

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 6 StigmergyElection-PT-05a-ReachabilityCardinality-02
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 6 StigmergyElection-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 6 StigmergyElection-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 6 StigmergyElection-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 52 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-02
lola: result : false
lola: markings : 227
lola: fired transitions : 351
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 50 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 53 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 61 (type EXCL) for 15 StigmergyElection-PT-05a-ReachabilityCardinality-05
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 63 (type FNDP) for 9 StigmergyElection-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 9 StigmergyElection-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SRCH) for 9 StigmergyElection-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 66 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-03
lola: result : false
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 63 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 64 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 93 (type FNDP) for 33 StigmergyElection-PT-05a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 33 StigmergyElection-PT-05a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 96 (type SRCH) for 33 StigmergyElection-PT-05a-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-05
lola: result : false
lola: markings : 120
lola: fired transitions : 188
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 119 (type EXCL) for 27 StigmergyElection-PT-05a-ReachabilityCardinality-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 63 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 3374
lola: tried executions : 423
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 119 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: markings : 57
lola: fired transitions : 97
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 96 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-11
lola: result : false
lola: markings : 242
lola: fired transitions : 354
lola: time used : 0.000000
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 94 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 82 (type EXCL) for 30 StigmergyElection-PT-05a-ReachabilityCardinality-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 99 (type FNDP) for 36 StigmergyElection-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 36 StigmergyElection-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SRCH) for 36 StigmergyElection-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 93 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 1885
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-64.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: FINISHED task # 82 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-10
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 135 (type EXCL) for 45 StigmergyElection-PT-05a-ReachabilityCardinality-15
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 99 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 101 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 109 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-12 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 137 (type FNDP) for 0 StigmergyElection-PT-05a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type EQUN) for 0 StigmergyElection-PT-05a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SRCH) for 0 StigmergyElection-PT-05a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 147 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-00
lola: result : false
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 137 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 142 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 124 (type FNDP) for 39 StigmergyElection-PT-05a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 138 (type EQUN) for 39 StigmergyElection-PT-05a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 154 (type SRCH) for 39 StigmergyElection-PT-05a-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 135 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-15
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 151 (type EXCL) for 12 StigmergyElection-PT-05a-ReachabilityCardinality-04
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 154 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-13
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 138 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 77 (type FNDP) for 24 StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type EQUN) for 24 StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SRCH) for 24 StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 109 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-12
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
lola: FINISHED task # 124 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 86 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 151 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-04
lola: result : false
lola: markings : 86
lola: fired transitions : 154
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 77 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 84 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 145 (type EXCL) for 18 StigmergyElection-PT-05a-ReachabilityCardinality-06
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 112 (type FNDP) for 42 StigmergyElection-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type EQUN) for 42 StigmergyElection-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 126 (type SRCH) for 42 StigmergyElection-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-08
lola: result : unknown
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 126 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-14
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 112 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 121 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 91 (type FNDP) for 21 StigmergyElection-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type EQUN) for 21 StigmergyElection-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SRCH) for 21 StigmergyElection-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 145 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-06
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 75 (type EXCL) for 3 StigmergyElection-PT-05a-ReachabilityCardinality-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 112 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-14
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 91 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 103 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 106 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 70 (type FNDP) for 3 StigmergyElection-PT-05a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 3 StigmergyElection-PT-05a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SRCH) for 3 StigmergyElection-PT-05a-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 75 (type EXCL) for StigmergyElection-PT-05a-ReachabilityCardinality-01
lola: result : false
lola: markings : 116
lola: fired transitions : 190
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for StigmergyElection-PT-05a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 71 (type EQUN) for StigmergyElection-PT-05a-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 74 (type SRCH) for StigmergyElection-PT-05a-ReachabilityCardinality-01 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-05a-ReachabilityCardinality-00: AG true tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-01: AG true tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-02: AG true tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-03: AG true tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-04: AG true tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-05: AG true tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-06: AG false tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-07: EF true findpath
StigmergyElection-PT-05a-ReachabilityCardinality-08: AG false findpath
StigmergyElection-PT-05a-ReachabilityCardinality-09: AG false tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-10: AG false tandem / relaxed
StigmergyElection-PT-05a-ReachabilityCardinality-11: AG true tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-12: EF true findpath
StigmergyElection-PT-05a-ReachabilityCardinality-13: EF true tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-14: AG false tandem / insertion
StigmergyElection-PT-05a-ReachabilityCardinality-15: AG false tandem / relaxed


Time elapsed: 1 secs. Pages in use: 3
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-05a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyElection-PT-05a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647600606"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-05a.tgz
mv StigmergyElection-PT-05a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;