Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647500570.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyElection-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647500570
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 8.7K Feb 26 16:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 26 16:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 26 16:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 16:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:14 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 17:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 16:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 146K Feb 26 16:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.2K Feb 26 16:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 26 16:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 17:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 31K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-00
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-01
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-02
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-03
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-04
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-05
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-06
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-07
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-08
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-09
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-10
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-11
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-12
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-13
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-14
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679312158654

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-03a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 11:36:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 11:36:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 11:36:01] [INFO ] Load time of PNML (sax parser for PT used): 86 ms
[2023-03-20 11:36:01] [INFO ] Transformed 44 places.
[2023-03-20 11:36:01] [INFO ] Transformed 118 transitions.
[2023-03-20 11:36:01] [INFO ] Found NUPN structural information;
[2023-03-20 11:36:01] [INFO ] Parsed PT model containing 44 places and 118 transitions and 467 arcs in 226 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 17 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 45 transitions
Reduce redundant transitions removed 45 transitions.
FORMULA StigmergyElection-PT-03a-CTLFireability-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 37 out of 44 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 44/44 places, 73/73 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 43 transition count 72
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 43 transition count 72
Applied a total of 2 rules in 19 ms. Remains 43 /44 variables (removed 1) and now considering 72/73 (removed 1) transitions.
[2023-03-20 11:36:02] [INFO ] Flow matrix only has 64 transitions (discarded 8 similar events)
// Phase 1: matrix 64 rows 43 cols
[2023-03-20 11:36:02] [INFO ] Computed 3 place invariants in 8 ms
[2023-03-20 11:36:02] [INFO ] Implicit Places using invariants in 227 ms returned []
[2023-03-20 11:36:02] [INFO ] Flow matrix only has 64 transitions (discarded 8 similar events)
[2023-03-20 11:36:02] [INFO ] Invariant cache hit.
[2023-03-20 11:36:02] [INFO ] State equation strengthened by 28 read => feed constraints.
[2023-03-20 11:36:02] [INFO ] Implicit Places using invariants and state equation in 96 ms returned []
Implicit Place search using SMT with State Equation took 362 ms to find 0 implicit places.
[2023-03-20 11:36:02] [INFO ] Flow matrix only has 64 transitions (discarded 8 similar events)
[2023-03-20 11:36:02] [INFO ] Invariant cache hit.
[2023-03-20 11:36:02] [INFO ] Dead Transitions using invariants and state equation in 101 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 43/44 places, 72/73 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 484 ms. Remains : 43/44 places, 72/73 transitions.
Support contains 37 out of 43 places after structural reductions.
[2023-03-20 11:36:02] [INFO ] Flatten gal took : 33 ms
[2023-03-20 11:36:02] [INFO ] Flatten gal took : 24 ms
[2023-03-20 11:36:02] [INFO ] Input system was already deterministic with 72 transitions.
Incomplete random walk after 10000 steps, including 124 resets, run finished after 765 ms. (steps per millisecond=13 ) properties (out of 58) seen :50
Incomplete Best-First random walk after 10000 steps, including 66 resets, run finished after 148 ms. (steps per millisecond=67 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 32 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10000 steps, including 145 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 72 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 28 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 64 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 71 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 74 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 8) seen :0
Running SMT prover for 8 properties.
[2023-03-20 11:36:04] [INFO ] Flow matrix only has 64 transitions (discarded 8 similar events)
[2023-03-20 11:36:04] [INFO ] Invariant cache hit.
[2023-03-20 11:36:04] [INFO ] [Real]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-20 11:36:04] [INFO ] After 145ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0 real:1
[2023-03-20 11:36:04] [INFO ] [Nat]Absence check using 3 positive place invariants in 4 ms returned sat
[2023-03-20 11:36:04] [INFO ] After 49ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :0
Fused 8 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 8 atomic propositions for a total of 15 simplifications.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 19 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 13 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 72 transitions.
Support contains 34 out of 43 places (down from 36) after GAL structural reductions.
Computed a total of 8 stabilizing places and 7 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 67
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 67
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 39 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 39 transition count 65
Applied a total of 8 rules in 10 ms. Remains 39 /43 variables (removed 4) and now considering 65/72 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 39/43 places, 65/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 7 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 8 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 42 transition count 71
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 42 transition count 71
Applied a total of 2 rules in 6 ms. Remains 42 /43 variables (removed 1) and now considering 71/72 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 42/43 places, 71/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 7 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 8 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 71 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 41 transition count 69
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 41 transition count 69
Applied a total of 4 rules in 5 ms. Remains 41 /43 variables (removed 2) and now considering 69/72 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 41/43 places, 69/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 13 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 7 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 69 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 0 with 13 rules applied. Total rules applied 13 place count 41 transition count 59
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 1 with 12 rules applied. Total rules applied 25 place count 29 transition count 59
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 25 place count 29 transition count 53
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 37 place count 23 transition count 53
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 40 place count 20 transition count 48
Iterating global reduction 2 with 3 rules applied. Total rules applied 43 place count 20 transition count 48
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 45 place count 18 transition count 44
Iterating global reduction 2 with 2 rules applied. Total rules applied 47 place count 18 transition count 44
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 50 place count 18 transition count 41
Drop transitions removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 3 with 12 rules applied. Total rules applied 62 place count 18 transition count 29
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 68 place count 15 transition count 26
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 69 place count 15 transition count 26
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 70 place count 15 transition count 25
Reduce places removed 3 places and 3 transitions.
Iterating global reduction 3 with 3 rules applied. Total rules applied 73 place count 12 transition count 22
Applied a total of 73 rules in 48 ms. Remains 12 /43 variables (removed 31) and now considering 22/72 (removed 50) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 12/43 places, 22/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 2 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 22 transitions.
Finished random walk after 7 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=7 )
FORMULA StigmergyElection-PT-03a-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 4 Pre rules applied. Total rules applied 0 place count 43 transition count 68
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 8 rules applied. Total rules applied 8 place count 39 transition count 68
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 36 transition count 63
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 36 transition count 63
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 17 place count 36 transition count 60
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 23 place count 33 transition count 57
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 24 place count 33 transition count 57
Applied a total of 24 rules in 26 ms. Remains 33 /43 variables (removed 10) and now considering 57/72 (removed 15) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 33/43 places, 57/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 57 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 39 transition count 65
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 39 transition count 65
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 36 transition count 59
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 36 transition count 59
Applied a total of 14 rules in 6 ms. Remains 36 /43 variables (removed 7) and now considering 59/72 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 36/43 places, 59/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 7 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 39 transition count 65
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 39 transition count 65
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 36 transition count 59
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 36 transition count 59
Applied a total of 14 rules in 6 ms. Remains 36 /43 variables (removed 7) and now considering 59/72 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 36/43 places, 59/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:04] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 41 transition count 69
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 41 transition count 69
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 40 transition count 67
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 40 transition count 67
Applied a total of 6 rules in 4 ms. Remains 40 /43 variables (removed 3) and now considering 67/72 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 40/43 places, 67/72 transitions.
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:04] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 67 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 39 transition count 65
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 39 transition count 65
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 10 place count 37 transition count 61
Iterating global reduction 0 with 2 rules applied. Total rules applied 12 place count 37 transition count 61
Applied a total of 12 rules in 5 ms. Remains 37 /43 variables (removed 6) and now considering 61/72 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/43 places, 61/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 61 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 67
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 67
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 39 transition count 65
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 39 transition count 65
Applied a total of 8 rules in 5 ms. Remains 39 /43 variables (removed 4) and now considering 65/72 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 39/43 places, 65/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 41 transition count 69
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 41 transition count 69
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 40 transition count 67
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 40 transition count 67
Applied a total of 6 rules in 5 ms. Remains 40 /43 variables (removed 3) and now considering 67/72 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 40/43 places, 67/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 67 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 39 transition count 65
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 39 transition count 65
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 11 place count 36 transition count 59
Iterating global reduction 0 with 3 rules applied. Total rules applied 14 place count 36 transition count 59
Applied a total of 14 rules in 6 ms. Remains 36 /43 variables (removed 7) and now considering 59/72 (removed 13) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 36/43 places, 59/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 59 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 66
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 66
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 9 place count 37 transition count 60
Iterating global reduction 0 with 3 rules applied. Total rules applied 12 place count 37 transition count 60
Applied a total of 12 rules in 5 ms. Remains 37 /43 variables (removed 6) and now considering 60/72 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 37/43 places, 60/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 60 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 67
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 67
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 38 transition count 63
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 38 transition count 63
Applied a total of 10 rules in 6 ms. Remains 38 /43 variables (removed 5) and now considering 63/72 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 38/43 places, 63/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 43/43 places, 72/72 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 40 transition count 67
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 40 transition count 67
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 38 transition count 63
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 38 transition count 63
Applied a total of 10 rules in 5 ms. Remains 38 /43 variables (removed 5) and now considering 63/72 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 38/43 places, 63/72 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:36:05] [INFO ] Input system was already deterministic with 63 transitions.
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:05] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:36:05] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 7 ms.
[2023-03-20 11:36:05] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 43 places, 72 transitions and 243 arcs took 1 ms.
Total runtime 3652 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT StigmergyElection-PT-03a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/362
CTLFireability

FORMULA StigmergyElection-PT-03a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-03a-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679312166800

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/362/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/362/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/362/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 StigmergyElection-PT-03a-CTLFireability-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 31 (type CNST) for StigmergyElection-PT-03a-CTLFireability-11
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 4 (type EXCL) for 3 StigmergyElection-PT-03a-CTLFireability-01
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-01
lola: result : false
lola: markings : 80
lola: fired transitions : 335
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 StigmergyElection-PT-03a-CTLFireability-04
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 10 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-04
lola: result : false
lola: markings : 11
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 34 (type EXCL) for 33 StigmergyElection-PT-03a-CTLFireability-12
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 34 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-12
lola: result : false
lola: markings : 227
lola: fired transitions : 1024
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 51 (type EXCL) for 15 StigmergyElection-PT-03a-CTLFireability-06
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 51 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-06
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 StigmergyElection-PT-03a-CTLFireability-10
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-10
lola: result : false
lola: markings : 11
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 StigmergyElection-PT-03a-CTLFireability-05
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-05
lola: result : false
lola: markings : 10
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 StigmergyElection-PT-03a-CTLFireability-02
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-02
lola: result : false
lola: markings : 10
lola: fired transitions : 51
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 StigmergyElection-PT-03a-CTLFireability-00
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-00
lola: result : true
lola: markings : 45
lola: fired transitions : 107
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 StigmergyElection-PT-03a-CTLFireability-09
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 25 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-09
lola: result : true
lola: markings : 206
lola: fired transitions : 1086
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 36 StigmergyElection-PT-03a-CTLFireability-13
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-13
lola: result : false
lola: markings : 7
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 StigmergyElection-PT-03a-CTLFireability-08
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 22 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-08
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 43 StigmergyElection-PT-03a-CTLFireability-15
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 52 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-15
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 36 StigmergyElection-PT-03a-CTLFireability-13
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-13
lola: result : true
lola: markings : 10
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 48 (type EXCL) for 43 StigmergyElection-PT-03a-CTLFireability-15
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-15
lola: result : true
lola: markings : 45
lola: fired transitions : 188
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 StigmergyElection-PT-03a-CTLFireability-07
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-07
lola: result : true
lola: markings : 10
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-03a-CTLFireability-00: CTL true CTL model checker
StigmergyElection-PT-03a-CTLFireability-01: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-04: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-05: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-06: AXAF true state space /EXEG
StigmergyElection-PT-03a-CTLFireability-07: CTL true CTL model checker
StigmergyElection-PT-03a-CTLFireability-08: CTL true CTL model checker
StigmergyElection-PT-03a-CTLFireability-09: CTL true CTL model checker
StigmergyElection-PT-03a-CTLFireability-10: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-11: INITIAL false preprocessing
StigmergyElection-PT-03a-CTLFireability-12: CTL false CTL model checker
StigmergyElection-PT-03a-CTLFireability-13: CONJ true CONJ
StigmergyElection-PT-03a-CTLFireability-15: DISJ true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyElection-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647500570"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-03a.tgz
mv StigmergyElection-PT-03a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;