Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647500554.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyElection-PT-02a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647500554
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 504K
-rw-r--r-- 1 mcc users 10K Feb 26 16:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 124K Feb 26 16:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 16:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 16:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 17:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 17:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 17:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 17:14 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 16:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 113K Feb 26 16:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 26 16:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 26 16:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 15K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-00
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-01
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-02
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-03
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-04
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-05
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-06
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-07
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-08
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-09
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-10
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-11
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-12
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-13
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-14
FORMULA_NAME StigmergyElection-PT-02a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679311806929

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyElection-PT-02a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-20 11:30:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-20 11:30:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-20 11:30:10] [INFO ] Load time of PNML (sax parser for PT used): 71 ms
[2023-03-20 11:30:10] [INFO ] Transformed 30 places.
[2023-03-20 11:30:10] [INFO ] Transformed 66 transitions.
[2023-03-20 11:30:10] [INFO ] Found NUPN structural information;
[2023-03-20 11:30:10] [INFO ] Parsed PT model containing 30 places and 66 transitions and 196 arcs in 276 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Initial state reduction rules removed 3 formulas.
Ensure Unique test removed 20 transitions
Reduce redundant transitions removed 20 transitions.
FORMULA StigmergyElection-PT-02a-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-02a-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyElection-PT-02a-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 28 out of 30 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Applied a total of 0 rules in 23 ms. Remains 30 /30 variables (removed 0) and now considering 46/46 (removed 0) transitions.
[2023-03-20 11:30:10] [INFO ] Flow matrix only has 40 transitions (discarded 6 similar events)
// Phase 1: matrix 40 rows 30 cols
[2023-03-20 11:30:10] [INFO ] Computed 3 place invariants in 8 ms
[2023-03-20 11:30:11] [INFO ] Implicit Places using invariants in 269 ms returned []
[2023-03-20 11:30:11] [INFO ] Flow matrix only has 40 transitions (discarded 6 similar events)
[2023-03-20 11:30:11] [INFO ] Invariant cache hit.
[2023-03-20 11:30:11] [INFO ] State equation strengthened by 15 read => feed constraints.
[2023-03-20 11:30:11] [INFO ] Implicit Places using invariants and state equation in 111 ms returned []
Implicit Place search using SMT with State Equation took 442 ms to find 0 implicit places.
[2023-03-20 11:30:11] [INFO ] Flow matrix only has 40 transitions (discarded 6 similar events)
[2023-03-20 11:30:11] [INFO ] Invariant cache hit.
[2023-03-20 11:30:11] [INFO ] Dead Transitions using invariants and state equation in 96 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 565 ms. Remains : 30/30 places, 46/46 transitions.
Support contains 28 out of 30 places after structural reductions.
[2023-03-20 11:30:11] [INFO ] Flatten gal took : 40 ms
[2023-03-20 11:30:11] [INFO ] Flatten gal took : 15 ms
[2023-03-20 11:30:11] [INFO ] Input system was already deterministic with 46 transitions.
Incomplete random walk after 10000 steps, including 234 resets, run finished after 917 ms. (steps per millisecond=10 ) properties (out of 37) seen :31
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 237 ms. (steps per millisecond=42 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 115 resets, run finished after 276 ms. (steps per millisecond=36 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 56 resets, run finished after 125 ms. (steps per millisecond=80 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 70 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-20 11:30:13] [INFO ] Flow matrix only has 40 transitions (discarded 6 similar events)
[2023-03-20 11:30:13] [INFO ] Invariant cache hit.
[2023-03-20 11:30:13] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2023-03-20 11:30:13] [INFO ] After 67ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:5
[2023-03-20 11:30:13] [INFO ] [Nat]Absence check using 3 positive place invariants in 2 ms returned sat
[2023-03-20 11:30:13] [INFO ] After 70ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 6 atomic propositions for a total of 13 simplifications.
[2023-03-20 11:30:13] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 8 ms
FORMULA StigmergyElection-PT-02a-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 6 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 46 transitions.
Support contains 24 out of 30 places (down from 25) after GAL structural reductions.
Computed a total of 6 stabilizing places and 5 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 25 transition count 37
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 25 transition count 37
Applied a total of 10 rules in 6 ms. Remains 25 /30 variables (removed 5) and now considering 37/46 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 25/30 places, 37/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 37 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 26 transition count 39
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 26 transition count 39
Applied a total of 8 rules in 4 ms. Remains 26 /30 variables (removed 4) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 26/30 places, 39/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 26 transition count 39
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 26 transition count 39
Applied a total of 8 rules in 2 ms. Remains 26 /30 variables (removed 4) and now considering 39/46 (removed 7) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 26/30 places, 39/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 39 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 29 transition count 45
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 29 transition count 45
Applied a total of 2 rules in 2 ms. Remains 29 /30 variables (removed 1) and now considering 45/46 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 29/30 places, 45/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 45 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 25 transition count 37
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 25 transition count 37
Applied a total of 10 rules in 3 ms. Remains 25 /30 variables (removed 5) and now considering 37/46 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/30 places, 37/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 2 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 37 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 25 transition count 37
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 25 transition count 37
Applied a total of 10 rules in 2 ms. Remains 25 /30 variables (removed 5) and now considering 37/46 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 25/30 places, 37/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 37 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 28 transition count 43
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 28 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 5 place count 27 transition count 41
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 27 transition count 41
Applied a total of 6 rules in 2 ms. Remains 27 /30 variables (removed 3) and now considering 41/46 (removed 5) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 27/30 places, 41/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 41 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 28 transition count 41
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 9 place count 24 transition count 41
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 9 place count 24 transition count 35
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 21 place count 18 transition count 35
Discarding 5 places :
Symmetric choice reduction at 2 with 5 rule applications. Total rules 26 place count 13 transition count 28
Iterating global reduction 2 with 5 rules applied. Total rules applied 31 place count 13 transition count 28
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 33 place count 11 transition count 24
Iterating global reduction 2 with 2 rules applied. Total rules applied 35 place count 11 transition count 24
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 38 place count 11 transition count 21
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 40 place count 11 transition count 19
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 44 place count 9 transition count 17
Applied a total of 44 rules in 25 ms. Remains 9 /30 variables (removed 21) and now considering 17/46 (removed 29) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 9/30 places, 17/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 2 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 2 ms
[2023-03-20 11:30:13] [INFO ] Input system was already deterministic with 17 transitions.
Finished random walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
FORMULA StigmergyElection-PT-02a-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 27 transition count 41
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 27 transition count 41
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 8 place count 25 transition count 37
Iterating global reduction 0 with 2 rules applied. Total rules applied 10 place count 25 transition count 37
Applied a total of 10 rules in 3 ms. Remains 25 /30 variables (removed 5) and now considering 37/46 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 25/30 places, 37/46 transitions.
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 3 ms
[2023-03-20 11:30:13] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:14] [INFO ] Input system was already deterministic with 37 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Reduce places removed 1 places and 1 transitions.
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 28 transition count 37
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 17 place count 20 transition count 37
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 4 Pre rules applied. Total rules applied 17 place count 20 transition count 33
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 2 with 8 rules applied. Total rules applied 25 place count 16 transition count 33
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 27 place count 14 transition count 29
Iterating global reduction 2 with 2 rules applied. Total rules applied 29 place count 14 transition count 29
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 31 place count 12 transition count 25
Iterating global reduction 2 with 2 rules applied. Total rules applied 33 place count 12 transition count 25
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 36 place count 12 transition count 22
Drop transitions removed 5 transitions
Redundant transition composition rules discarded 5 transitions
Iterating global reduction 3 with 5 rules applied. Total rules applied 41 place count 12 transition count 17
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 45 place count 10 transition count 15
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 46 place count 10 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 3 with 1 rules applied. Total rules applied 47 place count 10 transition count 14
Reduce places removed 2 places and 2 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 49 place count 8 transition count 12
Applied a total of 49 rules in 16 ms. Remains 8 /30 variables (removed 22) and now considering 12/46 (removed 34) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 8/30 places, 12/46 transitions.
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 1 ms
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 1 ms
[2023-03-20 11:30:14] [INFO ] Input system was already deterministic with 12 transitions.
Finished random walk after 23 steps, including 4 resets, run visited all 1 properties in 2 ms. (steps per millisecond=11 )
FORMULA StigmergyElection-PT-02a-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 3 Pre rules applied. Total rules applied 0 place count 30 transition count 43
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 27 transition count 43
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 7 place count 26 transition count 42
Iterating global reduction 0 with 1 rules applied. Total rules applied 8 place count 26 transition count 42
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 9 place count 26 transition count 41
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 10 place count 26 transition count 40
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 11 place count 25 transition count 40
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 12 place count 25 transition count 40
Applied a total of 12 rules in 14 ms. Remains 25 /30 variables (removed 5) and now considering 40/46 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 25/30 places, 40/46 transitions.
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:14] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 30/30 places, 46/46 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 28 transition count 43
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 28 transition count 43
Applied a total of 4 rules in 2 ms. Remains 28 /30 variables (removed 2) and now considering 43/46 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 28/30 places, 43/46 transitions.
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 4 ms
[2023-03-20 11:30:14] [INFO ] Input system was already deterministic with 43 transitions.
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:30:14] [INFO ] Flatten gal took : 5 ms
[2023-03-20 11:30:14] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-20 11:30:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 30 places, 46 transitions and 128 arcs took 1 ms.
Total runtime 3812 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT StigmergyElection-PT-02a
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA StigmergyElection-PT-02a-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyElection-PT-02a-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679311815652

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 7 (type EXCL) for 6 StigmergyElection-PT-02a-CTLFireability-02
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 34 (type FNDP) for 18 StigmergyElection-PT-02a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 35 (type EQUN) for 18 StigmergyElection-PT-02a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 37 (type SRCH) for 18 StigmergyElection-PT-02a-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 7 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-02
lola: result : false
lola: markings : 57
lola: fired transitions : 132
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 26 (type EXCL) for 25 StigmergyElection-PT-02a-CTLFireability-11
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type SRCH) for StigmergyElection-PT-02a-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 34 (type FNDP) for StigmergyElection-PT-02a-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 35 (type EQUN) for StigmergyElection-PT-02a-CTLFireability-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 26 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-11
lola: result : false
lola: markings : 5
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 32 (type EXCL) for 31 StigmergyElection-PT-02a-CTLFireability-15
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 35 (type EQUN) for StigmergyElection-PT-02a-CTLFireability-07
lola: result : unknown
lola: FINISHED task # 32 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-15
lola: result : false
lola: markings : 7
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 18 StigmergyElection-PT-02a-CTLFireability-07
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 StigmergyElection-PT-02a-CTLFireability-06
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-06
lola: result : false
lola: markings : 9
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 StigmergyElection-PT-02a-CTLFireability-04
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-04
lola: result : true
lola: markings : 4
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 StigmergyElection-PT-02a-CTLFireability-03
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-03
lola: result : false
lola: markings : 16
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 StigmergyElection-PT-02a-CTLFireability-01
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-01
lola: result : false
lola: markings : 7
lola: fired transitions : 29
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 StigmergyElection-PT-02a-CTLFireability-00
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-00
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 StigmergyElection-PT-02a-CTLFireability-14
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for StigmergyElection-PT-02a-CTLFireability-14
lola: result : false
lola: markings : 35
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyElection-PT-02a-CTLFireability-00: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-01: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-02: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-03: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-04: CTL true CTL model checker
StigmergyElection-PT-02a-CTLFireability-06: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-07: CONJ false CTL model checker
StigmergyElection-PT-02a-CTLFireability-11: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-14: CTL false CTL model checker
StigmergyElection-PT-02a-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-02a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyElection-PT-02a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647500554"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-02a.tgz
mv StigmergyElection-PT-02a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;