fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r455-smll-167912647400446
Last Updated
May 14, 2023

About the Execution of LoLa+red for StigmergyCommit-PT-05a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
270.539 10512.00 19562.00 645.40 TFTFTTFFTFTTTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r455-smll-167912647400446.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is StigmergyCommit-PT-05a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r455-smll-167912647400446
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 6.0K Feb 26 11:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 11:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Feb 26 11:01 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 11:01 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 17:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 17:11 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 17:11 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 11:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 132K Feb 26 11:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 26 11:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 43K Feb 26 11:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 17:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 17:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 613K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-00
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-01
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-02
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-03
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-04
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-05
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-06
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-07
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-08
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-09
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-10
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-11
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-12
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-13
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-14
FORMULA_NAME StigmergyCommit-PT-05a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679248976920

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=StigmergyCommit-PT-05a
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-19 18:03:00] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-19 18:03:00] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-19 18:03:00] [INFO ] Load time of PNML (sax parser for PT used): 286 ms
[2023-03-19 18:03:00] [INFO ] Transformed 220 places.
[2023-03-19 18:03:00] [INFO ] Transformed 1212 transitions.
[2023-03-19 18:03:00] [INFO ] Found NUPN structural information;
[2023-03-19 18:03:00] [INFO ] Parsed PT model containing 220 places and 1212 transitions and 11640 arcs in 451 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 24 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 800 transitions
Reduce redundant transitions removed 800 transitions.
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 5 resets, run finished after 606 ms. (steps per millisecond=16 ) properties (out of 10) seen :6
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-01 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 4) seen :1
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=370 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 3) seen :1
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Running SMT prover for 2 properties.
[2023-03-19 18:03:01] [INFO ] Flow matrix only has 394 transitions (discarded 18 similar events)
// Phase 1: matrix 394 rows 220 cols
[2023-03-19 18:03:01] [INFO ] Computed 7 place invariants in 28 ms
[2023-03-19 18:03:02] [INFO ] [Real]Absence check using 7 positive place invariants in 9 ms returned sat
[2023-03-19 18:03:02] [INFO ] After 376ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-19 18:03:02] [INFO ] [Nat]Absence check using 7 positive place invariants in 4 ms returned sat
[2023-03-19 18:03:02] [INFO ] After 252ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :2
[2023-03-19 18:03:02] [INFO ] State equation strengthened by 209 read => feed constraints.
[2023-03-19 18:03:02] [INFO ] After 154ms SMT Verify possible using 209 Read/Feed constraints in natural domain returned unsat :0 sat :2
[2023-03-19 18:03:02] [INFO ] Deduced a trap composed of 16 places in 201 ms of which 12 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 16 places in 207 ms of which 2 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 18 places in 197 ms of which 1 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 17 places in 136 ms of which 1 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 17 places in 119 ms of which 2 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 16 places in 98 ms of which 0 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 18 places in 75 ms of which 1 ms to minimize.
[2023-03-19 18:03:03] [INFO ] Deduced a trap composed of 17 places in 83 ms of which 1 ms to minimize.
[2023-03-19 18:03:04] [INFO ] Deduced a trap composed of 16 places in 56 ms of which 1 ms to minimize.
[2023-03-19 18:03:04] [INFO ] Trap strengthening (SAT) tested/added 10/9 trap constraints in 1385 ms
[2023-03-19 18:03:04] [INFO ] After 1589ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :1
Attempting to minimize the solution found.
Minimization took 26 ms.
[2023-03-19 18:03:04] [INFO ] After 2057ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :1
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-14 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 11 ms.
Support contains 4 out of 220 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 220/220 places, 412/412 transitions.
Graph (complete) has 453 edges and 220 vertex of which 214 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.4 ms
Discarding 6 places :
Also discarding 6 output transitions
Drop transitions removed 6 transitions
Drop transitions removed 19 transitions
Reduce isomorphic transitions removed 19 transitions.
Drop transitions removed 37 transitions
Trivial Post-agglo rules discarded 37 transitions
Performed 37 trivial Post agglomeration. Transition count delta: 37
Iterating post reduction 0 with 56 rules applied. Total rules applied 57 place count 214 transition count 350
Reduce places removed 37 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Drop transitions removed 6 transitions
Trivial Post-agglo rules discarded 6 transitions
Performed 6 trivial Post agglomeration. Transition count delta: 6
Iterating post reduction 1 with 67 rules applied. Total rules applied 124 place count 177 transition count 320
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 130 place count 171 transition count 320
Performed 40 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 40 Pre rules applied. Total rules applied 130 place count 171 transition count 280
Deduced a syphon composed of 40 places in 1 ms
Reduce places removed 40 places and 0 transitions.
Iterating global reduction 3 with 80 rules applied. Total rules applied 210 place count 131 transition count 280
Discarding 30 places :
Symmetric choice reduction at 3 with 30 rule applications. Total rules 240 place count 101 transition count 250
Iterating global reduction 3 with 30 rules applied. Total rules applied 270 place count 101 transition count 250
Discarding 30 places :
Symmetric choice reduction at 3 with 30 rule applications. Total rules 300 place count 71 transition count 220
Iterating global reduction 3 with 30 rules applied. Total rules applied 330 place count 71 transition count 220
Ensure Unique test removed 68 transitions
Reduce isomorphic transitions removed 68 transitions.
Iterating post reduction 3 with 68 rules applied. Total rules applied 398 place count 71 transition count 152
Discarding 6 places :
Symmetric choice reduction at 4 with 6 rule applications. Total rules 404 place count 65 transition count 146
Iterating global reduction 4 with 6 rules applied. Total rules applied 410 place count 65 transition count 146
Discarding 4 places :
Symmetric choice reduction at 4 with 4 rule applications. Total rules 414 place count 61 transition count 142
Iterating global reduction 4 with 4 rules applied. Total rules applied 418 place count 61 transition count 142
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 4 with 3 rules applied. Total rules applied 421 place count 61 transition count 139
Performed 11 Post agglomeration using F-continuation condition.Transition count delta: 11
Deduced a syphon composed of 11 places in 1 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 5 with 22 rules applied. Total rules applied 443 place count 50 transition count 128
Drop transitions removed 5 transitions
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 5 with 10 rules applied. Total rules applied 453 place count 50 transition count 118
Discarding 5 places :
Symmetric choice reduction at 6 with 5 rule applications. Total rules 458 place count 45 transition count 113
Iterating global reduction 6 with 5 rules applied. Total rules applied 463 place count 45 transition count 113
Discarding 5 places :
Symmetric choice reduction at 6 with 5 rule applications. Total rules 468 place count 40 transition count 108
Iterating global reduction 6 with 5 rules applied. Total rules applied 473 place count 40 transition count 108
Discarding 5 places :
Symmetric choice reduction at 6 with 5 rule applications. Total rules 478 place count 35 transition count 103
Iterating global reduction 6 with 5 rules applied. Total rules applied 483 place count 35 transition count 103
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 484 place count 35 transition count 102
Partial Free-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 6 with 2 rules applied. Total rules applied 486 place count 35 transition count 102
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 6 with 1 rules applied. Total rules applied 487 place count 35 transition count 101
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 6 with 1 rules applied. Total rules applied 488 place count 34 transition count 100
Reduce places removed 1 places and 0 transitions.
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 6 with 5 rules applied. Total rules applied 493 place count 33 transition count 96
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 7 with 4 rules applied. Total rules applied 497 place count 29 transition count 96
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 8 with 1 Pre rules applied. Total rules applied 497 place count 29 transition count 95
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 8 with 2 rules applied. Total rules applied 499 place count 28 transition count 95
Performed 8 Post agglomeration using F-continuation condition with reduction of 56 identical transitions.
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 8 with 16 rules applied. Total rules applied 515 place count 20 transition count 31
Drop transitions removed 6 transitions
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 8 with 7 rules applied. Total rules applied 522 place count 20 transition count 24
Performed 5 Post agglomeration using F-continuation condition.Transition count delta: 5
Deduced a syphon composed of 5 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 9 with 13 rules applied. Total rules applied 535 place count 12 transition count 19
Drop transitions removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 9 with 5 rules applied. Total rules applied 540 place count 12 transition count 14
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 10 with 1 rules applied. Total rules applied 541 place count 12 transition count 13
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 10 with 1 rules applied. Total rules applied 542 place count 11 transition count 12
Applied a total of 542 rules in 180 ms. Remains 11 /220 variables (removed 209) and now considering 12/412 (removed 400) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 181 ms. Remains : 11/220 places, 12/412 transitions.
Finished random walk after 2 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=2 )
FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.
Total runtime 4199 ms.
starting LoLA
BK_INPUT StigmergyCommit-PT-05a
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA StigmergyCommit-PT-05a-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679248987432

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type EXCL) for 9 StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 51 (type FNDP) for 9 StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 9 StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SRCH) for 9 StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 56 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: result : false
lola: markings : 60
lola: fired transitions : 89
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 52 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 55 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 58 (type EXCL) for 12 StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 12 StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 12 StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SRCH) for 12 StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 50 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 57 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-04 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type EXCL) for 15 StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 61 (type FNDP) for 15 StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type EQUN) for 15 StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SRCH) for 15 StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 50 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 57 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-04
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 65 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 61 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 62 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 64 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 72 (type EXCL) for 18 StigmergyCommit-PT-05a-ReachabilityCardinality-06
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 75 (type FNDP) for 0 StigmergyCommit-PT-05a-ReachabilityCardinality-00
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 76 (type EQUN) for 0 StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-52.sara.
lola: LAUNCH task # 78 (type SRCH) for 0 StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 62 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-05
lola: result : true
lola: FINISHED task # 72 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-06
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 79 (type EXCL) for 0 StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 79 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: result : false
lola: markings : 62
lola: fired transitions : 96
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 76 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 78 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-00 (obsolete)
lola: FINISHED task # 75 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 45497
lola: tried executions : 253
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 90 (type EXCL) for 42 StigmergyCommit-PT-05a-ReachabilityCardinality-14
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 92 (type FNDP) for 24 StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type EQUN) for 24 StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SRCH) for 24 StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 95 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 92 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 93 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 86 (type FNDP) for 42 StigmergyCommit-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type EQUN) for 42 StigmergyCommit-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SRCH) for 42 StigmergyCommit-PT-05a-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
sara: place or transition ordering is non-deterministic


lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 92 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 9385
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 90 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-14
lola: result : false
lola: markings : 341
lola: fired transitions : 512
lola: time used : 1.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 86 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 87 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 89 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 118 (type EXCL) for 3 StigmergyCommit-PT-05a-ReachabilityCardinality-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 123 (type FNDP) for 6 StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type EQUN) for 6 StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SRCH) for 6 StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-03
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 118 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-01
lola: result : true
lola: markings : 110
lola: fired transitions : 187
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 135 (type EXCL) for 27 StigmergyCommit-PT-05a-ReachabilityCardinality-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 127 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 123 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 125 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 107 (type FNDP) for 45 StigmergyCommit-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 108 (type EQUN) for 45 StigmergyCommit-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SRCH) for 45 StigmergyCommit-PT-05a-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-08
lola: result : false
lola: FINISHED task # 135 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-09
lola: result : true
lola: markings : 126
lola: fired transitions : 205
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 146 (type EXCL) for 39 StigmergyCommit-PT-05a-ReachabilityCardinality-13
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 107 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-15
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-125.sara.
sara: place or transition ordering is non-deterministic

lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 123 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 25564
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 108 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 110 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 121 (type FNDP) for 21 StigmergyCommit-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type EQUN) for 21 StigmergyCommit-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SRCH) for 21 StigmergyCommit-PT-05a-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-87.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 76 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-00
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 121 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 1712
lola: tried executions : 5
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 150 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-07
lola: result : true
lola: markings : 119
lola: fired transitions : 157
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 146 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-13
lola: result : true
lola: markings : 227
lola: fired transitions : 370
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 148 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 101 (type EXCL) for 33 StigmergyCommit-PT-05a-ReachabilityCardinality-11
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 120 (type FNDP) for 36 StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type EQUN) for 36 StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 138 (type SRCH) for 36 StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 125 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-11
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 105 (type EXCL) for 30 StigmergyCommit-PT-05a-ReachabilityCardinality-10
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 105 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-10
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 139 (type EXCL) for 36 StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: time limit : 3598 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-148.sara.
lola: FINISHED task # 108 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-15
lola: result : true
lola: FINISHED task # 138 (type SRCH) for StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: result : false
lola: markings : 749
lola: fired transitions : 1405
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 139 (type EXCL) for StigmergyCommit-PT-05a-ReachabilityCardinality-12
lola: result : false
lola: markings : 531
lola: fired transitions : 752
lola: time used : 0.000000
lola: memory pages used : 1
sara: place or transition ordering is non-deterministic
lola: CANCELED task # 120 (type FNDP) for StigmergyCommit-PT-05a-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 124 (type EQUN) for StigmergyCommit-PT-05a-ReachabilityCardinality-12 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
StigmergyCommit-PT-05a-ReachabilityCardinality-00: AG true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-01: AG false tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-02: AG true tandem / insertion
StigmergyCommit-PT-05a-ReachabilityCardinality-03: EF false tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-04: AG true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-05: EF true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-06: AG false tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-07: AG false findpath
StigmergyCommit-PT-05a-ReachabilityCardinality-08: AG true tandem / insertion
StigmergyCommit-PT-05a-ReachabilityCardinality-09: AG false tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-10: EF true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-11: EF true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-12: AG true tandem / insertion
StigmergyCommit-PT-05a-ReachabilityCardinality-13: EF true tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-14: EF false tandem / relaxed
StigmergyCommit-PT-05a-ReachabilityCardinality-15: EF true findpath


Time elapsed: 2 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-05a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is StigmergyCommit-PT-05a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r455-smll-167912647400446"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-05a.tgz
mv StigmergyCommit-PT-05a execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;